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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	<linux-mtd@lists.infradead.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Michal Simek <monstr@monstr.eu>,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	Amit Kumar Mahapatra <akumarma@xilinx.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH 09/22] mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page
Date: Wed,  5 May 2021 23:37:37 +0200	[thread overview]
Message-ID: <20210505213750.257417-10-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20210505213750.257417-1-miquel.raynal@bootlin.com>

When parsing the ONFI parameter page, save the available NV-DDR timing
modes in the core's dynamic ONFI structure. Once available to the rest
of the core out of the ONFI driver, these values will then be used to
derive the best timing mode.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/raw/nand_onfi.c | 2 ++
 include/linux/mtd/onfi.h         | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c
index 02303455c34f..f7a4a0573fe7 100644
--- a/drivers/mtd/nand/raw/nand_onfi.c
+++ b/drivers/mtd/nand/raw/nand_onfi.c
@@ -316,6 +316,8 @@ int nand_onfi_detect(struct nand_chip *chip)
 	onfi->tR = le16_to_cpu(p->t_r);
 	onfi->tCCS = le16_to_cpu(p->t_ccs);
 	onfi->sdr_timing_modes = le16_to_cpu(p->sdr_timing_modes);
+	if (p->features & ONFI_FEATURE_NV_DDR)
+		onfi->nvddr_timing_modes = p->nvddr_timing_modes;
 	onfi->vendor_revision = le16_to_cpu(p->vendor_revision);
 	memcpy(onfi->vendor, p->vendor, sizeof(p->vendor));
 	chip->parameters.onfi = onfi;
diff --git a/include/linux/mtd/onfi.h b/include/linux/mtd/onfi.h
index 319e1736851d..14e66a49557e 100644
--- a/include/linux/mtd/onfi.h
+++ b/include/linux/mtd/onfi.h
@@ -25,6 +25,7 @@
 
 /* ONFI features */
 #define ONFI_FEATURE_16_BIT_BUS		BIT(0)
+#define ONFI_FEATURE_NV_DDR		BIT(5)
 #define ONFI_FEATURE_EXT_PARAM_PAGE	BIT(7)
 
 /* ONFI timing mode, used in both asynchronous and synchronous mode */
@@ -162,6 +163,7 @@ struct onfi_ext_param_page {
  * @tR: Page read time
  * @tCCS: Change column setup time
  * @sdr_timing_modes: Supported asynchronous/SDR timing modes
+ * @nvddr_timing_modes: Supported source synchronous/NV-DDR timing modes
  * @vendor_revision: Vendor specific revision number
  * @vendor: Vendor specific data
  */
@@ -172,6 +174,7 @@ struct onfi_params {
 	u16 tR;
 	u16 tCCS;
 	u16 sdr_timing_modes;
+	u16 nvddr_timing_modes;
 	u16 vendor_revision;
 	u8 vendor[88];
 };
-- 
2.27.0


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  parent reply	other threads:[~2021-05-05 21:43 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-05 21:37 [PATCH 00/22] mtd: rawnand: NV-DDR support Miquel Raynal
2021-05-05 21:37 ` [PATCH 01/22] mtd: rawnand: Add a helper to clarify the interface configuration Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 02/22] mtd: rawnand: arasan: Check the proposed data interface is supported Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 03/22] mtd: rawnand: atmel: " Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 04/22] mtd: rawnand: onfi: Use the BIT() macro when possible Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 05/22] mtd: rawnand: Update dead URL Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 06/22] mtd: rawnand: Use more recent ONFI specification wording Miquel Raynal
2021-05-26  9:05   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 07/22] mtd: rawnand: Clarify the NV-DDR entries in the ONFI structure Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 08/22] mtd: rawnand: Add NV-DDR timings Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` Miquel Raynal [this message]
2021-05-26  9:04   ` [PATCH 09/22] mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page Miquel Raynal
2021-05-05 21:37 ` [PATCH 10/22] mtd: rawnand: Add an indirection on onfi_fill_interface_config() Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 11/22] mtd: rawnand: Add onfi_fill_nvddr_interface_config() helper Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 12/22] mtd: rawnand: Avoid accessing NV-DDR timings from legacy code Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 13/22] mtd: rawnand: Access SDR and NV-DDR timings through a common macro Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 14/22] mtd: rawnand: Handle the double bytes in NV-DDR mode Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 15/22] mtd: rawnand: Add a helper to find the closest ONFI " Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 16/22] mtd: rawnand: Support enabling NV-DDR through SET_FEATURES Miquel Raynal
2021-05-05 21:37 ` [PATCH 17/22] mtd: rawnand: Allow SDR timings to be nacked Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 18/22] mtd: rawnand: Choose the best timings, NV-DDR included Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 19/22] MAINTAINERS: Add myself as co-maintainer of the Arasan NAND controller driver Miquel Raynal
2021-05-26  9:04   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 20/22] mtd: rawnand: arasan: Fix a macro parameter Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 21/22] mtd: rawnand: arasan: Workaround a misbehaving prog type with NV-DDR Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal
2021-05-05 21:37 ` [PATCH 22/22] mtd: rawnand: arasan: Support NV-DDR interface Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal

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