From: Pratyush Yadav <email@example.com>
To: Alexander Sverdlin <firstname.lastname@example.org>
Cc: Michael Walle <email@example.com>, <firstname.lastname@example.org>,
Tudor Ambarus <email@example.com>,
Miquel Raynal <firstname.lastname@example.org>,
Richard Weinberger <email@example.com>,
Vignesh Raghavendra <firstname.lastname@example.org>,
Subject: Re: [PATCH] mtd: spi-nor: mt25qu: Ignore 6th ID byte
Date: Tue, 30 Nov 2021 15:19:58 +0530 [thread overview]
Message-ID: <email@example.com> (raw)
On 25/11/21 08:26AM, Alexander Sverdlin wrote:
> Hi Pratyush,
> thanks for the quick reply!
> On 23/11/2021 18:42, Pratyush Yadav wrote:
> >> In my opinion, as I look into Micron or Macronix datasheets, write_proto has little to
> >> do with erase_proto. (there is currently no separate erase_proto)
> > I think this just worked for most flashes since both writes and erases
> > generally use 1-bit mode. 4 or 8 bit modes are generally used for reads
> > only.
> >> Before I come up with a totally wrong patch, wanted to ask your opinion, how should
> >> it be solved, what do you think?
> >> I do not see any erase-related tables for this in JESD216C.
> >> I also cannot come up with an example of a chip with erase != 1-1-0.
> > See Micron MT35XU512ABA or Cypress S28HS512T (in spansion.c). Both have
> > erase in 8D-8D-8D mode.
> >> Shall I hardcode 1-1-0 for erase?
> >> Shall I introduce erase_proto? What would be the logic for its setting/discovery?
> > I think introducing erase_proto would be the sensible thing. You would
> > have to see if we can discover erase protocol from SFDP. But my question
> > is: is that really worth it? Do you really need that little bit speed
> > boost you'd get by transmitting write data in 4 bit mode, since the
> > large portion of the time would be spent in the chip actually flashing
> > the data.
> The problem I have is not speed, but totally not working erase. And I don't want
> to downgrade write functionality for other chips.
Then you need to introduce erase_proto.
Texas Instruments Inc.
Linux MTD discussion mailing list
next prev parent reply other threads:[~2021-11-30 10:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-19 8:04 [PATCH] mtd: spi-nor: mt25qu: Ignore 6th ID byte Alexander A Sverdlin
2021-11-19 21:19 ` Michael Walle
2021-11-22 7:06 ` Alexander Sverdlin
2021-11-22 15:05 ` Michael Walle
2021-11-23 7:45 ` Alexander Sverdlin
2021-11-23 8:14 ` Michael Walle
2021-11-23 12:40 ` Alexander Sverdlin
2021-11-23 14:01 ` Michael Walle
2021-11-23 16:14 ` Tudor.Ambarus
2021-11-23 12:13 ` Alexander Sverdlin
2021-11-23 17:42 ` Pratyush Yadav
2021-11-25 7:26 ` Alexander Sverdlin
2021-11-30 9:49 ` Pratyush Yadav [this message]
2022-07-18 15:03 ` Tudor.Ambarus
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