From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Roman Yeryomin <roman@advem.lv>,
linux-mtd <linux-mtd@lists.infradead.org>
Cc: Marek Vasut <marek.vasut@gmail.com>
Subject: Re: [PATCH 1/2] mtd: spi-nor: fix GigaDevice quad_enable
Date: Sun, 28 Jul 2019 11:47:03 +0300 [thread overview]
Message-ID: <5d84e5c2-77bd-bdff-9b69-8736c7ec016c@cogentembedded.com> (raw)
In-Reply-To: <20190726210830.1932-1-roman@advem.lv>
Hello!
On 27.07.2019 0:08, Roman Yeryomin wrote:
> According to datasheets all GD devices are capable of quad mode, which
> is enabled via Status Register-2, bit 1 (S9). This corresponds to
> Spansion SR/CR operations. Unfortunately only gd25q256 datasheet is
> clear about Quad Enable Requirements (QER), others have no such
> information in datasheets.
> So define quad_enable for all GD devices to be sure.
> Also gd25q256 is an exception. There are two versions: C and D.
> First one uses S6 bit (like described in e27072851bf7d) but the latter
When citing a commit ID, you need to also specify its summary enclosed in
("").
> uses S9 bit like others. To add support for D this should be handled
> differently, so, to retain compatibility, leave gd25q256 quad_enable
> callback intact.
>
> Signed-off-by: Roman Yeryomin <roman@advem.lv>
[...]
MBR, Sergei
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prev parent reply other threads:[~2019-07-28 8:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 21:08 [PATCH 1/2] mtd: spi-nor: fix GigaDevice quad_enable Roman Yeryomin
2019-07-28 5:48 ` Tudor.Ambarus
2019-07-28 6:21 ` Tudor.Ambarus
2019-08-07 20:10 ` Roman Yeryomin
2019-07-28 8:47 ` Sergei Shtylyov [this message]
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