From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
devicetree@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] dt-bindings: mtd: Add YAML schemas for the generic NAND options
Date: Mon, 1 Apr 2019 23:13:53 +0200 [thread overview]
Message-ID: <75ad3b89e4a6f8ad5bc414c3dccbb1f99361495a.1554153146.git-series.maxime.ripard@bootlin.com> (raw)
The NAND chips in MTD have a bunch of generic options that are needed in a
device tree. Add a YAML schemas for those.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/mtd/nand-controller.yaml | 131 +++++++-
1 file changed, 131 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/nand-controller.yaml
diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
new file mode 100644
index 000000000000..05b1afb34972
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
@@ -0,0 +1,131 @@
+# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NAND Chip and NAND Controller Generic Binding
+
+maintainers:
+ - Boris Brezillon <bbrezillon@kernel.org>
+ - Miquel Raynal <miquel.raynal@bootlin.com>
+ - Richard Weinberger <richard@nod.at>
+
+description: |
+ The NAND controller should be represented with its own DT node, and
+ all NAND chips attached to this controller should be defined as
+ children nodes of the NAND controller. This representation should be
+ enforced even for simple controllers supporting only one chip.
+
+ The ECC strength and ECC step size properties define the correction
+ capability of a controller. Together, they say a controller can
+ correct {strength} bit errors per {size} bytes.
+
+ The interpretation of these parameters is implementation-defined, so
+ not all implementations must support all possible
+ combinations. However, implementations are encouraged to further
+ specify the value(s) they support.
+
+properties:
+ $nodename:
+ pattern: "^nand-controller(@.*)?"
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ ranges: true
+
+patternProperties:
+ "^nand@[a-z0-9]$":
+ properties:
+ reg:
+ description:
+ Contains the native Ready/Busy IDs.
+
+ nand-ecc-mode:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/string
+ - enum: [ none, soft, hw, hw_syndrome, hw_oob_first, on-die ]
+ description:
+ Operation mode of the NAND ecc mode. soft_bch is deprecated
+ and should be replaced by soft and nand-ecc-algo
+
+ nand-ecc-algo:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/string
+ - enum: [ hamming, bch, rs ]
+ description:
+ Algorithm of NAND ECC.
+
+ nand-bus-width:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [ 8, 16 ]
+ - default: 8
+ description:
+ Bus width to the NAND chip
+
+ nand-on-flash-bbt:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Enable the on-flash Bad Block Table
+
+ nand-ecc-strength:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Number of bits to correct per ECC step.
+
+ nand-ecc-step-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Number of data bytes covered by a single ECC step.
+
+ nand-ecc-maximize:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Whether or not the ECC strength should be maximized. The
+ maximum ECC strength is both controller and chip
+ dependent. The controller side has to select the ECC config
+ providing the best strength and taking the OOB area size
+ constraint into account. This is particularly useful when
+ only the in-band area is used by the upper layers, and you
+ want to make your NAND as reliable as possible.
+
+ nand-is-boot-medium:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Whether or not the NAND chip is a boot medium. Drivers might
+ use this information to select ECC algorithms supported by
+ the boot ROM or similar restrictions.
+
+ nand-rb:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Contains the native Ready/Busy IDs.
+
+ required:
+ - reg
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+
+examples:
+ - |
+ nand-controller {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* controller specific properties */
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ nand-ecc-algo = "bch";
+
+ /* controller specific properties */
+ };
+ };
base-commit: aa63f222af3e5991099ebcecca7c474d8285c7c4
--
git-series 0.9.1
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next reply other threads:[~2019-04-01 21:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-01 21:13 Maxime Ripard [this message]
2019-04-01 21:13 ` [PATCH 2/4] dt-bindings: mtd: sunxi-nand: Add YAML schemas Maxime Ripard
2019-04-02 2:02 ` Rob Herring
2019-04-01 21:13 ` [PATCH 3/4] ARM: dts: sunxi: Conform to DT spec for NAND controller Maxime Ripard
2019-04-02 8:19 ` Miquel Raynal
2019-04-01 21:13 ` [PATCH 4/4] ARM: dts: sunxi: Remove useless address and size cells Maxime Ripard
2019-04-02 8:19 ` Miquel Raynal
2019-04-02 11:11 ` Maxime Ripard
2019-04-02 1:58 ` [PATCH 1/4] dt-bindings: mtd: Add YAML schemas for the generic NAND options Rob Herring
2019-04-02 6:15 ` Maxime Ripard
2019-04-02 7:59 ` Miquel Raynal
2019-04-02 8:19 ` Miquel Raynal
2019-04-02 8:49 ` Rob Herring
2019-04-02 8:56 ` Miquel Raynal
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