From: Vignesh Raghavendra <vigneshr@ti.com>
To: <Tudor.Ambarus@microchip.com>, <marek.vasut@gmail.com>
Cc: richard@nod.at, linux-kernel@vger.kernel.org,
Nicolas.Ferre@microchip.com, boris.brezillon@collabora.com,
linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com,
computersforpeace@gmail.com, dwmw2@infradead.org
Subject: Re: [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up
Date: Mon, 5 Aug 2019 11:14:17 +0530 [thread overview]
Message-ID: <9fee8e16-b2f6-2428-f42b-281db01e3706@ti.com> (raw)
In-Reply-To: <20190717084745.19322-3-tudor.ambarus@microchip.com>
On 17/07/19 2:18 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> The write protection at power-up logic was split across functions
> because of a dependency to spansion_quad_enable(). Group the code
> in spi_nor_init() as the pointer to spansion_quad_enable() can be
> retrieved from nor->quad_enable.
>
> While touching this code, rename nor->clear_sr_bp() to
> nor->disable_write_protection() to better indicate its scope: it
> disables the default write protection after a power-on reset cycle.
I prefer this function to be renamed to nor->disable_block_protection()
so as to avoid being confused with write protect signal input to the flash.
Regards
Vignesh
>
> No functional change intended.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 39 ++++++++++++++++++++++++---------------
> include/linux/mtd/spi-nor.h | 6 +++---
> 2 files changed, 27 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 03cc788511d5..e9e441f91b68 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -3780,8 +3780,6 @@ static int spi_nor_init_params(struct spi_nor *nor,
> default:
> /* Kept only for backward compatibility purpose. */
> params->quad_enable = spansion_quad_enable;
> - if (nor->clear_sr_bp)
> - nor->clear_sr_bp = spi_nor_spansion_clear_sr_bp;
> break;
> }
>
> @@ -4034,11 +4032,32 @@ static int spi_nor_init(struct spi_nor *nor)
> {
> int err;
>
> - if (nor->clear_sr_bp) {
> - err = nor->clear_sr_bp(nor);
> + /*
> + * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
> + * with the software protection bits set.
> + */
> + if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
> + JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
> + JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
> + nor->info->flags & SPI_NOR_HAS_LOCK) {
> + nor->disable_write_protection = spi_nor_clear_sr_bp;
> +
> + /*
> + * In case of spansion flashes, when the configuration register
> + * Quad Enable bit is one, only the the Write Status (01h)
> + * command with two data bytes may be used to clear the block
> + * protection bits.
> + */
> + if (nor->quad_enable == spansion_quad_enable)
> + nor->disable_write_protection =
> + spi_nor_spansion_clear_sr_bp;
> + }
> +
> + if (nor->disable_write_protection) {
> + err = nor->disable_write_protection(nor);
> if (err) {
> dev_err(nor->dev,
> - "fail to clear block protection bits\n");
> + "failed to unlock the flash at init\n");
> return err;
> }
> }
> @@ -4165,16 +4184,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> if (info->flags & SPI_S3AN)
> nor->flags |= SNOR_F_READY_XSR_RDY;
>
> - /*
> - * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
> - * with the software protection bits set.
> - */
> - if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
> - JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
> - JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
> - nor->info->flags & SPI_NOR_HAS_LOCK)
> - nor->clear_sr_bp = spi_nor_clear_sr_bp;
> -
> /* Parse the Serial Flash Discoverable Parameters table. */
> ret = spi_nor_init_params(nor, ¶ms);
> if (ret)
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index c4c2c5971284..6c3273760700 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -374,8 +374,8 @@ struct flash_info;
> * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
> * completely locked
> * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
> - * @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
> - * the SPI NOR Status Register.
> + * @disable_write_protection: [FLASH-SPECIFIC] disable write protection during
> + * power-up
> * @priv: the private data
> */
> struct spi_nor {
> @@ -412,7 +412,7 @@ struct spi_nor {
> int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> int (*quad_enable)(struct spi_nor *nor);
> - int (*clear_sr_bp)(struct spi_nor *nor);
> + int (*disable_write_protection)(struct spi_nor *nor);
>
> void *priv;
> };
>
--
Regards
Vignesh
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2019-08-05 5:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-17 8:47 [PATCH 0/5] mtd: spi-nor: write protection at power-up Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 1/5] mtd: spi-nor: fix description for int (*flash_is_locked)() Tudor.Ambarus
2019-08-05 5:34 ` Vignesh Raghavendra
2019-08-12 11:24 ` Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 2/5] mtd: spi-nor: group the code about the write protection at power-up Tudor.Ambarus
2019-08-05 5:44 ` Vignesh Raghavendra [this message]
2019-08-05 6:30 ` Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 3/5] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-05 6:18 ` Vignesh Raghavendra
2019-07-17 8:48 ` [PATCH 4/5] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-07-17 8:48 ` [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Tudor.Ambarus
2019-07-17 11:15 ` Tudor.Ambarus
2019-07-17 11:30 ` [PATCH v2 " Tudor.Ambarus
2019-08-07 16:24 ` Vignesh Raghavendra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9fee8e16-b2f6-2428-f42b-281db01e3706@ti.com \
--to=vigneshr@ti.com \
--cc=Nicolas.Ferre@microchip.com \
--cc=Tudor.Ambarus@microchip.com \
--cc=boris.brezillon@collabora.com \
--cc=computersforpeace@gmail.com \
--cc=dwmw2@infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=marek.vasut@gmail.com \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).