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From: "Bean Huo (beanhuo)" <beanhuo@micron.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	"Zoltan Szubbocsev \(zszubbocsev\)" <zszubbocsev@micron.com>,
	Richard Weinberger <richard@nod.at>,
	Steve deRosier <derosier@gmail.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"Wojtaszczyk, Piotr" <WojtaszczykP@cumminsallison.com>
Subject: RE: [EXT] Re: [RFC PATCH 0/3] Fix proposal for the Micron shallow erase issue
Date: Wed, 6 May 2020 15:36:21 +0000	[thread overview]
Message-ID: <BN7PR08MB5684BF2C51143B741A37A73BDBA40@BN7PR08MB5684.namprd08.prod.outlook.com> (raw)
In-Reply-To: <20200504102612.5ba87dfc@xps13>

] Fix proposal for the Micron shallow
> erase issue
> 
> Hi Bean,
> 
> "Bean Huo (beanhuo)" <beanhuo@micron.com> wrote on Mon, 4 May 2020
> 08:08:34 +0000:
> 
> > >
> > > So the questions are:
> > >
> > > 1/ What should we write exactly:
> > >     -> the main area
> > >     -> the OOB area
> > >     -> both
> > >    ?
> >
> > The Main area is ok.
> >
> > >
> > > 2/ Shall we prefer writing 8 even/odd pages starting from:
> > >     -> the beginning of the
> > >     -> the middle of the block
> > >     -> we do not care
> > >    ?
> > >
> > Follow the sequence of block programming, from the lowest to the highest
> page address.
> > This is normal programming sequence.  the beginning of the block make sense.
> 
> Thanks for answering! Any chance that you give us more details on the series
> which are affected?
> 
> Thanks,
> Miquèl


Hi, Miquel


Micron recommends to fill at least 15 pages before executing an erase operation on all planar SLC NAND. In normal operation, a NANC block
will be erased when many pages have been written to it.

Claimed performance degradation:

My patch checks the number of pages that have been programmed on the NAND and in most cases before an erase operation is executed
the blocks will be fully programmed. In the very rare case when additional pages need to be written, there will be some additional time required,
however as erase operations are infrequently executed, the claimed performance hit is unfounded and is not supported by any data.
Please support claims by actual data.

We have developed a patch that fully addresses the issue and we will rebase it with the latest Linux release.

Thanks,

Bean

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      reply	other threads:[~2020-05-06 15:36 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-31 19:26 [RFC PATCH 0/3] Fix proposal for the Micron shallow erase issue Miquel Raynal
2019-12-31 19:26 ` [RFC PATCH 1/3] mtd: rawnand: Add the nand_chip->erase hook Miquel Raynal
2019-12-31 19:26 ` [RFC PATCH 2/3] mtd: rawnand: Add the nand_chip->write_oob hook Miquel Raynal
2019-12-31 19:26 ` [RFC PATCH 3/3] mtd: rawnand: micron: Address the shallow erase issue Miquel Raynal
2020-01-02 18:41 ` [RFC PATCH 0/3] Fix proposal for the Micron " Florian Fainelli
2020-01-14  9:12   ` Miquel Raynal
2020-01-14 20:46     ` Wojtaszczyk, Piotr
2020-01-15  7:58       ` Boris Brezillon
2020-01-15  8:13         ` Miquel Raynal
2020-01-15 16:51           ` Wojtaszczyk, Piotr
2020-05-03 11:29             ` Miquel Raynal
2020-05-04  8:08               ` [EXT] " Bean Huo (beanhuo)
2020-05-04  8:26                 ` Miquel Raynal
2020-05-06 15:36                   ` Bean Huo (beanhuo) [this message]

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