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* Number of bytes for spi-nand bad block marker
@ 2019-08-12 20:24 Kursad Oney
  0 siblings, 0 replies; only message in thread
From: Kursad Oney @ 2019-08-12 20:24 UTC (permalink / raw)
  To: linux-mtd
  Cc: Vignesh Raghavendra, Boris Brezillon, Richard Weinberger,
	Marek Vasut, Miquel Raynal, Brian Norris, David Woodhouse


The spi-nand driver in both linux and u-boot check 2 bytes for bad
block markers in spinand_isbad(). However, the datasheet for
W25N01GVxxIG says 'A “Bad Block Marker” is a non-FFh data byte stored
at Byte 0 of Page 0 for each bad block. An additional marker is also
stored in the first byte of the 64-Byte spare area.' which is
basically one byte for BBM in spare.

Boris says they have used the same pattern for parallel NAND because
some NANDs are interfaces through a 16-bit bus.

Here is the situation I am facing: We rolled our own own spi-nand
kernel/bootloader drivers before the kernel spi-nand driver was
integrated, and set BBM size to 1 byte for this type of flash. This
means the 2nd byte is available for use. Some devices in the field
utilize the extra byte for the jffs2 clean marker.

We would like to migrate to the mainline drivers but this presents an
issue. When we flash an image with the mainline u-boot spi-nand
driver, it thinks the cleaned jffs2 blocks are "bad blocks" since one
of the bytes includes the clean marker.

Marek suggested we do a one-time upgrade script where we rewrite the
OOB but it's a risky operation, especially in the field. Boris asked
me to email the MTD list and continue the discussion here. I
appreciate any opinions/suggestions.


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