From: Florian Fainelli <f.fainelli@gmail.com>
To: Kamal Dasu <kdasu.kdev@gmail.com>, linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
Paul Burton <paulburton@kernel.org>,
Richard Weinberger <richard@nod.at>,
linux-mips@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
linaro-mm-sig@lists.linaro.org, Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org, dri-devel@lists.freedesktop.org,
Miquel Raynal <miquel.raynal@bootlin.com>,
James Hogan <jhogan@kernel.org>,
bcm-kernel-feedback-list@broadcom.com,
Brian Norris <computersforpeace@gmail.com>,
Sumit Semwal <sumit.semwal@linaro.org>,
linux-media@vger.kernel.org
Subject: Re: [PATCH] MIPS: c-r4k: Invalidate BMIPS5000 ZSCM prefetch lines
Date: Thu, 6 Feb 2020 19:55:39 -0800 [thread overview]
Message-ID: <ffdb9b0d-578a-dfb7-020b-27c5b1646a2e@gmail.com> (raw)
In-Reply-To: <20200206193037.32041-1-kdasu.kdev@gmail.com>
On 2/6/2020 11:30 AM, Kamal Dasu wrote:
> Zephyr secondary cache is 256KB, 128B lines. 32B sectors. A secondary cache
> line can contain two instruction cache lines (64B), or four data cache
> lines (32B). Hardware prefetch Cache detects stream access, and prefetches
> ahead of processor access. Add support to inavalidate BMIPS5000 cpu zephyr
s/inavalidate/invalidate/
> secondary cache module (ZSCM) on DMA from device so that data returned is
> coherent during DMA read operations.
Just a few nits, see below, with those addressed:
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
> ---
> arch/mips/mm/c-r4k.c | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
> index 5f3d0103b95d..2d8892ba68ab 100644
> --- a/arch/mips/mm/c-r4k.c
> +++ b/arch/mips/mm/c-r4k.c
> @@ -901,6 +901,35 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
> __sync();
> }
>
> +static void prefetch_cache_inv(unsigned long addr, unsigned long size)
> +{
> + unsigned int linesz = cpu_scache_line_size();
> + unsigned long addr0 = addr, addr1;
> + int cpu_type = current_cpu_type();
> +
> + if (cpu_type == CPU_BMIPS5000) {
I would re-organize this and move this out of the prefetch_cache_inv()
such that platforms which do not require that operation can have it
optimized out, see below:
> + /* invalidate zephyr secondary cache module prefetch lines */
> + addr0 &= ~(linesz - 1);
> + addr1 = (addr0 + size - 1) & ~(linesz - 1);
> +
> + protected_writeback_scache_line(addr0);
> + if (likely(addr1 != addr0))
> + protected_writeback_scache_line(addr1);
> + else
> + return;
> +
> + addr0 += linesz;
> + if (likely(addr1 != addr0))
> + protected_writeback_scache_line(addr0);
> + else
> + return;
> +
> + addr1 -= linesz;
> + if (likely(addr1 > addr0))
> + protected_writeback_scache_line(addr0);
> + }
> +}
> +
> static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
> {
> /* Catch bad driver code */
> @@ -908,6 +937,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
> return;
>
> preempt_disable();
if (current_cpu_type() == CPU_BMIPS5000)
prefetch_cache_inv(addr, size);
> + prefetch_cache_inv(addr, size);
> if (cpu_has_inclusive_pcaches) {
> if (size >= scache_size) {
> if (current_cpu_type() != CPU_LOONGSON64)
>
--
Florian
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
prev parent reply other threads:[~2020-02-07 3:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-06 19:30 [PATCH] MIPS: c-r4k: Invalidate BMIPS5000 ZSCM prefetch lines Kamal Dasu
2020-02-07 3:55 ` Florian Fainelli [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ffdb9b0d-578a-dfb7-020b-27c5b1646a2e@gmail.com \
--to=f.fainelli@gmail.com \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=computersforpeace@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=jhogan@kernel.org \
--cc=kdasu.kdev@gmail.com \
--cc=linaro-mm-sig@lists.linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=miquel.raynal@bootlin.com \
--cc=paulburton@kernel.org \
--cc=ralf@linux-mips.org \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
--cc=sumit.semwal@linaro.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).