linux-next: manual merge of the arm-lpae tree with the arm tree

linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

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Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/mm/ioremap.c between commit 3afb51f744b6 ("ARM: add generic
ioremap optimization by reusing static mappings") from the arm tree and
commit ec93d80c4b07 ("ARM: LPAE: Page table maintenance for the 3-level
format") from the arm-lpae tree.

I guessed (probably incorrectly) about the fix up (see below).  Please
supply a better fix if necessary.

More generally, is the LPAE stuff going to be merged soon?  The above
arm-lpae commit dates from February (though it was recommitted on Nov
15) ...

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/mm/ioremap.c
index 12c7ad2,d1f78ba..0000000
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@@ -194,7 -208,14 +202,8 @@@ void __iomem * __arm_ioremap_pfn_caller
  	 */
  	if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
  		return NULL;
+ #endif
  
 -	/*
 -	 * Don't allow RAM to be mapped - this causes problems with ARMv6+
 -	 */
 -	if (WARN_ON(pfn_valid(pfn)))
 -		return NULL;
 -
  	type = get_mem_type(mtype);
  	if (!type)
  		return NULL;
@@@ -329,34 -322,28 +338,34 @@@ __arm_ioremap_exec(unsigned long phys_a
  void __iounmap(volatile void __iomem *io_addr)
  {
  	void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
 -#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
 -	struct vm_struct **p, *tmp;
 +	struct vm_struct *vm;
  
 -	/*
 -	 * If this is a section based mapping we need to handle it
 -	 * specially as the VM subsystem does not know how to handle
 -	 * such a beast. We need the lock here b/c we need to clear
 -	 * all the mappings before the area can be reclaimed
 -	 * by someone else.
 -	 */
 -	write_lock(&vmlist_lock);
 -	for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
 -		if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
 -			if (tmp->flags & VM_ARM_SECTION_MAPPING) {
 -				unmap_area_sections((unsigned long)tmp->addr,
 -						    tmp->size);
 -			}
 +	read_lock(&vmlist_lock);
 +	for (vm = vmlist; vm; vm = vm->next) {
 +		if (vm->addr > addr)
 +			break;
 +		if (!(vm->flags & VM_IOREMAP))
 +			continue;
 +		/* If this is a static mapping we must leave it alone */
 +		if ((vm->flags & VM_ARM_STATIC_MAPPING) &&
 +		    (vm->addr <= addr) && (vm->addr + vm->size > addr)) {
 +			read_unlock(&vmlist_lock);
 +			return;
 +		}
- #ifndef CONFIG_SMP
++#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
 +		/*
 +		 * If this is a section based mapping we need to handle it
 +		 * specially as the VM subsystem does not know how to handle
 +		 * such a beast.
 +		 */
 +		if ((vm->addr == addr) &&
 +		    (vm->flags & VM_ARM_SECTION_MAPPING)) {
 +			unmap_area_sections((unsigned long)vm->addr, vm->size);
  			break;
  		}
 -	}
 -	write_unlock(&vmlist_lock);
  #endif
 +	}
 +	read_unlock(&vmlist_lock);
  
  	vunmap(addr);
  }

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Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Russell King]

On Tue, Nov 22, 2011 at 12:03:58PM +1100, Stephen Rothwell wrote:
> diff --cc arch/arm/mm/ioremap.c
> index 12c7ad2,d1f78ba..0000000
> --- a/arch/arm/mm/ioremap.c
> +++ b/arch/arm/mm/ioremap.c
> @@@ -194,7 -208,14 +202,8 @@@ void __iomem * __arm_ioremap_pfn_caller
>   	 */
>   	if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
>   		return NULL;
> + #endif
>   
>  -	/*
>  -	 * Don't allow RAM to be mapped - this causes problems with ARMv6+
>  -	 */
>  -	if (WARN_ON(pfn_valid(pfn)))
>  -		return NULL;
>  -

This certainly is not correct - if Catalin's lpae tree is removing this
then that needs to be fixed.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:

Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

Hi Stephen,

On Tue, Nov 22, 2011 at 01:03:58AM +0000, Stephen Rothwell wrote:
> Today's linux-next merge of the arm-lpae tree got a conflict in
> arch/arm/mm/ioremap.c between commit 3afb51f744b6 ("ARM: add generic
> ioremap optimization by reusing static mappings") from the arm tree and
> commit ec93d80c4b07 ("ARM: LPAE: Page table maintenance for the 3-level
> format") from the arm-lpae tree.
> 
> I guessed (probably incorrectly) about the fix up (see below).  Please
> supply a better fix if necessary.

Thanks for pointing out. I'll have a look at the conflict and let you
know.

> More generally, is the LPAE stuff going to be merged soon?  

Hopefully I get it merged during the upcoming merging window (for
3.3-rc1) but it does not depend only on me.

> The above
> arm-lpae commit dates from February (though it was recommitted on Nov
> 15) ...

Maybe I should do a 'git rebase --ignore-date', it doesn't make much
sense for a reworked patch to still keep the original author date.

-- 
Catalin

Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

On Tue, Nov 22, 2011 at 08:13:17AM +0000, Russell King wrote:
> On Tue, Nov 22, 2011 at 12:03:58PM +1100, Stephen Rothwell wrote:
> > diff --cc arch/arm/mm/ioremap.c
> > index 12c7ad2,d1f78ba..0000000
> > --- a/arch/arm/mm/ioremap.c
> > +++ b/arch/arm/mm/ioremap.c
> > @@@ -194,7 -208,14 +202,8 @@@ void __iomem * __arm_ioremap_pfn_caller
> >   	 */
> >   	if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
> >   		return NULL;
> > + #endif
> >   
> >  -	/*
> >  -	 * Don't allow RAM to be mapped - this causes problems with ARMv6+
> >  -	 */
> >  -	if (WARN_ON(pfn_valid(pfn)))
> >  -		return NULL;
> >  -
> 
> This certainly is not correct - if Catalin's lpae tree is removing this
> then that needs to be fixed.

No, my patch just adds the #endif. The combined diff above means that
WARN_ON line above is only found in my version of ioremap.c (as my patch
doesn't touch that line). The "if (WARN_ON))" block was removed in the
"generic ioremap optimisation" patch and Stephen also removed it in the
resulting ioremap.c after fixing the conflict.

-- 
Catalin

Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

Stephen,

On Tue, Nov 22, 2011 at 01:03:58AM +0000, Stephen Rothwell wrote:
> Today's linux-next merge of the arm-lpae tree got a conflict in
> arch/arm/mm/ioremap.c between commit 3afb51f744b6 ("ARM: add generic
> ioremap optimization by reusing static mappings") from the arm tree and
> commit ec93d80c4b07 ("ARM: LPAE: Page table maintenance for the 3-level
> format") from the arm-lpae tree.
> 
> I guessed (probably incorrectly) about the fix up (see below).  Please
> supply a better fix if necessary.

The fix-up looks correct from an LPAE perspective. I cannot comment on
the correctness of Nicolas' patch, that's to be discussed on the ARM
Linux list.

Thanks.

-- 
Catalin

Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

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Hi Catalin,

On Fri, 9 Dec 2011 10:36:52 +0000 Catalin Marinas <catalin.marinas@arm.com> wrote:
>
> The fix looks correct but Russell merged the LPAE patches into his tree
> last night and sorted out the conflicts, so you can now drop my for-next
> branch from -next (I'll still keep the kmemleak one).

OK, will do.  Thanks for letting me know.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

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Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

Hi Stephen,

On Thu, Dec 08, 2011 at 12:00:59AM +0000, Stephen Rothwell wrote:
> Today's linux-next merge of the arm-lpae tree got a conflict in
> arch/arm/mm/idmap.c between commits 8903826d0cd9 ("ARM: idmap: populate
> identity map pgd at init time using .init.text") and 4e8ee7de227e ("ARM:
> SMP: use idmap_pgd for mapping MMU enable during secondary booting") from
> the arm tree and commit 1932aa1edc86 ("ARM: LPAE: Add identity mapping
> support for the 3-level page table format") from the arm-lpae tree.
> 
> I tried to fix it up (see below) and can carry the fix as necessary.

The fix looks correct but Russell merged the LPAE patches into his tree
last night and sorted out the conflicts, so you can now drop my for-next
branch from -next (I'll still keep the kmemleak one).

Thanks.

-- 
Catalin

linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

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Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/mm/idmap.c between commits 8903826d0cd9 ("ARM: idmap: populate
identity map pgd at init time using .init.text") and 4e8ee7de227e ("ARM:
SMP: use idmap_pgd for mapping MMU enable during secondary booting") from
the arm tree and commit 1932aa1edc86 ("ARM: LPAE: Add identity mapping
support for the 3-level page table format") from the arm-lpae tree.

I tried to fix it up (see below) and can carry the fix as necessary.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/mm/idmap.c
index 660f1bc,267db72..0000000
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@@ -1,13 -1,34 +1,38 @@@
  #include <linux/kernel.h>
  
  #include <asm/cputype.h>
 +#include <asm/idmap.h>
  #include <asm/pgalloc.h>
  #include <asm/pgtable.h>
 +#include <asm/sections.h>
 +
 +pgd_t *idmap_pgd;
  
+ #ifdef CONFIG_ARM_LPAE
+ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
+ 	unsigned long prot)
+ {
+ 	pmd_t *pmd;
+ 	unsigned long next;
+ 
+ 	if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
+ 		pmd = pmd_alloc_one(&init_mm, addr);
+ 		if (!pmd) {
+ 			pr_warning("Failed to allocate identity pmd.\n");
+ 			return;
+ 		}
+ 		pud_populate(&init_mm, pud, pmd);
+ 		pmd += pmd_index(addr);
+ 	} else
+ 		pmd = pmd_offset(pud, addr);
+ 
+ 	do {
+ 		next = pmd_addr_end(addr, end);
+ 		*pmd = __pmd((addr & PMD_MASK) | prot);
+ 		flush_pmd_entry(pmd);
+ 	} while (pmd++, addr = next, addr != end);
+ }
+ #else	/* !CONFIG_ARM_LPAE */
  static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
  	unsigned long prot)
  {

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linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/kernel/sleep.S between commit 805f72ef00a4 ("ARM: pm:
preallocate a page table for suspend/resume") (and later ones) from the
arm tree and commit 787dad4a57fb ("ARM: LPAE: add ISBs around MMU
enabling code") from the arm-lpae tree.

I attempted to fix it up (see below) and can carry the fix as necessary.

There are also other conflicts due to the same changes existaing in each
of these trees as different commits.  Maybe some rebase or cleanup of the
arm-lpae tree is required.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/kernel/sleep.S
index 020e99c,ecece65..0000000
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@@ -52,17 -67,35 +52,19 @@@ ENDPROC(cpu_suspend_abort
  
  /*
   * r0 = control register value
 - * r1 = v:p offset (preserved by cpu_do_resume)
 - * r2 = phys page table base
 - * r3 = L1 section flags
   */
 +	.align	5
  ENTRY(cpu_resume_mmu)
 -	adr	r4, cpu_resume_turn_mmu_on
 -	mov	r4, r4, lsr #20
 -	orr	r3, r3, r4, lsl #20
 -	ldr	r5, [r2, r4, lsl #2]	@ save old mapping
 -	str	r3, [r2, r4, lsl #2]	@ setup 1:1 mapping for mmu code
 -	sub	r2, r2, r1
  	ldr	r3, =cpu_resume_after_mmu
 -	bic	r1, r0, #CR_C		@ ensure D-cache is disabled
 -	b	cpu_resume_turn_mmu_on
 -ENDPROC(cpu_resume_mmu)
 -	.ltorg
 -	.align	5
 -cpu_resume_turn_mmu_on:
+ 	instr_sync
 -	mcr	p15, 0, r1, c1, c0, 0	@ turn on MMU, I-cache, etc
 -	mrc	p15, 0, r1, c0, c0, 0	@ read id reg
 +	mcr	p15, 0, r0, c1, c0, 0	@ turn on MMU, I-cache, etc
 +	mrc	p15, 0, r0, c0, c0, 0	@ read id reg
+ 	instr_sync
 -	mov	r1, r1
 -	mov	r1, r1
 +	mov	r0, r0
 +	mov	r0, r0
  	mov	pc, r3			@ jump to virtual address
 -ENDPROC(cpu_resume_turn_mmu_on)
 +ENDPROC(cpu_resume_mmu)
  cpu_resume_after_mmu:
 -	str	r5, [r2, r4, lsl #2]	@ restore old mapping
 -	mcr	p15, 0, r0, c1, c0, 0	@ turn on D-cache
  	bl	cpu_init		@ restore the und/abt/irq banked regs
  	mov	r0, #0			@ return zero on success
  	ldmfd	sp!, {r4 - r11, pc}

linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/include/asm/proc-fns.h between commit eca5dc2a0028 ("ARM:
6988/1: multi-cpu: remove arguments from CPU proc macros") from the arm
tree and commit 91bcc1122ff9 ("ARM: LPAE: Page table maintenance for the
3-level format") from the arm-lpae tree.

I fixed it up (see below) and can carry the fix as necessary.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/include/asm/proc-fns.h
index 633d1cb,b5db4f4..0000000
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@@ -79,16 -83,24 +83,20 @@@ extern void cpu_proc_fin(void)
  extern int cpu_do_idle(void);
  extern void cpu_dcache_clean_area(void *, int);
  extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
+ #ifdef CONFIG_ARM_LPAE
+ extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
+ #else
  extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+ #endif
  extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
  #else
 -#define cpu_proc_init()			processor._proc_init()
 -#define cpu_proc_fin()			processor._proc_fin()
 -#define cpu_reset(addr)			processor.reset(addr)
 -#define cpu_do_idle()			processor._do_idle()
 -#define cpu_dcache_clean_area(addr,sz)	processor.dcache_clean_area(addr,sz)
 -#ifdef CONFIG_ARM_LPAE
 -#define cpu_set_pte_ext(ptep,pte)	processor.set_pte_ext(ptep,pte)
 -#else
 -#define cpu_set_pte_ext(ptep,pte,ext)	processor.set_pte_ext(ptep,pte,ext)
 -#endif
 -#define cpu_do_switch_mm(pgd,mm)	processor.switch_mm(pgd,mm)
 +#define cpu_proc_init			processor._proc_init
 +#define cpu_proc_fin			processor._proc_fin
 +#define cpu_reset			processor.reset
 +#define cpu_do_idle			processor._do_idle
 +#define cpu_dcache_clean_area		processor.dcache_clean_area
 +#define cpu_set_pte_ext			processor.set_pte_ext
 +#define cpu_do_switch_mm		processor.switch_mm
  #endif
  
  extern void cpu_resume(void);

Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

Hi Stephen,

On Fri, Jun 17, 2011 at 01:26:37AM +0100, Stephen Rothwell wrote:
> Today's linux-next merge of the arm-lpae tree got a conflict in
> arch/arm/mm/dma-mapping.c between commit 8f5d638883e0 ("ARM: DMA: steal
> memory for DMA coherent mappings") from the arm tree and commit
> 7b550c77c248 ("ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*")
> from the arm-lpae tree.
> 
> The former has removed all the references to the PGDIR_* macros from this
> file, so I used that.

The fix is correct. I also did a kernel build for Versatile Express and
there were no errors.

Thanks.

-- 
Catalin

linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

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Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/mm/dma-mapping.c between commit 8f5d638883e0 ("ARM: DMA: steal
memory for DMA coherent mappings") from the arm tree and commit
7b550c77c248 ("ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*")
from the arm-lpae tree.

The former has removed all the references to the PGDIR_* macros from this
file, so I used that.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

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Re: linux-next: manual merge of the arm-lpae tree with the arm tree

[Catalin Marinas]

On Fri, Jun 10, 2011 at 01:52:55AM +0100, Stephen Rothwell wrote:
> Today's linux-next merge of the arm-lpae tree got a conflict in
> arch/arm/mm/context.c between commit 07989b7ad63a ("Revert "ARM: 6943/1:
> mm: use TTBR1 instead of reserved context ID"") from the arm tree and
> commit 21fa7e3ea279 ("ARM: LPAE: Add context switching support") from the
> arm-lpae tree.
> 
> I fixed it up (I think - see below) and can carry the fix as necessary.

Thanks for this. I replaced the conflicting commit (21fa7e4e ARM: LPAE:
Add context switching support) with an older version (prior to patch
6943/1 that Russell reverted). The cpu_set_reserved_ttbr0() is now
called cpu_set_asid() and does something different.

In my for-next branch I also included the patches that Russell pushed
via his tree to be able to solve the conflicts:

51b5dba Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"
25194f6 Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"

and I removed from my branch:

b488121 ARM: mm: fix racy ASID rollover broadcast on SMP platforms

Hopefully there shouldn't be further conflicts in tomorrow's -next tree.

-- 
Catalin

linux-next: manual merge of the arm-lpae tree with the arm tree

[Stephen Rothwell]

Hi Catalin,

Today's linux-next merge of the arm-lpae tree got a conflict in
arch/arm/mm/context.c between commit 07989b7ad63a ("Revert "ARM: 6943/1:
mm: use TTBR1 instead of reserved context ID"") from the arm tree and
commit 21fa7e3ea279 ("ARM: LPAE: Add context switching support") from the
arm-lpae tree.

I fixed it up (I think - see below) and can carry the fix as necessary.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/mm/context.c
index b0ee9ba,2dff1cf..0000000
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@@ -22,11 -22,37 +22,34 @@@ unsigned int cpu_last_asid = ASID_FIRST
  DEFINE_PER_CPU(struct mm_struct *, current_mm);
  #endif
  
+ #ifdef CONFIG_ARM_LPAE
+ static void cpu_set_reserved_ttbr0(void)
+ {
+ 	unsigned long ttbl = __pa(swapper_pg_dir);
+ 	unsigned long ttbh = 0;
+ 
+ 	/*
+ 	 * Set TTBR0 to swapper_pg_dir. Note that swapper_pg_dir only contains
+ 	 * global entries so the ASID value is not relevant.
+ 	 */
+ 	asm(
+ 	"	mcrr	p15, 0, %0, %1, c2		@ set TTBR0\n"
+ 	:
+ 	: "r" (ttbl), "r" (ttbh));
+ }
+ #else
+ static void cpu_set_reserved_ttbr0(void)
+ {
 -	u32 ttb;
 -
 -	/* Copy TTBR1 into TTBR0 */
 -	asm volatile(
 -	"	mrc	p15, 0, %0, c2, c0, 1		@ read TTBR1\n"
 -	"	mcr	p15, 0, %0, c2, c0, 0		@ set TTBR0\n"
 -	: "=r" (ttb));
++	/* set the reserved ASID before flushing the TLB */
++	asm("mcr	p15, 0, %0, c13, c0, 1\n" : : "r" (0));
+ }
+ #endif
+ 
  /*
   * We fork()ed a process, and we need a new context for the child
 - * to run in.
 + * to run in.  We reserve version 0 for initial tasks so we will
 + * always allocate an ASID. The ASID 0 is reserved for the TTBR
 + * register changing sequence.
   */
  void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
  {