linux-next.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* linux-next: manual merge of the drm-intel tree
@ 2013-10-10 16:51 Mark Brown
  0 siblings, 0 replies; 6+ messages in thread
From: Mark Brown @ 2013-10-10 16:51 UTC (permalink / raw)
  To: Jani Nikula, Ville Syrjälä,
	Dave Airlie, Paulo Zanoni, Daniel Vetter
  Cc: intel-gfx, linux-next, Thierry Reding, linux-kernel, dri-devel


[-- Attachment #1.1: Type: text/plain, Size: 2136 bytes --]

Today's linux-next merge of the drm-intel tree got additional conflicts
in drivers/gpu/drm/i915/intel_drv.h as a result of interactions between
6aba5b6cf098 (drm/i915/dp: get rid of intel_dp->link_configuration) and
various commits from Paulo Zanoni staticising functions.  I've fixed up
by changing the resolution to that below and can carry:

diff --cc drivers/gpu/drm/i915/i915_dma.c
index 637b695,df6efbf..0c86c48
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1330,9 -1333,11 +1333,11 @@@ static int i915_load_modeset_init(struc
  
  	/* Always safe in the mode setting case. */
  	/* FIXME: do pre/post-mode set stuff in core KMS code */
 -	dev->vblank_disable_allowed = 1;
 +	dev->vblank_disable_allowed = true;
- 	if (INTEL_INFO(dev)->num_pipes == 0)
+ 	if (INTEL_INFO(dev)->num_pipes == 0) {
+ 		intel_display_power_put(dev, POWER_DOMAIN_VGA);
  		return 0;
+ 	}
  
  	ret = intel_fbdev_init(dev);
  	if (ret)
@@@ -1473,7 -1480,14 +1480,7 @@@ int i915_driver_load(struct drm_device 
  	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
  		return -ENODEV;
  
- 	dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
 -	/* i915 has 4 more counters */
 -	dev->counters += 4;
 -	dev->types[6] = _DRM_STAT_IRQ;
 -	dev->types[7] = _DRM_STAT_PRIMARY;
 -	dev->types[8] = _DRM_STAT_SECONDARY;
 -	dev->types[9] = _DRM_STAT_DMA;
 -
+ 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  	if (dev_priv == NULL)
  		return -ENOMEM;
  
diff --cc drivers/gpu/drm/i915/intel_dp.c
index 98f3b64,f831464..c392ad2
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1532,8 -1558,8 +1541,8 @@@ static void intel_edp_psr_setup(struct 
  	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
  	/* Avoid continuous PSR exit by masking memup and hpd */
- 	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
+ 	I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
 -		   EDP_PSR_DEBUG_MASK_HPD);
 +		   EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
  	intel_dp->psr_setup_done = true;
  }

[-- Attachment #1.2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread
* linux-next: manual merge of the drm-intel tree
  2013-10-14 14:48 linux-next: Tree for Oct 14 Thierry Reding
@ 2013-10-14 14:48 ` Thierry Reding
  0 siblings, 0 replies; 6+ messages in thread
From: Thierry Reding @ 2013-10-14 14:48 UTC (permalink / raw)
  To: Daniel Vetter, intel-gfx, dri-devel, Ville Syrjälä
  Cc: linux-next, linux-kernel

Today's linux-next merge of the drm-intel tree got conflicts in:

	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/intel_dp.c
	drivers/gpu/drm/i915/intel_drv.h

caused by commits e1264eb (Revert "drm/i915: Delay disabling of VGA memory
until vgacon->fbcon handoff is done") and ce35255 (drm/i915: Fix unclaimed
register access due to delayed VGA memory disable).

I fixed them up (see below). Please verify that the resolution looks good.

Thanks,
Thierry
---
diff --cc drivers/gpu/drm/i915/i915_dma.c
index 24640dc,42cddc1..f240150
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1350,6 -1358,13 +1355,8 @@@ static int i915_load_modeset_init(struc
  	 */
  	intel_fbdev_initial_config(dev);
  
 -	/*
 -	 * Must do this after fbcon init so that
 -	 * vgacon_save_screen() works during the handover.
 -	 */
 -	i915_disable_vga_mem(dev);
+ 	intel_display_power_put(dev, POWER_DOMAIN_VGA);
+ 
  	/* Only enable hotplug handling once the fbdev is fully set up. */
  	dev_priv->enable_hotplug_processing = true;
  
diff --cc drivers/gpu/drm/i915/intel_display.c
index 1fdf49c,4a8a2e4..fbd028e
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -10237,8 -10388,37 +10384,10 @@@ static void i915_disable_vga(struct drm
  	POSTING_READ(vga_reg);
  }
  
 -static void i915_enable_vga_mem(struct drm_device *dev)
 -{
 -	/* Enable VGA memory on Intel HD */
 -	if (HAS_PCH_SPLIT(dev)) {
 -		vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
 -		outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
 -		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
 -						   VGA_RSRC_LEGACY_MEM |
 -						   VGA_RSRC_NORMAL_IO |
 -						   VGA_RSRC_NORMAL_MEM);
 -		vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
 -	}
 -}
 -
 -void i915_disable_vga_mem(struct drm_device *dev)
 -{
 -	/* Disable VGA memory on Intel HD */
 -	if (HAS_PCH_SPLIT(dev)) {
 -		vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
 -		outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
 -		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
 -						   VGA_RSRC_NORMAL_IO |
 -						   VGA_RSRC_NORMAL_MEM);
 -		vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
 -	}
 -}
 -
  void intel_modeset_init_hw(struct drm_device *dev)
  {
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+ 
  	intel_prepare_ddi(dev);
  
  	intel_init_clock_gating(dev);
@@@ -10510,9 -10697,10 +10666,9 @@@ void i915_redisable_vga(struct drm_devi
  	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0)
  		return;
  
- 	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
+ 	if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
  		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
  		i915_disable_vga(dev);
 -		i915_disable_vga_mem(dev);
  	}
  }
  
diff --cc drivers/gpu/drm/i915/intel_dp.c
index 98f3b64,bee09e1..c392ad2
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1532,8 -1541,8 +1541,8 @@@ static void intel_edp_psr_setup(struct 
  	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
  	/* Avoid continuous PSR exit by masking memup and hpd */
- 	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
+ 	I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
 -		   EDP_PSR_DEBUG_MASK_HPD);
 +		   EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
  	intel_dp->psr_setup_done = true;
  }
diff --cc drivers/gpu/drm/i915/intel_drv.h
index 39bfdb3,189257d..343f0fa
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@@ -714,116 -656,196 +656,197 @@@ void assert_fdi_rx_pll(struct drm_i915_
  		       enum pipe pipe, bool state);
  #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
  #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
- extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 			bool state);
+ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
  #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
  #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
+ void intel_write_eld(struct drm_encoder *encoder,
+ 		     struct drm_display_mode *mode);
+ unsigned long intel_gen4_compute_page_offset(int *x, int *y,
+ 					     unsigned int tiling_mode,
+ 					     unsigned int bpp,
+ 					     unsigned int pitch);
+ void intel_display_handle_reset(struct drm_device *dev);
+ void hsw_enable_pc8_work(struct work_struct *__work);
+ void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
+ void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
+ void intel_dp_get_m_n(struct intel_crtc *crtc,
+ 		      struct intel_crtc_config *pipe_config);
+ int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
+ void
+ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
+ 				int dotclock);
+ bool intel_crtc_active(struct drm_crtc *crtc);
+ void i915_disable_vga_mem(struct drm_device *dev);
+ void hsw_enable_ips(struct intel_crtc *crtc);
+ void hsw_disable_ips(struct intel_crtc *crtc);
+ 
+ 
+ /* intel_dp.c */
+ void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
+ bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
+ 			     struct intel_connector *intel_connector);
+ void intel_dp_start_link_train(struct intel_dp *intel_dp);
+ void intel_dp_complete_link_train(struct intel_dp *intel_dp);
+ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
+ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
+ void intel_dp_encoder_destroy(struct drm_encoder *encoder);
+ void intel_dp_check_link_status(struct intel_dp *intel_dp);
+ bool intel_dp_compute_config(struct intel_encoder *encoder,
+ 			     struct intel_crtc_config *pipe_config);
+ bool intel_dpd_is_edp(struct drm_device *dev);
+ void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
+ void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
+ void ironlake_edp_panel_on(struct intel_dp *intel_dp);
+ void ironlake_edp_panel_off(struct intel_dp *intel_dp);
+ void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
+ void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
+ void intel_edp_psr_enable(struct intel_dp *intel_dp);
+ void intel_edp_psr_disable(struct intel_dp *intel_dp);
+ void intel_edp_psr_update(struct drm_device *dev);
+ 
+ 
+ /* intel_dsi.c */
+ bool intel_dsi_init(struct drm_device *dev);
+ 
  
- extern void intel_init_clock_gating(struct drm_device *dev);
- extern void intel_suspend_hw(struct drm_device *dev);
- extern void intel_write_eld(struct drm_encoder *encoder,
- 			    struct drm_display_mode *mode);
- extern void intel_prepare_ddi(struct drm_device *dev);
- extern void hsw_fdi_link_train(struct drm_crtc *crtc);
- extern void intel_ddi_init(struct drm_device *dev, enum port port);
- extern enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
- 
- /* For use by IVB LP watermark workaround in intel_sprite.c */
- extern void intel_update_watermarks(struct drm_crtc *crtc);
- extern void intel_update_sprite_watermarks(struct drm_plane *plane,
- 					   struct drm_crtc *crtc,
- 					   uint32_t sprite_width, int pixel_size,
- 					   bool enabled, bool scaled);
- 
- extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int tiling_mode,
- 						    unsigned int bpp,
- 						    unsigned int pitch);
- 
- extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
- 				     struct drm_file *file_priv);
- extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
- 				     struct drm_file *file_priv);
- 
- /* Power-related functions, located in intel_pm.c */
- extern void intel_init_pm(struct drm_device *dev);
- /* FBC */
- extern bool intel_fbc_enabled(struct drm_device *dev);
- extern void intel_update_fbc(struct drm_device *dev);
- /* IPS */
- extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
- extern void intel_gpu_ips_teardown(void);
- 
- /* Power well */
- extern int i915_init_power_well(struct drm_device *dev);
- extern void i915_remove_power_well(struct drm_device *dev);
- 
- extern bool intel_display_power_enabled(struct drm_device *dev,
- 					enum intel_display_power_domain domain);
- extern void intel_display_power_get(struct drm_device *dev,
- 				    enum intel_display_power_domain domain);
- extern void intel_display_power_put(struct drm_device *dev,
- 				    enum intel_display_power_domain domain);
- extern void intel_init_power_well(struct drm_device *dev);
- extern void intel_set_power_well(struct drm_device *dev, bool enable);
- extern void intel_resume_power_well(struct drm_device *dev);
- extern void intel_enable_gt_powersave(struct drm_device *dev);
- extern void intel_disable_gt_powersave(struct drm_device *dev);
- extern void ironlake_teardown_rc6(struct drm_device *dev);
+ /* intel_dvo.c */
+ void intel_dvo_init(struct drm_device *dev);
+ 
+ 
+ /* legacy fbdev emulation in intel_fbdev.c */
+ #ifdef CONFIG_DRM_I915_FBDEV
+ extern int intel_fbdev_init(struct drm_device *dev);
+ extern void intel_fbdev_initial_config(struct drm_device *dev);
+ extern void intel_fbdev_fini(struct drm_device *dev);
+ extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
+ extern void intel_fbdev_output_poll_changed(struct drm_device *dev);
+ extern void intel_fbdev_restore_mode(struct drm_device *dev);
+ #else
+ static inline int intel_fbdev_init(struct drm_device *dev)
+ {
+ 	return 0;
+ }
+ 
+ static inline void intel_fbdev_initial_config(struct drm_device *dev)
+ {
+ }
+ 
+ static inline void intel_fbdev_fini(struct drm_device *dev)
+ {
+ }
+ 
+ static inline void intel_fbdev_set_suspend(struct drm_device *dev, int state)
+ {
+ }
+ 
+ static inline void intel_fbdev_restore_mode(struct drm_device *dev)
+ {
+ }
+ #endif
+ 
+ /* intel_hdmi.c */
+ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);
+ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
+ 			       struct intel_connector *intel_connector);
+ struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
+ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
+ 			       struct intel_crtc_config *pipe_config);
+ 
+ 
+ /* intel_lvds.c */
+ void intel_lvds_init(struct drm_device *dev);
+ bool intel_is_dual_link_lvds(struct drm_device *dev);
+ 
+ 
+ /* intel_modes.c */
+ int intel_connector_update_modes(struct drm_connector *connector,
+ 				 struct edid *edid);
+ int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
+ void intel_attach_force_audio_property(struct drm_connector *connector);
+ void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
+ 
+ 
+ /* intel_overlay.c */
+ void intel_setup_overlay(struct drm_device *dev);
+ void intel_cleanup_overlay(struct drm_device *dev);
+ int intel_overlay_switch_off(struct intel_overlay *overlay);
+ int intel_overlay_put_image(struct drm_device *dev, void *data,
+ 			    struct drm_file *file_priv);
+ int intel_overlay_attrs(struct drm_device *dev, void *data,
+ 			struct drm_file *file_priv);
+ 
+ 
+ /* intel_panel.c */
+ int intel_panel_init(struct intel_panel *panel,
+ 		     struct drm_display_mode *fixed_mode);
+ void intel_panel_fini(struct intel_panel *panel);
+ void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
+ 			    struct drm_display_mode *adjusted_mode);
+ void intel_pch_panel_fitting(struct intel_crtc *crtc,
+ 			     struct intel_crtc_config *pipe_config,
+ 			     int fitting_mode);
+ void intel_gmch_panel_fitting(struct intel_crtc *crtc,
+ 			      struct intel_crtc_config *pipe_config,
+ 			      int fitting_mode);
+ void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max);
+ int intel_panel_setup_backlight(struct drm_connector *connector);
+ void intel_panel_enable_backlight(struct drm_device *dev, enum pipe pipe);
+ void intel_panel_disable_backlight(struct drm_device *dev);
+ void intel_panel_destroy_backlight(struct drm_device *dev);
+ enum drm_connector_status intel_panel_detect(struct drm_device *dev);
+ 
+ 
+ /* intel_pm.c */
+ void intel_init_clock_gating(struct drm_device *dev);
+ void intel_suspend_hw(struct drm_device *dev);
+ void intel_update_watermarks(struct drm_crtc *crtc);
+ void intel_update_sprite_watermarks(struct drm_plane *plane,
+ 				    struct drm_crtc *crtc,
+ 				    uint32_t sprite_width, int pixel_size,
+ 				    bool enabled, bool scaled);
+ void intel_init_pm(struct drm_device *dev);
+ bool intel_fbc_enabled(struct drm_device *dev);
+ void intel_update_fbc(struct drm_device *dev);
+ void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
+ void intel_gpu_ips_teardown(void);
+ int i915_init_power_well(struct drm_device *dev);
+ void i915_remove_power_well(struct drm_device *dev);
+ bool intel_display_power_enabled(struct drm_device *dev,
+ 				 enum intel_display_power_domain domain);
+ void intel_display_power_get(struct drm_device *dev,
+ 			     enum intel_display_power_domain domain);
+ void intel_display_power_put(struct drm_device *dev,
+ 			     enum intel_display_power_domain domain);
+ void intel_init_power_well(struct drm_device *dev);
+ void intel_set_power_well(struct drm_device *dev, bool enable);
+ void intel_enable_gt_powersave(struct drm_device *dev);
+ void intel_disable_gt_powersave(struct drm_device *dev);
+ void ironlake_teardown_rc6(struct drm_device *dev);
  void gen6_update_ring_freq(struct drm_device *dev);
+ void gen6_rps_idle(struct drm_i915_private *dev_priv);
+ void gen6_rps_boost(struct drm_i915_private *dev_priv);
+ void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
+ void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
  
- extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
- 				   enum pipe *pipe);
- extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
- extern void intel_ddi_pll_init(struct drm_device *dev);
- extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
- extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
- 					      enum transcoder cpu_transcoder);
- extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
- extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
- extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
- extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
- extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
- extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
- extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
- extern bool
- intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
- extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
- 
- extern void intel_display_handle_reset(struct drm_device *dev);
- extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
- 						  enum pipe pipe,
- 						  bool enable);
- extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
- 						 enum transcoder pch_transcoder,
- 						 bool enable);
- 
- extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
- extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
- extern void intel_edp_psr_update(struct drm_device *dev);
- extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
- 			      bool switch_to_fclk, bool allow_power_down);
- extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
- extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
- extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
- 			       uint32_t mask);
- extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
- extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
- 			       uint32_t mask);
- extern void hsw_enable_pc8_work(struct work_struct *__work);
- extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
- extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
- extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
- extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
- extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- extern void intel_dp_get_m_n(struct intel_crtc *crtc,
- 			     struct intel_crtc_config *pipe_config);
- extern int intel_dotclock_calculate(int link_freq,
- 				    const struct intel_link_m_n *m_n);
- extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
- 					    int dotclock);
  
- extern bool intel_crtc_active(struct drm_crtc *crtc);
+ /* intel_sdvo.c */
+ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
+ 
+ 
+ /* intel_sprite.c */
+ int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
+ void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
+ 			       enum plane plane);
+ void intel_plane_restore(struct drm_plane *plane);
+ void intel_plane_disable(struct drm_plane *plane);
+ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
+ 			      struct drm_file *file_priv);
+ int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
+ 			      struct drm_file *file_priv);
+ 
++bool intel_crtc_active(struct drm_crtc *crtc);
+ 
+ /* intel_tv.c */
+ void intel_tv_init(struct drm_device *dev);
  
  #endif /* __INTEL_DRV_H__ */

^ permalink raw reply	[flat|nested] 6+ messages in thread
* linux-next: manual merge of the drm-intel tree
  2013-10-09 14:14 linux-next: Tree for Oct 9 Thierry Reding
@ 2013-10-09 14:14 ` Thierry Reding
  0 siblings, 0 replies; 6+ messages in thread
From: Thierry Reding @ 2013-10-09 14:14 UTC (permalink / raw)
  To: Daniel Vetter, Ville Syrjälä; +Cc: linux-next, linux-kernel

Today's linux-next merge of the drm-intel tree got conflicts in

	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/intel_dp.c

caused by commits 0111be4 (drm: Kill drm perf counter leftovers) and
b14c567 (drm/i915: use pointer = k[cmz...]alloc(sizeof(*pointer), ...)
pattern) as well as commits ba0bf12 (drm: Make vblank_disable_allowed
bool) and ce35255 (drm/i915: Fix unclaimed register access due to
delayed VGA memory disable).

I fixed them up (see below). Please verify that the resolution looks
good.

Thanks,
Thierry
---
diff --cc drivers/gpu/drm/i915/i915_dma.c
index 637b695,ad55c02..3316a6f
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1330,9 -1333,11 +1333,11 @@@ static int i915_load_modeset_init(struc
  
  	/* Always safe in the mode setting case. */
  	/* FIXME: do pre/post-mode set stuff in core KMS code */
 -	dev->vblank_disable_allowed = 1;
 +	dev->vblank_disable_allowed = true;
- 	if (INTEL_INFO(dev)->num_pipes == 0)
+ 	if (INTEL_INFO(dev)->num_pipes == 0) {
+ 		intel_display_power_put(dev, POWER_DOMAIN_VGA);
  		return 0;
+ 	}
  
  	ret = intel_fbdev_init(dev);
  	if (ret)
@@@ -1473,7 -1480,14 +1480,7 @@@ int i915_driver_load(struct drm_device 
  	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
  		return -ENODEV;
  
- 	dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
 -	/* i915 has 4 more counters */
 -	dev->counters += 4;
 -	dev->types[6] = _DRM_STAT_IRQ;
 -	dev->types[7] = _DRM_STAT_PRIMARY;
 -	dev->types[8] = _DRM_STAT_SECONDARY;
 -	dev->types[9] = _DRM_STAT_DMA;
 -
+ 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  	if (dev_priv == NULL)
  		return -ENOMEM;
  
diff --cc drivers/gpu/drm/i915/intel_dp.c
index bfbdbb3,c4c280c..3234552
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1549,8 -1558,8 +1558,8 @@@ static void intel_edp_psr_setup(struct 
  	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
  	/* Avoid continuous PSR exit by masking memup and hpd */
- 	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
+ 	I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
 -		   EDP_PSR_DEBUG_MASK_HPD);
 +		   EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
  	intel_dp->psr_setup_done = true;
  }

^ permalink raw reply	[flat|nested] 6+ messages in thread
* linux-next: manual merge of the drm-intel tree
  2013-10-07 15:18 linux-next: Tree for Oct 7 Thierry Reding
@ 2013-10-07 15:18 ` Thierry Reding
  0 siblings, 0 replies; 6+ messages in thread
From: Thierry Reding @ 2013-10-07 15:18 UTC (permalink / raw)
  To: Daniel Vetter, Ben Widawsky, Rodrigo Vivi; +Cc: linux-next, linux-kernel

Today's linux-next merge of the drm-intel tree got a conflict in:

	drivers/gpu/drm/i915/intel_dp.c

caused by commits 0cc4b69 (drm/i915: Mask LPSP to get PSR working even with
Power Well in use by audio.) and 18b5992 (drm/i915: Calculate PSR register
offsets from base + gen). I fixed it up (see below). Please verify that the
resolution looks correct.

Thanks,
Thierry
---
diff --cc drivers/gpu/drm/i915/intel_dp.c
index bc6579e,c4c280c..f349931
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1549,8 -1558,8 +1558,8 @@@ static void intel_edp_psr_setup(struct 
  	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
  	/* Avoid continuous PSR exit by masking memup and hpd */
- 	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
+ 	I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
 -		   EDP_PSR_DEBUG_MASK_HPD);
 +		   EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
  	intel_dp->psr_setup_done = true;
  }

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: linux-next: manual merge of the drm-intel tree
  2013-09-30 11:26 ` linux-next: manual merge of the drm-intel tree Thierry Reding
@ 2013-09-30 11:32   ` Daniel Vetter
  0 siblings, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2013-09-30 11:32 UTC (permalink / raw)
  To: Thierry Reding
  Cc: intel-gfx, linux-next, Linux Kernel Mailing List, dri-devel

On Mon, Sep 30, 2013 at 1:26 PM, Thierry Reding
<thierry.reding@gmail.com> wrote:
> Today's linux-next merge of the drm-intel tree got conflicts in
>
>         drivers/gpu/drm/i915/intel_display.c
>
> I fixed it up (see below). Please check if the resolution looks correct.

Looks good.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

^ permalink raw reply	[flat|nested] 6+ messages in thread
* linux-next: manual merge of the drm-intel tree
  2013-09-30 11:26 linux-next: manual merge of the bcon tree Thierry Reding
@ 2013-09-30 11:26 ` Thierry Reding
  2013-09-30 11:32   ` Daniel Vetter
  0 siblings, 1 reply; 6+ messages in thread
From: Thierry Reding @ 2013-09-30 11:26 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx, linux-next, linux-kernel, dri-devel

Today's linux-next merge of the drm-intel tree got conflicts in

	drivers/gpu/drm/i915/intel_display.c

I fixed it up (see below). Please check if the resolution looks correct.

Thanks,
Thierry
---
diff --cc drivers/gpu/drm/i915/intel_display.c
index e5822e7,cbbdab6..76870f0
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -4775,21 -4882,8 +4882,12 @@@ static void i9xx_set_pipeconf(struct in
  
  	pipeconf = 0;
  
 +	if (dev_priv->quirks & QUIRK_PIPEA_FORCE &&
 +	    I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE)
 +		pipeconf |= PIPECONF_ENABLE;
 +
- 	if (intel_crtc->pipe == 0 && INTEL_INFO(dev)->gen < 4) {
- 		/* Enable pixel doubling when the dot clock is > 90% of the (display)
- 		 * core speed.
- 		 *
- 		 * XXX: No double-wide on 915GM pipe B. Is that the only reason for the
- 		 * pipe == 0 check?
- 		 */
- 		if (intel_crtc->config.requested_mode.clock >
- 		    dev_priv->display.get_display_clock_speed(dev) * 9 / 10)
- 			pipeconf |= PIPECONF_DOUBLE_WIDE;
- 	}
+ 	if (intel_crtc->config.double_wide)
+ 		pipeconf |= PIPECONF_DOUBLE_WIDE;
  
  	/* only g4x and later have fancy bpc/dither controls */
  	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-10-14 14:48 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-10-10 16:51 linux-next: manual merge of the drm-intel tree Mark Brown
  -- strict thread matches above, loose matches on Subject: below --
2013-10-14 14:48 linux-next: Tree for Oct 14 Thierry Reding
2013-10-14 14:48 ` linux-next: manual merge of the drm-intel tree Thierry Reding
2013-10-09 14:14 linux-next: Tree for Oct 9 Thierry Reding
2013-10-09 14:14 ` linux-next: manual merge of the drm-intel tree Thierry Reding
2013-10-07 15:18 linux-next: Tree for Oct 7 Thierry Reding
2013-10-07 15:18 ` linux-next: manual merge of the drm-intel tree Thierry Reding
2013-09-30 11:26 linux-next: manual merge of the bcon tree Thierry Reding
2013-09-30 11:26 ` linux-next: manual merge of the drm-intel tree Thierry Reding
2013-09-30 11:32   ` Daniel Vetter

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).