linux-next: manual merge of the arm-soc tree with the arm-perf tree

linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the arm-soc tree got a conflict in
drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
code for PMU vs driver support") from the arm-perf tree and commit
13fbf3c8d0f7 ("drivers: bus: Sort Kconfig entries alphabetically") from
the arm-soc tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc drivers/bus/Kconfig
index 79e297b1f221,7e9c2674af81..000000000000
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@@ -4,6 -4,21 +4,38 @@@
  
  menu "Bus devices"
  
 -config ARM_CCI
 -	bool "ARM CCI driver support"
++config ARM_CCI400_PORT_CTRL
++	bool
+ 	depends on ARM && OF && CPU_V7
++	select ARM_CCI400_COMMON
+ 	help
 -	  Driver supporting the CCI cache coherent interconnect for ARM
 -	  platforms.
++	  Low level power management driver for CCI400 cache coherent
++	  interconnect for ARM platforms.
++
++config ARM_CCI400_PMU
++	bool "ARM CCI400 PMU support"
++	default y
++	depends on ARM || ARM64
++	depends on HW_PERF_EVENTS
++	select ARM_CCI400_COMMON
++	help
++	  Support for PMU events monitoring on the ARM CCI cache coherent
++	  interconnect.
++
++	  If unsure, say Y
++
++config ARM_CCI400_COMMON
++	bool
++	select ARM_CCI
+ 
+ config ARM_CCN
+ 	bool "ARM CCN driver support"
+ 	depends on ARM || ARM64
+ 	depends on PERF_EVENTS
+ 	help
+ 	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
+ 	  interconnect.
+ 
  config BRCMSTB_GISB_ARB
  	bool "Broadcom STB GISB bus arbiter"
  	depends on ARM || MIPS

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Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Abhilash Kesavan]

Hi Stephen,

On Mon, Mar 23, 2015 at 6:03 AM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi all,
>
> Today's linux-next merge of the arm-soc tree got a conflict in
> drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
> code for PMU vs driver support") from the arm-perf tree and commit
> 13fbf3c8d0f7 ("drivers: bus: Sort Kconfig entries alphabetically") from
> the arm-soc tree.
>
> I fixed it up (see below) and can carry the fix as necessary (no action
> is required).

Not sure if this has been reported elsewhere, but I am seeing core
boot-up failures on the exynos5420 with next-20150323 due to this.
Your conflict fix is missing the ARM_CCI symbol because of which the
CCI does not get enabled.

Suzuki, can you confirm ?

Regards,
Abhilash
>
> --
> Cheers,
> Stephen Rothwell                    sfr@canb.auug.org.au
>
> diff --cc drivers/bus/Kconfig
> index 79e297b1f221,7e9c2674af81..000000000000
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@@ -4,6 -4,21 +4,38 @@@
>
>   menu "Bus devices"
>
>  -config ARM_CCI
>  -      bool "ARM CCI driver support"
> ++config ARM_CCI400_PORT_CTRL
> ++      bool
> +       depends on ARM && OF && CPU_V7
> ++      select ARM_CCI400_COMMON
> +       help
>  -        Driver supporting the CCI cache coherent interconnect for ARM
>  -        platforms.
> ++        Low level power management driver for CCI400 cache coherent
> ++        interconnect for ARM platforms.
> ++
> ++config ARM_CCI400_PMU
> ++      bool "ARM CCI400 PMU support"
> ++      default y
> ++      depends on ARM || ARM64
> ++      depends on HW_PERF_EVENTS
> ++      select ARM_CCI400_COMMON
> ++      help
> ++        Support for PMU events monitoring on the ARM CCI cache coherent
> ++        interconnect.
> ++
> ++        If unsure, say Y
> ++
> ++config ARM_CCI400_COMMON
> ++      bool
> ++      select ARM_CCI
> +
> + config ARM_CCN
> +       bool "ARM CCN driver support"
> +       depends on ARM || ARM64
> +       depends on PERF_EVENTS
> +       help
> +         PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
> +         interconnect.
> +
>   config BRCMSTB_GISB_ARB
>         bool "Broadcom STB GISB bus arbiter"
>         depends on ARM || MIPS
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Suzuki K. Poulose]

On 23/03/15 14:41, Abhilash Kesavan wrote:
> Hi Stephen,
>
> On Mon, Mar 23, 2015 at 6:03 AM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>> Hi all,
>>
>> Today's linux-next merge of the arm-soc tree got a conflict in
>> drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
>> code for PMU vs driver support") from the arm-perf tree and commit
>> 13fbf3c8d0f7 ("drivers: bus: Sort Kconfig entries alphabetically") from
>> the arm-soc tree.
>>
>> I fixed it up (see below) and can carry the fix as necessary (no action
>> is required).
>
> Not sure if this has been reported elsewhere, but I am seeing core
> boot-up failures on the exynos5420 with next-20150323 due to this.
> Your conflict fix is missing the ARM_CCI symbol because of which the
> CCI does not get enabled.
>
> Suzuki, can you confirm ?
>

Yes, you are right. We need the config ARM_CCI even now, which enables 
the building of the arm-cci.c.

Stephen,

We need the following fix on the linux-next.

Suzuki


diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index f4213b1..e0eac5a 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -4,6 +4,9 @@

  menu "Bus devices"

+config ARM_CCI
+       bool
+
  config ARM_CCI400_PORT_CTRL
         bool
         depends on ARM && OF && CPU_V7


> Regards,
> Abhilash
>>
>> --
>> Cheers,
>> Stephen Rothwell                    sfr@canb.auug.org.au
>>
>> diff --cc drivers/bus/Kconfig
>> index 79e297b1f221,7e9c2674af81..000000000000
>> --- a/drivers/bus/Kconfig
>> +++ b/drivers/bus/Kconfig
>> @@@ -4,6 -4,21 +4,38 @@@
>>
>>    menu "Bus devices"
>>
>>   -config ARM_CCI
>>   -      bool "ARM CCI driver support"
>> ++config ARM_CCI400_PORT_CTRL
>> ++      bool
>> +       depends on ARM && OF && CPU_V7
>> ++      select ARM_CCI400_COMMON
>> +       help
>>   -        Driver supporting the CCI cache coherent interconnect for ARM
>>   -        platforms.
>> ++        Low level power management driver for CCI400 cache coherent
>> ++        interconnect for ARM platforms.
>> ++
>> ++config ARM_CCI400_PMU
>> ++      bool "ARM CCI400 PMU support"
>> ++      default y
>> ++      depends on ARM || ARM64
>> ++      depends on HW_PERF_EVENTS
>> ++      select ARM_CCI400_COMMON
>> ++      help
>> ++        Support for PMU events monitoring on the ARM CCI cache coherent
>> ++        interconnect.
>> ++
>> ++        If unsure, say Y
>> ++
>> ++config ARM_CCI400_COMMON
>> ++      bool
>> ++      select ARM_CCI
>> +
>> + config ARM_CCN
>> +       bool "ARM CCN driver support"
>> +       depends on ARM || ARM64
>> +       depends on PERF_EVENTS
>> +       help
>> +         PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
>> +         interconnect.
>> +
>>    config BRCMSTB_GISB_ARB
>>          bool "Broadcom STB GISB bus arbiter"
>>          depends on ARM || MIPS
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Stephen Rothwell]

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Hi all,

On Mon, 23 Mar 2015 15:13:51 +0000 "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> wrote:
>
> On 23/03/15 14:41, Abhilash Kesavan wrote:
> >
> > On Mon, Mar 23, 2015 at 6:03 AM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> >>
> >> Today's linux-next merge of the arm-soc tree got a conflict in
> >> drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
> >> code for PMU vs driver support") from the arm-perf tree and commit
> >> 13fbf3c8d0f7 ("drivers: bus: Sort Kconfig entries alphabetically") from
> >> the arm-soc tree.
> >>
> >> I fixed it up (see below) and can carry the fix as necessary (no action
> >> is required).
> >
> > Not sure if this has been reported elsewhere, but I am seeing core
> > boot-up failures on the exynos5420 with next-20150323 due to this.
> > Your conflict fix is missing the ARM_CCI symbol because of which the
> > CCI does not get enabled.
> >
> > Suzuki, can you confirm ?
> 
> Yes, you are right. We need the config ARM_CCI even now, which enables 
> the building of the arm-cci.c.
> 
> Stephen,
> 
> We need the following fix on the linux-next.

Oops, sorry about that.  I have fixed up the merge resolution for today
so that file starts like this:

#
# Bus Devices
#

menu "Bus devices"

config ARM_CCI
	bool

config ARM_CCI400_COMMON
	bool
	select ARM_CCI

config ARM_CCI400_PMU
	bool "ARM CCI400 PMU support"
	default y
	depends on ARM || ARM64
	depends on HW_PERF_EVENTS
	select ARM_CCI400_COMMON
	help
	  Support for PMU events monitoring on the ARM CCI cache coherent
	  interconnect.

	  If unsure, say Y

config ARM_CCI400_PORT_CTRL
	bool
	depends on ARM && OF && CPU_V7
	select ARM_CCI400_COMMON
	help
	  Low level power management driver for CCI400 cache coherent
	  interconnect for ARM platforms.

config ARM_CCN
	.
	.
	.
-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

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Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Suzuki K. Poulose]

On 23/03/15 21:16, Stephen Rothwell wrote:
> Hi all,
>
> On Mon, 23 Mar 2015 15:13:51 +0000 "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> wrote:
>>
>> On 23/03/15 14:41, Abhilash Kesavan wrote:
>>>
>>> On Mon, Mar 23, 2015 at 6:03 AM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>>>>
>>>> Today's linux-next merge of the arm-soc tree got a conflict in
>>>> drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
>>>> code for PMU vs driver support") from the arm-perf tree and commit
>>>> 13fbf3c8d0f7 ("drivers: bus: Sort Kconfig entries alphabetically") from
>>>> the arm-soc tree.
>>>>
>>>> I fixed it up (see below) and can carry the fix as necessary (no action
>>>> is required).
>>>
>>> Not sure if this has been reported elsewhere, but I am seeing core
>>> boot-up failures on the exynos5420 with next-20150323 due to this.
>>> Your conflict fix is missing the ARM_CCI symbol because of which the
>>> CCI does not get enabled.
>>>
>>> Suzuki, can you confirm ?
>>
>> Yes, you are right. We need the config ARM_CCI even now, which enables
>> the building of the arm-cci.c.
>>
>> Stephen,
>>
>> We need the following fix on the linux-next.
>
> Oops, sorry about that.  I have fixed up the merge resolution for today
> so that file starts like this:
>
> #
> # Bus Devices
> #
>
> menu "Bus devices"
>
> config ARM_CCI
> 	bool
>
> config ARM_CCI400_COMMON
> 	bool
> 	select ARM_CCI
>
> config ARM_CCI400_PMU
> 	bool "ARM CCI400 PMU support"
> 	default y
> 	depends on ARM || ARM64
> 	depends on HW_PERF_EVENTS
> 	select ARM_CCI400_COMMON
> 	help
> 	  Support for PMU events monitoring on the ARM CCI cache coherent
> 	  interconnect.
>
> 	  If unsure, say Y
>
> config ARM_CCI400_PORT_CTRL
> 	bool
> 	depends on ARM && OF && CPU_V7
> 	select ARM_CCI400_COMMON
> 	help
> 	  Low level power management driver for CCI400 cache coherent
> 	  interconnect for ARM platforms.

Looks good.

Thanks

Suzuki

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Arnd Bergmann]

On Wed, Jan 3, 2024, at 18:30, Will Deacon wrote:
> On Wed, Jan 03, 2024 at 10:03:24AM +1100, Stephen Rothwell wrote:
>>   static int armv6_map_event(struct perf_event *event)
>>   {
>>   	return armpmu_map_event(event, &armv6_perf_map,
>
> Thanks, this looks fine to me (just remove all the 11MPCore code).
>
> Arnd -- anything you need me to do in the perf tree here other than mention
> this in my pull request?

No, I think we're good here as far as I can tell.

    Arnd

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Will Deacon]

On Wed, Jan 03, 2024 at 10:03:24AM +1100, Stephen Rothwell wrote:
> Hi all,
> 
> Today's linux-next merge of the arm-soc tree got a conflict in:
> 
>   arch/arm/kernel/perf_event_v6.c
> 
> between commit:
> 
>   5cd7da19cb97 ("arm: perf: Remove PMU locking")
> 
> from the arm-perf tree and commit:
> 
>   ced296f63635 ("ARM: Delete ARM11MPCore perf leftovers")
> 
> from the arm-soc tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc arch/arm/kernel/perf_event_v6.c
> index 8fc080c9e4fb,0cbf46233d6b..000000000000
> --- a/arch/arm/kernel/perf_event_v6.c
> +++ b/arch/arm/kernel/perf_event_v6.c
> @@@ -436,35 -386,9 +373,8 @@@ static void armv6pmu_disable_event(stru
>   	val &= ~mask;
>   	val |= evt;
>   	armv6_pmcr_write(val);
>  -	raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
>   }
>   
> - static void armv6mpcore_pmu_disable_event(struct perf_event *event)
> - {
> - 	unsigned long val, mask, evt = 0;
> - 	struct hw_perf_event *hwc = &event->hw;
> - 	int idx = hwc->idx;
> - 
> - 	if (ARMV6_CYCLE_COUNTER == idx) {
> - 		mask	= ARMV6_PMCR_CCOUNT_IEN;
> - 	} else if (ARMV6_COUNTER0 == idx) {
> - 		mask	= ARMV6_PMCR_COUNT0_IEN;
> - 	} else if (ARMV6_COUNTER1 == idx) {
> - 		mask	= ARMV6_PMCR_COUNT1_IEN;
> - 	} else {
> - 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);
> - 		return;
> - 	}
> - 
> - 	/*
> - 	 * Unlike UP ARMv6, we don't have a way of stopping the counters. We
> - 	 * simply disable the interrupt reporting.
> - 	 */
> - 	val = armv6_pmcr_read();
> - 	val &= ~mask;
> - 	val |= evt;
> - 	armv6_pmcr_write(val);
> - }
> - 
>   static int armv6_map_event(struct perf_event *event)
>   {
>   	return armpmu_map_event(event, &armv6_perf_map,

Thanks, this looks fine to me (just remove all the 11MPCore code).

Arnd -- anything you need me to do in the perf tree here other than mention
this in my pull request?

Will

linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the arm-soc tree got a conflict in:

  arch/arm/kernel/perf_event_v6.c

between commit:

  5cd7da19cb97 ("arm: perf: Remove PMU locking")

from the arm-perf tree and commit:

  ced296f63635 ("ARM: Delete ARM11MPCore perf leftovers")

from the arm-soc tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/arm/kernel/perf_event_v6.c
index 8fc080c9e4fb,0cbf46233d6b..000000000000
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@@ -436,35 -386,9 +373,8 @@@ static void armv6pmu_disable_event(stru
  	val &= ~mask;
  	val |= evt;
  	armv6_pmcr_write(val);
 -	raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
  }
  
- static void armv6mpcore_pmu_disable_event(struct perf_event *event)
- {
- 	unsigned long val, mask, evt = 0;
- 	struct hw_perf_event *hwc = &event->hw;
- 	int idx = hwc->idx;
- 
- 	if (ARMV6_CYCLE_COUNTER == idx) {
- 		mask	= ARMV6_PMCR_CCOUNT_IEN;
- 	} else if (ARMV6_COUNTER0 == idx) {
- 		mask	= ARMV6_PMCR_COUNT0_IEN;
- 	} else if (ARMV6_COUNTER1 == idx) {
- 		mask	= ARMV6_PMCR_COUNT1_IEN;
- 	} else {
- 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);
- 		return;
- 	}
- 
- 	/*
- 	 * Unlike UP ARMv6, we don't have a way of stopping the counters. We
- 	 * simply disable the interrupt reporting.
- 	 */
- 	val = armv6_pmcr_read();
- 	val &= ~mask;
- 	val |= evt;
- 	armv6_pmcr_write(val);
- }
- 
  static int armv6_map_event(struct perf_event *event)
  {
  	return armpmu_map_event(event, &armv6_perf_map,

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Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Olof Johansson]

On Fri, Feb 21, 2014 at 3:09 AM, Will Deacon <will.deacon@arm.com> wrote:
> On Fri, Feb 21, 2014 at 01:02:47AM +0000, Olof Johansson wrote:
>> On Thu, Feb 20, 2014 at 4:58 PM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>> > Today's linux-next merge of the arm-soc tree got a conflict in
>> > arch/arm/boot/dts/qcom-msm8960-cdp.dts between commit a1d711938959 ("ARM:
>> > dts: msm: Add krait-pmu to platforms with Krait CPUs") from the arm-perf
>> > tree and commit cc60a1a4d47a ("ARM: dts: msm: split out msm8660 and
>> > msm8960 soc into dts include") from the arm-soc tree.
>> >
>> > I fixed it up (probably not the best way ... see below) and can carry the
>> > fix as necessary (no action is required).
>>
>> Will, I think we'll be better off taking dts changes through arm-soc,
>> unless there's a good reason to take them through other trees (such as
>> the perf tree in this case). Is there, or should we move them over?
>
> Sure, I can drop that from my tree (it came as part of the series adding
> Krait PMU support).
>
> I've included the original patch below so you can put it into arm-soc.

Thanks, I've applied it now (with the fixups to move to the dtsi).


-Olof

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Will Deacon]

On Fri, Feb 21, 2014 at 01:02:47AM +0000, Olof Johansson wrote:
> On Thu, Feb 20, 2014 at 4:58 PM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> > Today's linux-next merge of the arm-soc tree got a conflict in
> > arch/arm/boot/dts/qcom-msm8960-cdp.dts between commit a1d711938959 ("ARM:
> > dts: msm: Add krait-pmu to platforms with Krait CPUs") from the arm-perf
> > tree and commit cc60a1a4d47a ("ARM: dts: msm: split out msm8660 and
> > msm8960 soc into dts include") from the arm-soc tree.
> >
> > I fixed it up (probably not the best way ... see below) and can carry the
> > fix as necessary (no action is required).
> 
> Will, I think we'll be better off taking dts changes through arm-soc,
> unless there's a good reason to take them through other trees (such as
> the perf tree in this case). Is there, or should we move them over?

Sure, I can drop that from my tree (it came as part of the series adding
Krait PMU support).

I've included the original patch below so you can put it into arm-soc.

Cheers,

Will

--->8

commit a1d711938959935436e935ebb4ea6199bceb021d
Author: Stephen Boyd <sboyd@codeaurora.org>
Date:   Fri Feb 7 21:01:25 2014 +0000

    ARM: dts: msm: Add krait-pmu to platforms with Krait CPUs
    
    Allows us to probe the performance counters on Krait CPUs.
    
    Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
    Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
index 7c30de4fa302..66c59a6a722c 100644
--- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts
+++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
@@ -9,6 +9,12 @@
 	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
 	interrupt-parent = <&intc>;
 
+	cpu-pmu {
+		compatible = "qcom,krait-pmu";
+		interrupts = <1 10 0x304>;
+		qcom,no-pc-write;
+	};
+
 	intc: interrupt-controller@2000000 {
 		compatible = "qcom,msm-qgic2";
 		interrupt-controller;
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 9e5dadb101eb..1eff4130cde0 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -9,6 +9,11 @@
 	compatible = "qcom,msm8974";
 	interrupt-parent = <&intc>;
 
+	cpu-pmu {
+		compatible = "qcom,krait-pmu";
+		interrupts = <1 7 0xf04>;
+	};
+
 	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Stephen Boyd]

On 02/20/14 16:58, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the arm-soc tree got a conflict in
> arch/arm/boot/dts/qcom-msm8960-cdp.dts between commit a1d711938959 ("ARM:
> dts: msm: Add krait-pmu to platforms with Krait CPUs") from the arm-perf
> tree and commit cc60a1a4d47a ("ARM: dts: msm: split out msm8660 and
> msm8960 soc into dts include") from the arm-soc tree.
>
> I fixed it up (probably not the best way ... see below) and can carry the
> fix as necessary (no action is required).
>

It's good enough to be correct, but it would be better if the pmu node
went into the arch/arm/boot/dts/qcom-msm8960.dtsi file in the arm-soc tree.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Olof Johansson]

On Thu, Feb 20, 2014 at 4:58 PM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi all,
>
> Today's linux-next merge of the arm-soc tree got a conflict in
> arch/arm/boot/dts/qcom-msm8960-cdp.dts between commit a1d711938959 ("ARM:
> dts: msm: Add krait-pmu to platforms with Krait CPUs") from the arm-perf
> tree and commit cc60a1a4d47a ("ARM: dts: msm: split out msm8660 and
> msm8960 soc into dts include") from the arm-soc tree.
>
> I fixed it up (probably not the best way ... see below) and can carry the
> fix as necessary (no action is required).

Will, I think we'll be better off taking dts changes through arm-soc,
unless there's a good reason to take them through other trees (such as
the perf tree in this case). Is there, or should we move them over?


-Olof

linux-next: manual merge of the arm-soc tree with the arm-perf tree

[Stephen Rothwell]

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Hi all,

Today's linux-next merge of the arm-soc tree got a conflict in
arch/arm/boot/dts/qcom-msm8960-cdp.dts between commit a1d711938959 ("ARM:
dts: msm: Add krait-pmu to platforms with Krait CPUs") from the arm-perf
tree and commit cc60a1a4d47a ("ARM: dts: msm: split out msm8660 and
msm8960 soc into dts include") from the arm-soc tree.

I fixed it up (probably not the best way ... see below) and can carry the
fix as necessary (no action is required).

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

diff --cc arch/arm/boot/dts/qcom-msm8960-cdp.dts
index 66c59a6a722c,a58fb88315f6..000000000000
--- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts
+++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
@@@ -7,70 -3,4 +3,10 @@@
  / {
  	model = "Qualcomm MSM8960 CDP";
  	compatible = "qcom,msm8960-cdp", "qcom,msm8960";
- 	interrupt-parent = <&intc>;
 +
 +	cpu-pmu {
 +		compatible = "qcom,krait-pmu";
 +		interrupts = <1 10 0x304>;
 +		qcom,no-pc-write;
 +	};
- 
- 	intc: interrupt-controller@2000000 {
- 		compatible = "qcom,msm-qgic2";
- 		interrupt-controller;
- 		#interrupt-cells = <3>;
- 		reg = < 0x02000000 0x1000 >,
- 		      < 0x02002000 0x1000 >;
- 	};
- 
- 	timer@200a000 {
- 		compatible = "qcom,kpss-timer", "qcom,msm-timer";
- 		interrupts = <1 1 0x301>,
- 			     <1 2 0x301>,
- 			     <1 3 0x301>;
- 		reg = <0x0200a000 0x100>;
- 		clock-frequency = <27000000>,
- 				  <32768>;
- 		cpu-offset = <0x80000>;
- 	};
- 
- 	msmgpio: gpio@800000 {
- 		compatible = "qcom,msm-gpio";
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpio = <150>;
- 		interrupts = <0 16 0x4>;
- 		interrupt-controller;
- 		#interrupt-cells = <2>;
- 		reg = <0x800000 0x4000>;
- 	};
- 
- 	gcc: clock-controller@900000 {
- 		compatible = "qcom,gcc-msm8960";
- 		#clock-cells = <1>;
- 		#reset-cells = <1>;
- 		reg = <0x900000 0x4000>;
- 	};
- 
- 	clock-controller@4000000 {
- 		compatible = "qcom,mmcc-msm8960";
- 		reg = <0x4000000 0x1000>;
- 		#clock-cells = <1>;
- 		#reset-cells = <1>;
- 	};
- 
- 	serial@16440000 {
- 		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
- 		reg = <0x16440000 0x1000>,
- 		      <0x16400000 0x1000>;
- 		interrupts = <0 154 0x0>;
- 		clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
- 		clock-names = "core", "iface";
- 	};
- 
- 	qcom,ssbi@500000 {
- 		compatible = "qcom,ssbi";
- 		reg = <0x500000 0x1000>;
- 		qcom,controller-type = "pmic-arbiter";
- 	};
  };

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