* [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above.
@ 2020-05-19 5:54 Aneesh Kumar K.V
2020-05-19 5:54 ` [PATCH v3 2/7] powerpc/pmem: Add new instructions for persistent storage and sync Aneesh Kumar K.V
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Aneesh Kumar K.V @ 2020-05-19 5:54 UTC (permalink / raw)
To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V
The PAPR based virtualized persistent memory devices are only supported on
POWER9 and above. In the followup patch, the kernel will switch the persistent
memory cache flush functions to use a new `dcbf` variant instruction. The new
instructions even though added in ISA 3.1 works even on P8 and P9 because these
are implemented as a variant of existing `dcbf` and `hwsync` and on P8 and
above behaves as such.
Considering these devices are only supported on P8 and above, update the driver
to prevent a P7-compat guest from using persistent memory devices.
We don't update of_pmem driver with the same condition, because, on bare-metal,
the firmware enables pmem support only on P9 and above. There the kernel depends
on OPAL firmware to restrict exposing persistent memory related device tree
entries on older hardware. of_pmem.ko is written without any arch dependency and
we don't want to add ppc64 specific cpu feature check in of_pmem driver.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/platforms/pseries/pmem.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/pmem.c b/arch/powerpc/platforms/pseries/pmem.c
index f860a897a9e0..2347e1038f58 100644
--- a/arch/powerpc/platforms/pseries/pmem.c
+++ b/arch/powerpc/platforms/pseries/pmem.c
@@ -147,6 +147,12 @@ const struct of_device_id drc_pmem_match[] = {
static int pseries_pmem_init(void)
{
+ /*
+ * Only supported on POWER8 and above.
+ */
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+ return 0;
+
pmem_node = of_find_node_by_type(NULL, "ibm,persistent-memory");
if (!pmem_node)
return 0;
--
2.26.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 2/7] powerpc/pmem: Add new instructions for persistent storage and sync 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V @ 2020-05-19 5:54 ` Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction Aneesh Kumar K.V ` (4 subsequent siblings) 5 siblings, 0 replies; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:54 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V POWER10 introduces two new variants of dcbf instructions (dcbstps and dcbfps) that can be used to write modified locations back to persistent storage. Additionally, POWER10 also introduce phwsync and plwsync which can be used to establish order of these writes to persistent storage. This patch exposes these instructions to the rest of the kernel. The existing dcbf and hwsync instructions in P8 and P9 are adequate to enable appropriate synchronization with OpenCAPI-hosted persistent storage. Hence the new instructions are added as a variant of the old ones that old hardware won't differentiate. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/include/asm/ppc-opcode.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index c1df75edde44..45eccd842f84 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -216,6 +216,8 @@ #define PPC_INST_STWCX 0x7c00012d #define PPC_INST_LWSYNC 0x7c2004ac #define PPC_INST_SYNC 0x7c0004ac +#define PPC_INST_PHWSYNC 0x7c8004ac +#define PPC_INST_PLWSYNC 0x7ca004ac #define PPC_INST_SYNC_MASK 0xfc0007fe #define PPC_INST_ISYNC 0x4c00012c #define PPC_INST_LXVD2X 0x7c000698 @@ -281,6 +283,8 @@ #define PPC_INST_TABORT 0x7c00071d #define PPC_INST_TSR 0x7c0005dd +#define PPC_INST_DCBF 0x7c0000ac + #define PPC_INST_NAP 0x4c000364 #define PPC_INST_SLEEP 0x4c0003a4 #define PPC_INST_WINKLE 0x4c0003e4 @@ -529,6 +533,14 @@ #define STBCIX(s,a,b) stringify_in_c(.long PPC_INST_STBCIX | \ __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b)) +#define PPC_DCBFPS(a, b) stringify_in_c(.long PPC_INST_DCBF | \ + ___PPC_RA(a) | ___PPC_RB(b) | (4 << 21)) +#define PPC_DCBSTPS(a, b) stringify_in_c(.long PPC_INST_DCBF | \ + ___PPC_RA(a) | ___PPC_RB(b) | (6 << 21)) + +#define PPC_PHWSYNC stringify_in_c(.long PPC_INST_PHWSYNC) +#define PPC_PLWSYNC stringify_in_c(.long PPC_INST_PLWSYNC) + /* * Define what the VSX XX1 form instructions will look like, then add * the 128 bit load store instructions based on that. -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 2/7] powerpc/pmem: Add new instructions for persistent storage and sync Aneesh Kumar K.V @ 2020-05-19 5:54 ` Aneesh Kumar K.V 2020-05-30 0:47 ` kbuild test robot 2020-05-19 5:54 ` [PATCH v3 4/7] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier Aneesh Kumar K.V ` (3 subsequent siblings) 5 siblings, 1 reply; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:54 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V Start using dcbstps; phwsync; sequence for flushing persistent memory range. The new instructions are implemented as a variant of dcbf and hwsync and on P8 and P9 they will be executed as those instructions. We avoid using them on older hardware. This helps to avoid difficult to debug bugs. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/lib/pmem.c | 50 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/lib/pmem.c b/arch/powerpc/lib/pmem.c index 0666a8d29596..5a61aaeb6930 100644 --- a/arch/powerpc/lib/pmem.c +++ b/arch/powerpc/lib/pmem.c @@ -9,20 +9,62 @@ #include <asm/cacheflush.h> +static inline void __clean_pmem_range(unsigned long start, unsigned long stop) +{ + unsigned long shift = l1_dcache_shift(); + unsigned long bytes = l1_dcache_bytes(); + void *addr = (void *)(start & ~(bytes - 1)); + unsigned long size = stop - (unsigned long)addr + (bytes - 1); + unsigned long i; + + for (i = 0; i < size >> shift; i++, addr += bytes) + asm volatile(PPC_DCBSTPS(%0, %1): :"i"(0), "r"(addr): "memory"); + + + asm volatile(PPC_PHWSYNC ::: "memory"); +} + +static inline void __flush_pmem_range(unsigned long start, unsigned long stop) +{ + unsigned long shift = l1_dcache_shift(); + unsigned long bytes = l1_dcache_bytes(); + void *addr = (void *)(start & ~(bytes - 1)); + unsigned long size = stop - (unsigned long)addr + (bytes - 1); + unsigned long i; + + for (i = 0; i < size >> shift; i++, addr += bytes) + asm volatile(PPC_DCBFPS(%0, %1): :"i"(0), "r"(addr): "memory"); + + + asm volatile(PPC_PHWSYNC ::: "memory"); +} + +static inline void clean_pmem_range(unsigned long start, unsigned long stop) +{ + if (cpu_has_feature(CPU_FTR_ARCH_207S)) + return __clean_pmem_range(start, stop); +} + +static inline void flush_pmem_range(unsigned long start, unsigned long stop) +{ + if (cpu_has_feature(CPU_FTR_ARCH_207S)) + return __flush_pmem_range(start, stop); +} + /* * CONFIG_ARCH_HAS_PMEM_API symbols */ void arch_wb_cache_pmem(void *addr, size_t size) { unsigned long start = (unsigned long) addr; - flush_dcache_range(start, start + size); + clean_pmem_range(start, start + size); } EXPORT_SYMBOL_GPL(arch_wb_cache_pmem); void arch_invalidate_pmem(void *addr, size_t size) { unsigned long start = (unsigned long) addr; - flush_dcache_range(start, start + size); + flush_pmem_range(start, start + size); } EXPORT_SYMBOL_GPL(arch_invalidate_pmem); @@ -35,7 +77,7 @@ long __copy_from_user_flushcache(void *dest, const void __user *src, unsigned long copied, start = (unsigned long) dest; copied = __copy_from_user(dest, src, size); - flush_dcache_range(start, start + size); + clean_pmem_range(start, start + size); return copied; } @@ -45,7 +87,7 @@ void *memcpy_flushcache(void *dest, const void *src, size_t size) unsigned long start = (unsigned long) dest; memcpy(dest, src, size); - flush_dcache_range(start, start + size); + clean_pmem_range(start, start + size); return dest; } -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction 2020-05-19 5:54 ` [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction Aneesh Kumar K.V @ 2020-05-30 0:47 ` kbuild test robot 0 siblings, 0 replies; 9+ messages in thread From: kbuild test robot @ 2020-05-30 0:47 UTC (permalink / raw) To: Aneesh Kumar K.V, linuxppc-dev, mpe, linux-nvdimm Cc: kbuild-all, clang-built-linux, alistair, Aneesh Kumar K.V Hi "Aneesh, I love your patch! Yet something to improve: [auto build test ERROR on powerpc/next] [also build test ERROR on v5.7-rc7 next-20200529] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/powerpc-pmem-Restrict-papr_scm-to-P8-and-above/20200519-195350 base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next config: powerpc-randconfig-r016-20200529 (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 2d068e534f1671459e1b135852c1b3c10502e929) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>, old ones prefixed by <<): >> arch/powerpc/lib/pmem.c:44:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/lib/pmem.c:44:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ arch/powerpc/lib/pmem.c:50:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/lib/pmem.c:57:6: warning: no previous prototype for function 'arch_wb_cache_pmem' [-Wmissing-prototypes] void arch_wb_cache_pmem(void *addr, size_t size) ^ arch/powerpc/lib/pmem.c:57:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void arch_wb_cache_pmem(void *addr, size_t size) ^ static arch/powerpc/lib/pmem.c:64:6: warning: no previous prototype for function 'arch_invalidate_pmem' [-Wmissing-prototypes] void arch_invalidate_pmem(void *addr, size_t size) ^ arch/powerpc/lib/pmem.c:64:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void arch_invalidate_pmem(void *addr, size_t size) ^ static 2 warnings and 2 errors generated. vim +/cpu_has_feature +44 arch/powerpc/lib/pmem.c 41 42 static inline void clean_pmem_range(unsigned long start, unsigned long stop) 43 { > 44 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 45 return __clean_pmem_range(start, stop); 46 } 47 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 4/7] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 2/7] powerpc/pmem: Add new instructions for persistent storage and sync Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction Aneesh Kumar K.V @ 2020-05-19 5:54 ` Aneesh Kumar K.V 2020-05-19 5:55 ` [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction Aneesh Kumar K.V ` (2 subsequent siblings) 5 siblings, 0 replies; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:54 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V Architectures like ppc64 provide persistent memory specific barriers that will ensure that all stores for which the modifications are written to persistent storage by preceding dcbfps and dcbstps instructions have updated persistent storage before any data access or data transfer caused by subsequent instructions is initiated. This is in addition to the ordering done by wmb() Update nvdimm core such that architecture can use barriers other than wmb to ensure all previous writes are architecturally visible for the platform buffer flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- drivers/nvdimm/region_devs.c | 8 ++++---- include/linux/libnvdimm.h | 4 ++++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c index ccbb5b43b8b2..88ea34a9c7fd 100644 --- a/drivers/nvdimm/region_devs.c +++ b/drivers/nvdimm/region_devs.c @@ -1216,13 +1216,13 @@ int generic_nvdimm_flush(struct nd_region *nd_region) idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8)); /* - * The first wmb() is needed to 'sfence' all previous writes - * such that they are architecturally visible for the platform - * buffer flush. Note that we've already arranged for pmem + * The first arch_pmem_flush_barrier() is needed to 'sfence' all + * previous writes such that they are architecturally visible for + * the platform buffer flush. Note that we've already arranged for pmem * writes to avoid the cache via memcpy_flushcache(). The final * wmb() ensures ordering for the NVDIMM flush write. */ - wmb(); + arch_pmem_flush_barrier(); for (i = 0; i < nd_region->ndr_mappings; i++) if (ndrd_get_flush_wpq(ndrd, i, 0)) writeq(1, ndrd_get_flush_wpq(ndrd, i, idx)); diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index 18da4059be09..66f6c65bd789 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -286,4 +286,8 @@ static inline void arch_invalidate_pmem(void *addr, size_t size) } #endif +#ifndef arch_pmem_flush_barrier +#define arch_pmem_flush_barrier() wmb() +#endif + #endif /* __LIBNVDIMM_H__ */ -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction. 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V ` (2 preceding siblings ...) 2020-05-19 5:54 ` [PATCH v3 4/7] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier Aneesh Kumar K.V @ 2020-05-19 5:55 ` Aneesh Kumar K.V 2020-05-30 3:08 ` kbuild test robot 2020-05-19 5:55 ` [PATCH v3 6/7] powerpc/pmem: Avoid the barrier in flush routines Aneesh Kumar K.V 2020-05-19 5:55 ` [PATCH v3 7/7] powerpc/book3s/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions Aneesh Kumar K.V 5 siblings, 1 reply; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:55 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V of_pmem on POWER10 can now use phwsync instead of hwsync to ensure all previous writes are architecturally visible for the platform buffer flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/include/asm/cacheflush.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index e92191b390f3..bc3ea009cf14 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h @@ -119,6 +119,13 @@ static inline void invalidate_dcache_range(unsigned long start, #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) + +#define arch_pmem_flush_barrier arch_pmem_flush_barrier +static inline void arch_pmem_flush_barrier(void) +{ + if (cpu_has_feature(CPU_FTR_ARCH_207S)) + asm volatile(PPC_PHWSYNC ::: "memory"); +} #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_CACHEFLUSH_H */ -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction. 2020-05-19 5:55 ` [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction Aneesh Kumar K.V @ 2020-05-30 3:08 ` kbuild test robot 0 siblings, 0 replies; 9+ messages in thread From: kbuild test robot @ 2020-05-30 3:08 UTC (permalink / raw) To: Aneesh Kumar K.V, linuxppc-dev, mpe, linux-nvdimm Cc: kbuild-all, clang-built-linux, alistair, Aneesh Kumar K.V Hi "Aneesh, I love your patch! Yet something to improve: [auto build test ERROR on powerpc/next] [also build test ERROR on v5.7-rc7] [cannot apply to next-20200529] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/powerpc-pmem-Restrict-papr_scm-to-P8-and-above/20200519-195350 base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next config: powerpc-randconfig-r016-20200529 (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 2d068e534f1671459e1b135852c1b3c10502e929) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>, old ones prefixed by <<): In file included from arch/powerpc/kernel/syscall_64.c:4: In file included from arch/powerpc/include/asm/asm-prototypes.h:12: >> arch/powerpc/include/asm/cacheflush.h:126:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ In file included from arch/powerpc/kernel/syscall_64.c:4: In file included from arch/powerpc/include/asm/asm-prototypes.h:17: In file included from arch/powerpc/include/asm/mmu_context.h:12: In file included from arch/powerpc/include/asm/cputhreads.h:7: >> arch/powerpc/include/asm/cpu_has_feature.h:49:20: error: static declaration of 'cpu_has_feature' follows non-static declaration static inline bool cpu_has_feature(unsigned long feature) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: previous implicit declaration is here if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ 2 errors generated. -- In file included from arch/powerpc/kernel/kprobes.c:23: >> arch/powerpc/include/asm/cacheflush.h:126:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ 1 error generated. -- In file included from arch/powerpc/kernel/optprobes.c:15: >> arch/powerpc/include/asm/cacheflush.h:126:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ arch/powerpc/kernel/optprobes.c:149:6: warning: no previous prototype for function 'patch_imm32_load_insns' [-Wmissing-prototypes] void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr) ^ arch/powerpc/kernel/optprobes.c:149:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr) ^ static arch/powerpc/kernel/optprobes.c:167:6: warning: no previous prototype for function 'patch_imm64_load_insns' [-Wmissing-prototypes] void patch_imm64_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr) ^ arch/powerpc/kernel/optprobes.c:167:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void patch_imm64_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr) ^ static 2 warnings and 1 error generated. -- In file included from arch/powerpc/kernel/epapr_paravirt.c:11: >> arch/powerpc/include/asm/cacheflush.h:126:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:33: In file included from arch/powerpc/include/asm/delay.h:7: In file included from arch/powerpc/include/asm/time.h:17: >> arch/powerpc/include/asm/cpu_has_feature.h:49:20: error: static declaration of 'cpu_has_feature' follows non-static declaration static inline bool cpu_has_feature(unsigned long feature) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: previous implicit declaration is here if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:23:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:593:9: note: expanded from macro 'DEF_PCI_AC_RET' return __do_##name al; ^~~~~~~~~~~~~~ <scratch space>:32:1: note: expanded from here __do_inb ^ arch/powerpc/include/asm/io.h:524:53: note: expanded from macro '__do_inb' #define __do_inb(port) readb((PCI_IO_ADDR)_IO_BASE + port); ~~~~~~~~~~~~~~~~~~~~~ ^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:24:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:593:9: note: expanded from macro 'DEF_PCI_AC_RET' return __do_##name al; ^~~~~~~~~~~~~~ <scratch space>:34:1: note: expanded from here __do_inw ^ arch/powerpc/include/asm/io.h:525:53: note: expanded from macro '__do_inw' #define __do_inw(port) readw((PCI_IO_ADDR)_IO_BASE + port); ~~~~~~~~~~~~~~~~~~~~~ ^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:25:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:593:9: note: expanded from macro 'DEF_PCI_AC_RET' return __do_##name al; ^~~~~~~~~~~~~~ <scratch space>:36:1: note: expanded from here __do_inl ^ arch/powerpc/include/asm/io.h:526:53: note: expanded from macro '__do_inl' #define __do_inl(port) readl((PCI_IO_ADDR)_IO_BASE + port); ~~~~~~~~~~~~~~~~~~~~~ ^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:26:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:602:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; ^~~~~~~~~~~~~~ <scratch space>:38:1: note: expanded from here __do_outb ^ arch/powerpc/include/asm/io.h:521:62: note: expanded from macro '__do_outb' #define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)_IO_BASE+port); ~~~~~~~~~~~~~~~~~~~~~^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:27:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:602:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; ^~~~~~~~~~~~~~ <scratch space>:40:1: note: expanded from here __do_outw ^ arch/powerpc/include/asm/io.h:522:62: note: expanded from macro '__do_outw' #define __do_outw(val, port) writew(val,(PCI_IO_ADDR)_IO_BASE+port); ~~~~~~~~~~~~~~~~~~~~~^ In file included from arch/powerpc/kernel/epapr_paravirt.c:13: In file included from arch/powerpc/include/asm/machdep.h:8: In file included from include/linux/dma-mapping.h:11: In file included from include/linux/scatterlist.h:9: In file included from arch/powerpc/include/asm/io.h:605: arch/powerpc/include/asm/io-defs.h:28:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port), pio, port) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/include/asm/io.h:602:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; -- In file included from arch/powerpc/lib/pmem.c:10: >> arch/powerpc/include/asm/cacheflush.h:126:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/include/asm/cacheflush.h:126:6: note: did you mean 'mmu_has_feature'? arch/powerpc/include/asm/mmu.h:234:20: note: 'mmu_has_feature' declared here static inline bool mmu_has_feature(unsigned long feature) ^ arch/powerpc/lib/pmem.c:44:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/lib/pmem.c:50:6: error: implicit declaration of function 'cpu_has_feature' [-Werror,-Wimplicit-function-declaration] if (cpu_has_feature(CPU_FTR_ARCH_207S)) ^ arch/powerpc/lib/pmem.c:57:6: warning: no previous prototype for function 'arch_wb_cache_pmem' [-Wmissing-prototypes] void arch_wb_cache_pmem(void *addr, size_t size) ^ arch/powerpc/lib/pmem.c:57:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void arch_wb_cache_pmem(void *addr, size_t size) ^ static arch/powerpc/lib/pmem.c:64:6: warning: no previous prototype for function 'arch_invalidate_pmem' [-Wmissing-prototypes] void arch_invalidate_pmem(void *addr, size_t size) ^ arch/powerpc/lib/pmem.c:64:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void arch_invalidate_pmem(void *addr, size_t size) ^ static 2 warnings and 3 errors generated. vim +/cpu_has_feature +126 arch/powerpc/include/asm/cacheflush.h 113 114 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 115 do { \ 116 memcpy(dst, src, len); \ 117 flush_icache_user_range(vma, page, vaddr, len); \ 118 } while (0) 119 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 120 memcpy(dst, src, len) 121 122 123 #define arch_pmem_flush_barrier arch_pmem_flush_barrier 124 static inline void arch_pmem_flush_barrier(void) 125 { > 126 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 127 asm volatile(PPC_PHWSYNC ::: "memory"); 128 } 129 #endif /* __KERNEL__ */ 130 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 6/7] powerpc/pmem: Avoid the barrier in flush routines 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V ` (3 preceding siblings ...) 2020-05-19 5:55 ` [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction Aneesh Kumar K.V @ 2020-05-19 5:55 ` Aneesh Kumar K.V 2020-05-19 5:55 ` [PATCH v3 7/7] powerpc/book3s/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions Aneesh Kumar K.V 5 siblings, 0 replies; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:55 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V nvdimm expect the flush routines to just mark the cache clean. The barrier that mark the store globally visible is done in nvdimm_flush(). Update the papr_scm driver to a simplified nvdim_flush callback that do only the required barrier. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/lib/pmem.c | 6 ------ arch/powerpc/platforms/pseries/papr_scm.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/lib/pmem.c b/arch/powerpc/lib/pmem.c index 5a61aaeb6930..21210fa676e5 100644 --- a/arch/powerpc/lib/pmem.c +++ b/arch/powerpc/lib/pmem.c @@ -19,9 +19,6 @@ static inline void __clean_pmem_range(unsigned long start, unsigned long stop) for (i = 0; i < size >> shift; i++, addr += bytes) asm volatile(PPC_DCBSTPS(%0, %1): :"i"(0), "r"(addr): "memory"); - - - asm volatile(PPC_PHWSYNC ::: "memory"); } static inline void __flush_pmem_range(unsigned long start, unsigned long stop) @@ -34,9 +31,6 @@ static inline void __flush_pmem_range(unsigned long start, unsigned long stop) for (i = 0; i < size >> shift; i++, addr += bytes) asm volatile(PPC_DCBFPS(%0, %1): :"i"(0), "r"(addr): "memory"); - - - asm volatile(PPC_PHWSYNC ::: "memory"); } static inline void clean_pmem_range(unsigned long start, unsigned long stop) diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c index f35592423380..ad506e7003c9 100644 --- a/arch/powerpc/platforms/pseries/papr_scm.c +++ b/arch/powerpc/platforms/pseries/papr_scm.c @@ -285,6 +285,18 @@ static int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc, return 0; } +/* + * We have made sure the pmem writes are done such that before calling this + * all the caches are flushed/clean. We use dcbf/dcbfps to ensure this. Here + * we just need to add the necessary barrier to make sure the above flushes + * are have updated persistent storage before any data access or data transfer + * caused by subsequent instructions is initiated. + */ +static int papr_scm_flush_sync(struct nd_region *nd_region, struct bio *bio) +{ + arch_pmem_flush_barrier(); + return 0; +} static int papr_scm_nvdimm_init(struct papr_scm_priv *p) { @@ -340,6 +352,7 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) ndr_desc.mapping = &mapping; ndr_desc.num_mappings = 1; ndr_desc.nd_set = &p->nd_set; + ndr_desc.flush = papr_scm_flush_sync; if (p->is_volatile) p->region = nvdimm_volatile_region_create(p->bus, &ndr_desc); -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 7/7] powerpc/book3s/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions. 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V ` (4 preceding siblings ...) 2020-05-19 5:55 ` [PATCH v3 6/7] powerpc/pmem: Avoid the barrier in flush routines Aneesh Kumar K.V @ 2020-05-19 5:55 ` Aneesh Kumar K.V 5 siblings, 0 replies; 9+ messages in thread From: Aneesh Kumar K.V @ 2020-05-19 5:55 UTC (permalink / raw) To: linuxppc-dev, mpe, linux-nvdimm; +Cc: alistair, Aneesh Kumar K.V We only support persistent memory on P8 and above. This is enforced by the firmware and further checked on virtualzied platform during platform init. Add WARN_ONCE in pmem flush routines to catch the wrong usage of these. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- arch/powerpc/include/asm/cacheflush.h | 2 ++ arch/powerpc/lib/pmem.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index bc3ea009cf14..865fae8a226e 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h @@ -125,6 +125,8 @@ static inline void arch_pmem_flush_barrier(void) { if (cpu_has_feature(CPU_FTR_ARCH_207S)) asm volatile(PPC_PHWSYNC ::: "memory"); + else + WARN_ONCE(1, "Using pmem flush on older hardware."); } #endif /* __KERNEL__ */ diff --git a/arch/powerpc/lib/pmem.c b/arch/powerpc/lib/pmem.c index 21210fa676e5..f40bd908d28d 100644 --- a/arch/powerpc/lib/pmem.c +++ b/arch/powerpc/lib/pmem.c @@ -37,12 +37,14 @@ static inline void clean_pmem_range(unsigned long start, unsigned long stop) { if (cpu_has_feature(CPU_FTR_ARCH_207S)) return __clean_pmem_range(start, stop); + WARN_ONCE(1, "Using pmem flush on older hardware."); } static inline void flush_pmem_range(unsigned long start, unsigned long stop) { if (cpu_has_feature(CPU_FTR_ARCH_207S)) return __flush_pmem_range(start, stop); + WARN_ONCE(1, "Using pmem flush on older hardware."); } /* -- 2.26.2 _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-05-30 3:09 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-05-19 5:54 [PATCH v3 1/7] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 2/7] powerpc/pmem: Add new instructions for persistent storage and sync Aneesh Kumar K.V 2020-05-19 5:54 ` [PATCH v3 3/7] powerpc/pmem: Add flush routines using new pmem store and sync instruction Aneesh Kumar K.V 2020-05-30 0:47 ` kbuild test robot 2020-05-19 5:54 ` [PATCH v3 4/7] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier Aneesh Kumar K.V 2020-05-19 5:55 ` [PATCH v3 5/7] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction Aneesh Kumar K.V 2020-05-30 3:08 ` kbuild test robot 2020-05-19 5:55 ` [PATCH v3 6/7] powerpc/pmem: Avoid the barrier in flush routines Aneesh Kumar K.V 2020-05-19 5:55 ` [PATCH v3 7/7] powerpc/book3s/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions Aneesh Kumar K.V
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