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* Re: [dm-devel] [PATCH 2/2] dm-writecache
       [not found] <alpine.LRH.2.02.1711222135371.2330@file01.intranet.prod.int.rdu2.redhat.com>
@ 2017-11-23  8:29 ` Christoph Hellwig
  2017-11-23 16:29   ` Dan Williams
  0 siblings, 1 reply; 3+ messages in thread
From: Christoph Hellwig @ 2017-11-23  8:29 UTC (permalink / raw)
  To: Mikulas Patocka; +Cc: dm-devel, Mike Snitzer, linux-nvdimm

> +/*
> + * The clflushopt instruction is very slow on Broadwell, so we use non-temporal
> + * stores instead.
> + */
> +#ifdef CONFIG_X86_64
> +#define NT_STORE(dest, src)	asm ("movnti %1, %0" : "=m"(dest) : "r"(src))
> +#define FLUSH_RANGE(dax, ptr, size)  do { } while (0)
> +#define COMMIT_FLUSHED()	wmb()
> +#else
> +#define NT_STORE(dest, src)	ACCESS_ONCE(dest) = (src)
> +#define FLUSH_RANGE		dax_flush
> +#define COMMIT_FLUSHED()	do { } while (0)
> +#endif

Please go through the proper pmem APIs.
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dm-devel] [PATCH 2/2] dm-writecache
  2017-11-23  8:29 ` [dm-devel] [PATCH 2/2] dm-writecache Christoph Hellwig
@ 2017-11-23 16:29   ` Dan Williams
  2017-11-23 21:22     ` Mikulas Patocka
  0 siblings, 1 reply; 3+ messages in thread
From: Dan Williams @ 2017-11-23 16:29 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: device-mapper development, Mikulas Patocka, Mike Snitzer, linux-nvdimm

On Thu, Nov 23, 2017 at 12:29 AM, Christoph Hellwig <hch@infradead.org> wrote:
>> +/*
>> + * The clflushopt instruction is very slow on Broadwell, so we use non-temporal
>> + * stores instead.
>> + */
>> +#ifdef CONFIG_X86_64
>> +#define NT_STORE(dest, src)  asm ("movnti %1, %0" : "=m"(dest) : "r"(src))
>> +#define FLUSH_RANGE(dax, ptr, size)  do { } while (0)
>> +#define COMMIT_FLUSHED()     wmb()
>> +#else
>> +#define NT_STORE(dest, src)  ACCESS_ONCE(dest) = (src)
>> +#define FLUSH_RANGE          dax_flush
>> +#define COMMIT_FLUSHED()     do { } while (0)
>> +#endif
>
> Please go through the proper pmem APIs.

Yes, see _copy_from_iter_flushcache() and all its related apis.
Drivers shouldn't be doing anything different than what fs/dax.c is
using.
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dm-devel] [PATCH 2/2] dm-writecache
  2017-11-23 16:29   ` Dan Williams
@ 2017-11-23 21:22     ` Mikulas Patocka
  0 siblings, 0 replies; 3+ messages in thread
From: Mikulas Patocka @ 2017-11-23 21:22 UTC (permalink / raw)
  To: Dan Williams
  Cc: Christoph Hellwig, device-mapper development, Mike Snitzer, linux-nvdimm



On Thu, 23 Nov 2017, Dan Williams wrote:

> On Thu, Nov 23, 2017 at 12:29 AM, Christoph Hellwig <hch@infradead.org> wrote:
> >> +/*
> >> + * The clflushopt instruction is very slow on Broadwell, so we use non-temporal
> >> + * stores instead.
> >> + */
> >> +#ifdef CONFIG_X86_64
> >> +#define NT_STORE(dest, src)  asm ("movnti %1, %0" : "=m"(dest) : "r"(src))
> >> +#define FLUSH_RANGE(dax, ptr, size)  do { } while (0)
> >> +#define COMMIT_FLUSHED()     wmb()
> >> +#else
> >> +#define NT_STORE(dest, src)  ACCESS_ONCE(dest) = (src)
> >> +#define FLUSH_RANGE          dax_flush
> >> +#define COMMIT_FLUSHED()     do { } while (0)
> >> +#endif
> >
> > Please go through the proper pmem APIs.
> 
> Yes, see _copy_from_iter_flushcache() and all its related apis.
> Drivers shouldn't be doing anything different than what fs/dax.c is
> using.

There is not any arch-independent API that abstracts over a single movnti 
instruction.

Do you want to add it?

memcpy_flushcache is overkill for one or two 8-byte stores. And - on 
non-x86 architectures memcpy_flushcache doesn't flush cache at all.

Mikulas
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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2017-11-23 21:18 UTC | newest]

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     [not found] <alpine.LRH.2.02.1711222135371.2330@file01.intranet.prod.int.rdu2.redhat.com>
2017-11-23  8:29 ` [dm-devel] [PATCH 2/2] dm-writecache Christoph Hellwig
2017-11-23 16:29   ` Dan Williams
2017-11-23 21:22     ` Mikulas Patocka

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