* [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
@ 2010-03-31 12:23 Charulatha V
2010-03-31 12:23 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Charulatha V
2010-04-06 22:31 ` [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Kevin Hilman
0 siblings, 2 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch series is in preparation to adapt GPIO to HWMOD FW.
It creates OMAP architecture specific gpio files to handle
SoC specific gpio_init. The common plat-omap/gpio.c handles all
common GPIO APIs.
OMAP2PLUS GPIO module is implemented as early platform device and
OMAP1 GPIO is still handled in old way via gpio_init from board files.
Save/restore context, gpio_prepare_for_retention and
gpio_resume_after_retention APIs are also handled in plat-omap layer.
These APIs are currently not used in OMAP1, but still they might
become common for different OMAP architectures in the future.
Hence they are handled in plat-omap layer. If they need to be moved
to mach-omap2 layer, additional patches may be sent during
next version of this patch series.
This patch series is generated on top of linux-omap-2.6 branch: master
and tested on 3430SDP, 4430SDP & zoom3.
Charulatha V (8):
OMAP:GPIO:Move architecture specific macros to specific header
OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw
OMAP3:GPIO:Add support for early platform gpio device
OMAP2:GPIO:Add support for early platform gpio device
OMAP4:GPIO:Add support for early platform gpio device
OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support
OMAP1:GPIO:Support for OMAP1 specific gpio
OMAP:GPIO:Common platform code for all OMAPs
arch/arm/mach-omap1/Makefile | 2 +-
arch/arm/mach-omap1/gpio.c | 404 ++++++
arch/arm/mach-omap1/include/mach/gpio.h | 88 ++
arch/arm/mach-omap2/Makefile | 7 +-
arch/arm/mach-omap2/board-2430sdp.c | 3 +-
arch/arm/mach-omap2/board-3430sdp.c | 3 +-
arch/arm/mach-omap2/board-3630sdp.c | 3 +-
arch/arm/mach-omap2/board-4430sdp.c | 3 +-
arch/arm/mach-omap2/board-am3517evm.c | 3 +-
arch/arm/mach-omap2/board-apollon.c | 3 +-
arch/arm/mach-omap2/board-cm-t35.c | 3 +-
arch/arm/mach-omap2/board-devkit8000.c | 3 +-
arch/arm/mach-omap2/board-generic.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 3 +-
arch/arm/mach-omap2/board-igep0020.c | 3 +-
arch/arm/mach-omap2/board-ldp.c | 3 +-
arch/arm/mach-omap2/board-n8x0.c | 3 +-
arch/arm/mach-omap2/board-omap3beagle.c | 3 +-
arch/arm/mach-omap2/board-omap3evm.c | 3 +-
arch/arm/mach-omap2/board-omap3pandora.c | 3 +-
arch/arm/mach-omap2/board-omap3touchbook.c | 3 +-
arch/arm/mach-omap2/board-overo.c | 3 +-
arch/arm/mach-omap2/board-rx51.c | 3 +-
arch/arm/mach-omap2/board-zoom2.c | 3 +-
arch/arm/mach-omap2/board-zoom3.c | 3 +-
arch/arm/mach-omap2/gpio.c | 36 +
arch/arm/mach-omap2/gpio2xxx.c | 472 +++++++
arch/arm/mach-omap2/gpio3xxx.c | 351 ++++++
arch/arm/mach-omap2/gpio44xx.c | 350 ++++++
arch/arm/mach-omap2/include/mach/gpio.h | 114 ++
arch/arm/mach-omap2/io.c | 2 +
arch/arm/plat-omap/gpio.c | 1827 ++++++----------------------
arch/arm/plat-omap/include/plat/gpio.h | 180 +++-
33 files changed, 2360 insertions(+), 1535 deletions(-)
create mode 100644 arch/arm/mach-omap1/gpio.c
create mode 100644 arch/arm/mach-omap2/gpio.c
create mode 100644 arch/arm/mach-omap2/gpio2xxx.c
create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
create mode 100644 arch/arm/mach-omap2/gpio44xx.c
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-03-31 12:23 [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
2010-04-01 7:17 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Felipe Balbi
2010-04-06 22:31 ` [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Kevin Hilman
1 sibling, 2 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch moves architecture specific defines to the
corresponding architecture specific header files.
In gpio.c, #ifdef's CONFIG_ARCH_OMAPX are added to
avoid compilation errors due to movement of macros to
mach-omap layer. These architecture specific codes
is only temporary as they will be removed at the end
of this patch series when plat-omap/gpio.c handles
only common APIs.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/include/mach/gpio.h | 88 ++++++++++++
arch/arm/mach-omap2/include/mach/gpio.h | 99 +++++++++++++
arch/arm/plat-omap/gpio.c | 238 ++++---------------------------
arch/arm/plat-omap/include/plat/gpio.h | 159 ++++++++++++++++-----
4 files changed, 339 insertions(+), 245 deletions(-)
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
index e737706..c4945d7 100644
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ b/arch/arm/mach-omap1/include/mach/gpio.h
@@ -3,3 +3,91 @@
*/
#include <plat/gpio.h>
+
+/*
+ * OMAP1510 GPIO registers
+ */
+#define OMAP1510_GPIO_BASE 0xfffce000
+#define OMAP1510_GPIO_DATA_INPUT 0x00
+#define OMAP1510_GPIO_DATA_OUTPUT 0x04
+#define OMAP1510_GPIO_DIR_CONTROL 0x08
+#define OMAP1510_GPIO_INT_CONTROL 0x0c
+#define OMAP1510_GPIO_INT_MASK 0x10
+#define OMAP1510_GPIO_INT_STATUS 0x14
+#define OMAP1510_GPIO_PIN_CONTROL 0x18
+
+#define OMAP1510_IH_GPIO_BASE 64
+
+/*
+ * OMAP1610 specific GPIO registers
+ */
+#define OMAP1610_GPIO1_BASE 0xfffbe400
+#define OMAP1610_GPIO2_BASE 0xfffbec00
+#define OMAP1610_GPIO3_BASE 0xfffbb400
+#define OMAP1610_GPIO4_BASE 0xfffbbc00
+#define OMAP1610_GPIO_REVISION 0x0000
+#define OMAP1610_GPIO_SYSCONFIG 0x0010
+#define OMAP1610_GPIO_SYSSTATUS 0x0014
+#define OMAP1610_GPIO_IRQSTATUS1 0x0018
+#define OMAP1610_GPIO_IRQENABLE1 0x001c
+#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
+#define OMAP1610_GPIO_DATAIN 0x002c
+#define OMAP1610_GPIO_DATAOUT 0x0030
+#define OMAP1610_GPIO_DIRECTION 0x0034
+#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
+#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
+#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
+#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
+#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
+#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
+#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
+#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
+
+/*
+ * OMAP7XX specific GPIO registers
+ */
+#define OMAP7XX_GPIO1_BASE 0xfffbc000
+#define OMAP7XX_GPIO2_BASE 0xfffbc800
+#define OMAP7XX_GPIO3_BASE 0xfffbd000
+#define OMAP7XX_GPIO4_BASE 0xfffbd800
+#define OMAP7XX_GPIO5_BASE 0xfffbe000
+#define OMAP7XX_GPIO6_BASE 0xfffbe800
+#define OMAP7XX_GPIO_DATA_INPUT 0x00
+#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
+#define OMAP7XX_GPIO_DIR_CONTROL 0x08
+#define OMAP7XX_GPIO_INT_CONTROL 0x0c
+#define OMAP7XX_GPIO_INT_MASK 0x10
+#define OMAP7XX_GPIO_INT_STATUS 0x14
+
+#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
+#define OMAP1_MPUIO_BASE 0xfffb5000
+
+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
+#define OMAP_MPUIO_INPUT_LATCH 0x00
+#define OMAP_MPUIO_OUTPUT 0x02
+#define OMAP_MPUIO_IO_CNTL 0x04
+#define OMAP_MPUIO_KBR_LATCH 0x08
+#define OMAP_MPUIO_KBC 0x0a
+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
+#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
+#define OMAP_MPUIO_KBD_INT 0x10
+#define OMAP_MPUIO_GPIO_INT 0x12
+#define OMAP_MPUIO_KBD_MASKIT 0x14
+#define OMAP_MPUIO_GPIO_MASKIT 0x16
+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
+#define OMAP_MPUIO_LATCH 0x1a
+#else
+#define OMAP_MPUIO_INPUT_LATCH 0x00
+#define OMAP_MPUIO_OUTPUT 0x04
+#define OMAP_MPUIO_IO_CNTL 0x08
+#define OMAP_MPUIO_KBR_LATCH 0x10
+#define OMAP_MPUIO_KBC 0x14
+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
+#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
+#define OMAP_MPUIO_KBD_INT 0x20
+#define OMAP_MPUIO_GPIO_INT 0x24
+#define OMAP_MPUIO_KBD_MASKIT 0x28
+#define OMAP_MPUIO_GPIO_MASKIT 0x2c
+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
+#define OMAP_MPUIO_LATCH 0x34
+#endif
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index be4d290..0b90a72 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -3,3 +3,102 @@
*/
#include <plat/gpio.h>
+
+/*
+ * omap24xx specific GPIO registers
+ */
+#define OMAP242X_GPIO1_BASE 0x48018000
+#define OMAP242X_GPIO2_BASE 0x4801a000
+#define OMAP242X_GPIO3_BASE 0x4801c000
+#define OMAP242X_GPIO4_BASE 0x4801e000
+
+#define OMAP243X_GPIO1_BASE 0x4900C000
+#define OMAP243X_GPIO2_BASE 0x4900E000
+#define OMAP243X_GPIO3_BASE 0x49010000
+#define OMAP243X_GPIO4_BASE 0x49012000
+#define OMAP243X_GPIO5_BASE 0x480B6000
+
+/*
+ * omap34xx specific GPIO registers
+ */
+#define OMAP34XX_GPIO1_BASE 0x48310000
+#define OMAP34XX_GPIO2_BASE 0x49050000
+#define OMAP34XX_GPIO3_BASE 0x49052000
+#define OMAP34XX_GPIO4_BASE 0x49054000
+#define OMAP34XX_GPIO5_BASE 0x49056000
+#define OMAP34XX_GPIO6_BASE 0x49058000
+
+#define OMAP34XX_NR_GPIOS 6
+
+/*
+ * OMAP44XX specific GPIO registers
+ */
+#define OMAP44XX_GPIO1_BASE 0x4a310000
+#define OMAP44XX_GPIO2_BASE 0x48055000
+#define OMAP44XX_GPIO3_BASE 0x48057000
+#define OMAP44XX_GPIO4_BASE 0x48059000
+#define OMAP44XX_GPIO5_BASE 0x4805B000
+#define OMAP44XX_GPIO6_BASE 0x4805D000
+
+/*
+ * GPIO register offsets
+ */
+#define OMAP24XX_GPIO_REVISION 0x0000
+#define OMAP24XX_GPIO_SYSCONFIG 0x0010
+#define OMAP24XX_GPIO_SYSSTATUS 0x0014
+#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
+#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
+#define OMAP24XX_GPIO_IRQENABLE2 0x002c
+#define OMAP24XX_GPIO_IRQENABLE1 0x001c
+#define OMAP24XX_GPIO_WAKE_EN 0x0020
+#define OMAP24XX_GPIO_CTRL 0x0030
+#define OMAP24XX_GPIO_OE 0x0034
+#define OMAP24XX_GPIO_DATAIN 0x0038
+#define OMAP24XX_GPIO_DATAOUT 0x003c
+#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
+#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
+#define OMAP24XX_GPIO_RISINGDETECT 0x0048
+#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
+#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
+#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
+#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
+#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
+#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
+#define OMAP24XX_GPIO_SETWKUENA 0x0084
+#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
+#define OMAP24XX_GPIO_SETDATAOUT 0x0094
+
+#define OMAP4_GPIO_REVISION 0x0000
+#define OMAP4_GPIO_SYSCONFIG 0x0010
+#define OMAP4_GPIO_EOI 0x0020
+#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
+#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
+#define OMAP4_GPIO_IRQSTATUS0 0x002c
+#define OMAP4_GPIO_IRQSTATUS1 0x0030
+#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
+#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
+#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
+#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
+#define OMAP4_GPIO_IRQWAKEN0 0x0044
+#define OMAP4_GPIO_IRQWAKEN1 0x0048
+#define OMAP4_GPIO_SYSSTATUS 0x0114
+#define OMAP4_GPIO_SYSSTATUS 0x0114
+#define OMAP4_GPIO_IRQENABLE1 0x011c
+#define OMAP4_GPIO_WAKE_EN 0x0120
+#define OMAP4_GPIO_IRQSTATUS2 0x0128
+#define OMAP4_GPIO_CTRL 0x0130
+#define OMAP4_GPIO_OE 0x0134
+#define OMAP4_GPIO_DATAIN 0x0138
+#define OMAP4_GPIO_DATAOUT 0x013c
+#define OMAP4_GPIO_LEVELDETECT0 0x0140
+#define OMAP4_GPIO_LEVELDETECT1 0x0144
+#define OMAP4_GPIO_RISINGDETECT 0x0148
+#define OMAP4_GPIO_FALLINGDETECT 0x014c
+#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
+#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
+#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
+#define OMAP4_GPIO_SETIRQENABLE1 0x0164
+#define OMAP4_GPIO_CLEARWKUENA 0x0180
+#define OMAP4_GPIO_SETWKUENA 0x0184
+#define OMAP4_GPIO_CLEARDATAOUT 0x0190
+#define OMAP4_GPIO_SETDATAOUT 0x0194
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 76a347b..069dd66 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -14,195 +14,7 @@
* published by the Free Software Foundation.
*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/sysdev.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <mach/irqs.h>
-#include <mach/gpio.h>
-#include <asm/mach/irq.h>
-
-/*
- * OMAP1510 GPIO registers
- */
-#define OMAP1510_GPIO_BASE 0xfffce000
-#define OMAP1510_GPIO_DATA_INPUT 0x00
-#define OMAP1510_GPIO_DATA_OUTPUT 0x04
-#define OMAP1510_GPIO_DIR_CONTROL 0x08
-#define OMAP1510_GPIO_INT_CONTROL 0x0c
-#define OMAP1510_GPIO_INT_MASK 0x10
-#define OMAP1510_GPIO_INT_STATUS 0x14
-#define OMAP1510_GPIO_PIN_CONTROL 0x18
-
-#define OMAP1510_IH_GPIO_BASE 64
-
-/*
- * OMAP1610 specific GPIO registers
- */
-#define OMAP1610_GPIO1_BASE 0xfffbe400
-#define OMAP1610_GPIO2_BASE 0xfffbec00
-#define OMAP1610_GPIO3_BASE 0xfffbb400
-#define OMAP1610_GPIO4_BASE 0xfffbbc00
-#define OMAP1610_GPIO_REVISION 0x0000
-#define OMAP1610_GPIO_SYSCONFIG 0x0010
-#define OMAP1610_GPIO_SYSSTATUS 0x0014
-#define OMAP1610_GPIO_IRQSTATUS1 0x0018
-#define OMAP1610_GPIO_IRQENABLE1 0x001c
-#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
-#define OMAP1610_GPIO_DATAIN 0x002c
-#define OMAP1610_GPIO_DATAOUT 0x0030
-#define OMAP1610_GPIO_DIRECTION 0x0034
-#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
-#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
-#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
-#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
-#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
-#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
-#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
-#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
-
-/*
- * OMAP7XX specific GPIO registers
- */
-#define OMAP7XX_GPIO1_BASE 0xfffbc000
-#define OMAP7XX_GPIO2_BASE 0xfffbc800
-#define OMAP7XX_GPIO3_BASE 0xfffbd000
-#define OMAP7XX_GPIO4_BASE 0xfffbd800
-#define OMAP7XX_GPIO5_BASE 0xfffbe000
-#define OMAP7XX_GPIO6_BASE 0xfffbe800
-#define OMAP7XX_GPIO_DATA_INPUT 0x00
-#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
-#define OMAP7XX_GPIO_DIR_CONTROL 0x08
-#define OMAP7XX_GPIO_INT_CONTROL 0x0c
-#define OMAP7XX_GPIO_INT_MASK 0x10
-#define OMAP7XX_GPIO_INT_STATUS 0x14
-
-#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
-
-/*
- * omap24xx specific GPIO registers
- */
-#define OMAP242X_GPIO1_BASE 0x48018000
-#define OMAP242X_GPIO2_BASE 0x4801a000
-#define OMAP242X_GPIO3_BASE 0x4801c000
-#define OMAP242X_GPIO4_BASE 0x4801e000
-
-#define OMAP243X_GPIO1_BASE 0x4900C000
-#define OMAP243X_GPIO2_BASE 0x4900E000
-#define OMAP243X_GPIO3_BASE 0x49010000
-#define OMAP243X_GPIO4_BASE 0x49012000
-#define OMAP243X_GPIO5_BASE 0x480B6000
-
-#define OMAP24XX_GPIO_REVISION 0x0000
-#define OMAP24XX_GPIO_SYSCONFIG 0x0010
-#define OMAP24XX_GPIO_SYSSTATUS 0x0014
-#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
-#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
-#define OMAP24XX_GPIO_IRQENABLE2 0x002c
-#define OMAP24XX_GPIO_IRQENABLE1 0x001c
-#define OMAP24XX_GPIO_WAKE_EN 0x0020
-#define OMAP24XX_GPIO_CTRL 0x0030
-#define OMAP24XX_GPIO_OE 0x0034
-#define OMAP24XX_GPIO_DATAIN 0x0038
-#define OMAP24XX_GPIO_DATAOUT 0x003c
-#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
-#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
-#define OMAP24XX_GPIO_RISINGDETECT 0x0048
-#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
-#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
-#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
-#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
-#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
-#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
-#define OMAP24XX_GPIO_SETWKUENA 0x0084
-#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
-#define OMAP24XX_GPIO_SETDATAOUT 0x0094
-
-#define OMAP4_GPIO_REVISION 0x0000
-#define OMAP4_GPIO_SYSCONFIG 0x0010
-#define OMAP4_GPIO_EOI 0x0020
-#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
-#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
-#define OMAP4_GPIO_IRQSTATUS0 0x002c
-#define OMAP4_GPIO_IRQSTATUS1 0x0030
-#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
-#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
-#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
-#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
-#define OMAP4_GPIO_IRQWAKEN0 0x0044
-#define OMAP4_GPIO_IRQWAKEN1 0x0048
-#define OMAP4_GPIO_SYSSTATUS 0x0104
-#define OMAP4_GPIO_CTRL 0x0130
-#define OMAP4_GPIO_OE 0x0134
-#define OMAP4_GPIO_DATAIN 0x0138
-#define OMAP4_GPIO_DATAOUT 0x013c
-#define OMAP4_GPIO_LEVELDETECT0 0x0140
-#define OMAP4_GPIO_LEVELDETECT1 0x0144
-#define OMAP4_GPIO_RISINGDETECT 0x0148
-#define OMAP4_GPIO_FALLINGDETECT 0x014c
-#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
-#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
-#define OMAP4_GPIO_CLEARDATAOUT 0x0190
-#define OMAP4_GPIO_SETDATAOUT 0x0194
-/*
- * omap34xx specific GPIO registers
- */
-
-#define OMAP34XX_GPIO1_BASE 0x48310000
-#define OMAP34XX_GPIO2_BASE 0x49050000
-#define OMAP34XX_GPIO3_BASE 0x49052000
-#define OMAP34XX_GPIO4_BASE 0x49054000
-#define OMAP34XX_GPIO5_BASE 0x49056000
-#define OMAP34XX_GPIO6_BASE 0x49058000
-
-/*
- * OMAP44XX specific GPIO registers
- */
-#define OMAP44XX_GPIO1_BASE 0x4a310000
-#define OMAP44XX_GPIO2_BASE 0x48055000
-#define OMAP44XX_GPIO3_BASE 0x48057000
-#define OMAP44XX_GPIO4_BASE 0x48059000
-#define OMAP44XX_GPIO5_BASE 0x4805B000
-#define OMAP44XX_GPIO6_BASE 0x4805D000
-
-struct gpio_bank {
- unsigned long pbase;
- void __iomem *base;
- u16 irq;
- u16 virtual_irq_start;
- int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
- u32 suspend_wakeup;
- u32 saved_wakeup;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- u32 non_wakeup_gpios;
- u32 enabled_non_wakeup_gpios;
-
- u32 saved_datain;
- u32 saved_fallingdetect;
- u32 saved_risingdetect;
-#endif
- u32 level_mask;
- u32 toggle_mask;
- spinlock_t lock;
- struct gpio_chip chip;
- struct clk *dbck;
- u32 mod_usage;
-};
-
-#define METHOD_MPUIO 0
-#define METHOD_GPIO_1510 1
-#define METHOD_GPIO_1610 2
-#define METHOD_GPIO_7XX 3
-#define METHOD_GPIO_24XX 5
-#define METHOD_GPIO_44XX 6
+#include <plat/gpio.h>
#ifdef CONFIG_ARCH_OMAP16XX
static struct gpio_bank gpio_bank_1610[5] = {
@@ -291,23 +103,7 @@ static struct gpio_bank gpio_bank_34xx[6] = {
METHOD_GPIO_24XX },
};
-struct omap3_gpio_regs {
- u32 sysconfig;
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
- u32 setwkuena;
- u32 setdataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
+static struct omap_gpio_reg_val gpio_context[OMAP34XX_NR_GPIOS];
#endif
#ifdef CONFIG_ARCH_OMAP4
@@ -625,10 +421,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
bank = get_gpio_bank(gpio);
reg = bank->base;
+#ifdef CONFIG_ARCH_OMAP2PLUS
if (cpu_is_omap44xx())
reg += OMAP4_GPIO_DEBOUNCENABLE;
else
reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+#endif
if (!(bank->mod_usage & l)) {
printk(KERN_ERR "GPIO %d not requested\n", gpio);
@@ -676,10 +474,12 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
enc_time &= 0xff;
+#ifdef CONFIG_ARCH_OMAP2PLUS
if (cpu_is_omap44xx())
reg += OMAP4_GPIO_DEBOUNCINGTIME;
else
reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
+#endif
__raw_writel(enc_time, reg);
}
@@ -953,6 +753,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
}
__raw_writel(gpio_mask, reg);
+#ifdef CONFIG_ARCH_OMAP2PLUS
/* Workaround for clearing DSP GPIO interrupts to allow retention */
if (cpu_is_omap24xx() || cpu_is_omap34xx())
reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
@@ -962,9 +763,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
__raw_writel(gpio_mask, reg);
- /* Flush posted write for the irq status to avoid spurious interrupts */
- __raw_readl(reg);
+ /* Flush posted write for the irq status to
+ * avoid spurious interrupts
+ */
+ __raw_readl(reg);
}
+#endif
}
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -1198,6 +1002,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
+#ifdef CONFIG_ARCH_OMAP2PLUS
if (!cpu_class_is_omap1()) {
if (!bank->mod_usage) {
u32 ctrl;
@@ -1208,6 +1013,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
}
bank->mod_usage |= 1 << offset;
}
+#endif
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -1233,7 +1039,6 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
__raw_writel(1 << offset, reg);
}
-#endif
if (!cpu_class_is_omap1()) {
bank->mod_usage &= ~(1 << offset);
if (!bank->mod_usage) {
@@ -1244,6 +1049,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
}
}
+#endif
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -1557,6 +1363,7 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
void __iomem *reg = bank->base;
switch (bank->method) {
+#ifdef CONFIG_ARCH_OMAP1
case METHOD_MPUIO:
reg += OMAP_MPUIO_IO_CNTL;
break;
@@ -1569,10 +1376,13 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
case METHOD_GPIO_7XX:
reg += OMAP7XX_GPIO_DIR_CONTROL;
break;
+#endif
+#ifdef CONFIG_ARCH_OMAP2PLUS
case METHOD_GPIO_24XX:
case METHOD_GPIO_44XX:
reg += OMAP24XX_GPIO_OE;
break;
+#endif
}
return __raw_readl(reg) & mask;
}
@@ -1651,14 +1461,20 @@ static void __init omap_gpio_show_rev(void)
{
u32 rev;
+#ifdef CONFIG_ARCH_OMAP1
if (cpu_is_omap16xx())
rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
- else if (cpu_is_omap24xx() || cpu_is_omap34xx())
+ else
+ return;
+#endif
+#ifdef CONFIG_ARCH_OMAP2PLUS
+ if (cpu_is_omap24xx() || cpu_is_omap34xx())
rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
else if (cpu_is_omap44xx())
rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
else
return;
+#endif
printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
(rev >> 4) & 0x0f, rev & 0x0f);
@@ -1791,6 +1607,7 @@ static int __init _omap_gpio_init(void)
continue;
}
+#ifdef CONFIG_ARCH_OMAP1
if (bank_is_mpuio(bank))
__raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
@@ -1808,6 +1625,7 @@ static int __init _omap_gpio_init(void)
gpio_count = 32; /* 7xx has 32-bit GPIOs */
}
+#endif
#ifdef CONFIG_ARCH_OMAP2PLUS
if ((bank->method == METHOD_GPIO_24XX) ||
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index de7c547..d154897 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -26,51 +26,140 @@
#ifndef __ASM_ARCH_OMAP_GPIO_H
#define __ASM_ARCH_OMAP_GPIO_H
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/sysdev.h>
+#include <linux/err.h>
+#include <linux/clk.h>
#include <linux/io.h>
-#include <mach/irqs.h>
-#define OMAP1_MPUIO_BASE 0xfffb5000
-
-#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
-
-#define OMAP_MPUIO_INPUT_LATCH 0x00
-#define OMAP_MPUIO_OUTPUT 0x02
-#define OMAP_MPUIO_IO_CNTL 0x04
-#define OMAP_MPUIO_KBR_LATCH 0x08
-#define OMAP_MPUIO_KBC 0x0a
-#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
-#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
-#define OMAP_MPUIO_KBD_INT 0x10
-#define OMAP_MPUIO_GPIO_INT 0x12
-#define OMAP_MPUIO_KBD_MASKIT 0x14
-#define OMAP_MPUIO_GPIO_MASKIT 0x16
-#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
-#define OMAP_MPUIO_LATCH 0x1a
-#else
-#define OMAP_MPUIO_INPUT_LATCH 0x00
-#define OMAP_MPUIO_OUTPUT 0x04
-#define OMAP_MPUIO_IO_CNTL 0x08
-#define OMAP_MPUIO_KBR_LATCH 0x10
-#define OMAP_MPUIO_KBC 0x14
-#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
-#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
-#define OMAP_MPUIO_KBD_INT 0x20
-#define OMAP_MPUIO_GPIO_INT 0x24
-#define OMAP_MPUIO_KBD_MASKIT 0x28
-#define OMAP_MPUIO_GPIO_MASKIT 0x2c
-#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
-#define OMAP_MPUIO_LATCH 0x34
-#endif
+#include <asm/irq.h>
+#include <asm-generic/gpio.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
+#include <plat/cpu.h>
-#define OMAP34XX_NR_GPIOS 6
+#define METHOD_MPUIO 0
+#define METHOD_GPIO_1510 1
+#define METHOD_GPIO_1610 2
+#define METHOD_GPIO_7XX 3
+#define METHOD_GPIO_24XX 4
+#define METHOD_GPIO_44XX 5
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
-
#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
IH_MPUIO_BASE + ((nr) & 0x0f) : \
IH_GPIO_BASE + (nr))
+struct omap_gpio_platform_data {
+ u16 virtual_irq_start;
+ int method;
+ char ick_name[11];
+ char fck_name[11];
+ char dbck_name[11];
+};
+
+struct gpio_reg_offset {
+ u32 data_in;
+ u32 data_out;
+ u32 data_out_set;
+ u32 data_out_clear;
+ u32 dir_ctrl;
+ u32 irq_status0;
+ u32 irq_status1;
+ u32 irq_mask;
+ u32 irq_ena2;
+ u32 irq_set;
+ u32 irq_clear;
+ u32 irq_mask_bits;
+ u32 irq_inv;
+ u32 wkup_enable;
+ u32 wkup_clear;
+ u32 wkup_set;
+ u32 debounce_ena;
+ u32 debounce_val;
+ u32 syscfg;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 rise_detect;
+ u32 fall_detect;
+ u32 ctrl;
+ u32 rev_reg;
+};
+
+struct mpu_gpio_reg_off {
+ u32 mpu_io_ctrl;
+ u32 mpu_data_out;
+ u32 mpu_data_in;
+ u32 mpu_isr;
+ u32 mpu_irq_mask;
+ u32 mpu_irq_mask_bits;
+ u32 mpu_irq_inv;
+};
+
+struct gpio_bank {
+ unsigned long pbase;
+ void __iomem *base;
+ u16 irq;
+ u16 virtual_irq_start;
+ int method;
+ u32 suspend_wakeup;
+ u32 saved_wakeup;
+ u32 non_wakeup_gpios;
+ u32 enabled_non_wakeup_gpios;
+ u32 saved_datain;
+ u32 saved_fallingdetect;
+ u32 saved_risingdetect;
+ u32 level_mask;
+ u32 toggle_mask;
+ u32 mod_usage;
+ u8 initialized;
+ spinlock_t lock; /*spinlock for gpio module */
+ struct gpio_chip chip;
+ struct clk *dbck;
+ struct clk *fck;
+ struct clk *ick;
+};
+
+struct omap_gpio_reg_val {
+ u32 sysconfig;
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+ u32 setwkuena;
+ u32 setdataout;
+};
+
+struct omap_gpio_info {
+ struct gpio_reg_offset *reg_off; /* reg offsets */
+ struct mpu_gpio_reg_off *mpu_reg; /* mpu bank reg offsets */
+ struct gpio_bank *gpio_bank;
+ u32 index_mask; /* mask value to get gpio index */
+ u32 no_of_gpio; /* total no of gpios */
+ u16 bank_count; /* total no of banks */
+ u16 bank_bits; /* no of gpios in each bank */
+ int (*set_gpio_triggering)(struct gpio_bank *bank, int gpio,
+ int trigger);
+ void (*toggle_edge_triggering)(struct gpio_bank *bank,
+ int gpio);
+ struct gpio_bank *(*get_gpio_bank)(int gpio,
+ struct gpio_bank *gpio_bank);
+ void (*gpio_mod_init) (struct gpio_bank *bank, int i);
+};
+
+
extern int omap_gpio_init(void); /* Call from board init only */
extern void omap2_gpio_prepare_for_retention(void);
extern void omap2_gpio_resume_after_retention(void);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
` (3 more replies)
2010-04-01 7:17 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Felipe Balbi
1 sibling, 4 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for implementing OMAP3 GPIO as an
early platform device and adds gpio_init specific to OMAP3
This patch adds device structures for each GPIO device in
OMAP3 architecture. These strutures are not created in a
separate *_data.c file because these structures would be
removed once the driver gets adapted to HWMOD way.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
2 files changed, 363 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
diff --git a/arch/arm/mach-omap2/gpio3xxx.c b/arch/arm/mach-omap2/gpio3xxx.c
new file mode 100644
index 0000000..8f404e7
--- /dev/null
+++ b/arch/arm/mach-omap2/gpio3xxx.c
@@ -0,0 +1,351 @@
+/*
+ * gpio3xxx.c - OMAP3-specific gpio code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Charulatha V <charu@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/gpio.h>
+
+/*
+ * OMAP3 GPIO reg offsets
+ */
+static struct gpio_reg_offset omap3_gpio_reg = {
+ .data_in = OMAP24XX_GPIO_DATAIN,
+ .data_out = OMAP24XX_GPIO_DATAOUT,
+ .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
+ .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
+ .dir_ctrl = OMAP24XX_GPIO_OE,
+ .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
+ .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
+ .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
+ .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
+ .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
+ .irq_mask_bits = 0xffffffff,
+ .irq_inv = 0,
+ .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
+ .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
+ .wkup_set = OMAP24XX_GPIO_SETWKUENA,
+ .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
+ .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
+ .ctrl = OMAP24XX_GPIO_CTRL,
+ .syscfg = OMAP24XX_GPIO_SYSCONFIG,
+ .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
+ .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
+ .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
+ .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
+ .rev_reg = OMAP24XX_GPIO_REVISION,
+};
+
+/*
+ * OMAP3 GPIO1 interface data
+ */
+static struct __initdata resource omap3_gpio1_resources[] = {
+ {
+ .start = OMAP34XX_GPIO1_BASE,
+ .end = OMAP34XX_GPIO1_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio1_config = {
+ .ick_name = "gpio1_ick",
+ .dbck_name = "gpio1_dbck",
+ .virtual_irq_start = IH_GPIO_BASE,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio1 = {
+ .name = "omap-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &omap3_gpio1_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio1_resources),
+ .resource = omap3_gpio1_resources,
+};
+
+/*
+ * OMAP3 GPIO2 interface data
+ */
+static struct __initdata resource omap3_gpio2_resources[] = {
+ {
+ .start = OMAP34XX_GPIO2_BASE,
+ .end = OMAP34XX_GPIO2_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio2_config = {
+ .ick_name = "gpio2_ick",
+ .dbck_name = "gpio2_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 32,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio2 = {
+ .name = "omap-gpio",
+ .id = 1,
+ .dev = {
+ .platform_data = &omap3_gpio2_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio2_resources),
+ .resource = omap3_gpio2_resources,
+};
+
+/*
+ * OMAP3 GPIO3 interface data
+ */
+static struct __initdata resource omap3_gpio3_resources[] = {
+ {
+ .start = OMAP34XX_GPIO3_BASE,
+ .end = OMAP34XX_GPIO3_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio3_config = {
+ .ick_name = "gpio3_ick",
+ .dbck_name = "gpio3_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 64,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio3 = {
+ .name = "omap-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &omap3_gpio3_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio3_resources),
+ .resource = omap3_gpio3_resources,
+};
+
+/*
+ * OMAP3 GPIO4 interface data
+ */
+static struct __initdata resource omap3_gpio4_resources[] = {
+ {
+ .start = OMAP34XX_GPIO4_BASE,
+ .end = OMAP34XX_GPIO4_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK4,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio4_config = {
+ .ick_name = "gpio4_ick",
+ .dbck_name = "gpio4_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 96,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio4 = {
+ .name = "omap-gpio",
+ .id = 3,
+ .dev = {
+ .platform_data = &omap3_gpio4_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio4_resources),
+ .resource = omap3_gpio4_resources,
+};
+
+/*
+ * OMAP3 GPIO5 interface data
+ */
+static struct __initdata resource omap3_gpio5_resources[] = {
+ {
+ .start = OMAP34XX_GPIO5_BASE,
+ .end = OMAP34XX_GPIO5_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio5_config = {
+ .ick_name = "gpio5_ick",
+ .dbck_name = "gpio5_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 128,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio5 = {
+ .name = "omap-gpio",
+ .id = 4,
+ .dev = {
+ .platform_data = &omap3_gpio5_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio5_resources),
+ .resource = omap3_gpio5_resources,
+};
+
+/*
+ * OMAP3 GPIO6 interface data
+ */
+static struct __initdata resource omap3_gpio6_resources[] = {
+ {
+ .start = OMAP34XX_GPIO6_BASE,
+ .end = OMAP34XX_GPIO6_BASE + OMAP3_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_GPIO_BANK6,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap3_gpio6_config = {
+ .ick_name = "gpio6_ick",
+ .dbck_name = "gpio6_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 160,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap3_gpio6 = {
+ .name = "omap-gpio",
+ .id = 5,
+ .dev = {
+ .platform_data = &omap3_gpio6_config,
+ },
+ .num_resources = ARRAY_SIZE(omap3_gpio6_resources),
+ .resource = omap3_gpio6_resources,
+};
+
+static struct __initdata platform_device * omap3_gpio_early_dev[] = {
+ &omap3_gpio1,
+ &omap3_gpio2,
+ &omap3_gpio3,
+ &omap3_gpio4,
+ &omap3_gpio5,
+ &omap3_gpio6
+};
+
+static struct gpio_bank *omap3_get_gpio_bank(int gpio,
+ struct gpio_bank *gpio_bank)
+{
+ if (cpu_is_omap34xx())
+ return &gpio_bank[gpio >> 5];
+ BUG();
+ return NULL;
+}
+
+static int set_omap3_gpio_triggering(struct gpio_bank *bank, int gpio,
+ int trigger)
+{
+ void __iomem *base = bank->base;
+ u32 gpio_bit = 1 << gpio;
+
+ if (!cpu_is_omap34xx())
+ return -EINVAL;
+
+ MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_LOW);
+ MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_HIGH);
+ MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_RISING);
+ MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_FALLING);
+ if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
+ if (trigger != 0)
+ __raw_writel(1 << gpio, bank->base
+ + OMAP24XX_GPIO_SETWKUENA);
+ else
+ __raw_writel(1 << gpio, bank->base
+ + OMAP24XX_GPIO_CLEARWKUENA);
+ } else {
+ if (trigger != 0)
+ bank->enabled_non_wakeup_gpios |= gpio_bit;
+ else
+ bank->enabled_non_wakeup_gpios &= ~gpio_bit;
+ }
+
+ bank->level_mask =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+
+ return 0;
+}
+
+void __init omap3_gpio_mod_init(struct gpio_bank *bank, int i)
+{
+ static const u32 non_wakeup_gpios[] = {
+ 0xe203ffc0, 0x08700040
+ };
+
+ /*
+ * Initialize interface clock ungated,
+ * module enabled
+ */
+ __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
+ __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ __raw_writew(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN);
+ __raw_writew(0x0, bank->base + OMAP24XX_GPIO_CTRL);
+
+ if (i < ARRAY_SIZE(non_wakeup_gpios))
+ bank->non_wakeup_gpios = non_wakeup_gpios[i];
+}
+
+/*
+ * OMAP3 GPIO function pointers, reg offsets pointer and other info
+ */
+static struct omap_gpio_info omap3_gpio_data = {
+ .reg_off = &omap3_gpio_reg,
+ .index_mask = 0x1f,
+ .no_of_gpio = 192,
+ .bank_count = OMAP34XX_NR_GPIOS,
+ .bank_bits = 32,
+ .get_gpio_bank = omap3_get_gpio_bank,
+ .gpio_mod_init = omap3_gpio_mod_init,
+ .set_gpio_triggering = set_omap3_gpio_triggering,
+};
+
+void __init omap3_gpio_init_data(void)
+{
+ gpio_init(&omap3_gpio_data);
+}
+
+int __init omap3_early_init_gpio(struct platform_device ***pdev)
+{
+ *pdev = omap3_gpio_early_dev;
+ return OMAP34XX_NR_GPIOS;
+}
+
+int __init omap3_gpio_dev_reg(void)
+{
+ if (cpu_is_omap34xx()) {
+ platform_device_register(&omap3_gpio1);
+ platform_device_register(&omap3_gpio2);
+ platform_device_register(&omap3_gpio3);
+ platform_device_register(&omap3_gpio4);
+ platform_device_register(&omap3_gpio5);
+ platform_device_register(&omap3_gpio6);
+ }
+ return 0;
+}
+arch_initcall(omap3_gpio_dev_reg);
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index 0b90a72..07bfa0f 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -1,6 +1,8 @@
/*
* arch/arm/mach-omap2/include/mach/gpio.h
*/
+#ifndef __ASM_ARCH_OMAP2PLUS_GPIO_H
+#define __ASM_ARCH_OMAP2PLUS_GPIO_H
#include <plat/gpio.h>
@@ -18,6 +20,8 @@
#define OMAP243X_GPIO4_BASE 0x49012000
#define OMAP243X_GPIO5_BASE 0x480B6000
+#define OMAP2_GPIO_AS_LEN 4096
+
/*
* omap34xx specific GPIO registers
*/
@@ -29,7 +33,7 @@
#define OMAP34XX_GPIO6_BASE 0x49058000
#define OMAP34XX_NR_GPIOS 6
-
+#define OMAP3_GPIO_AS_LEN 4096
/*
* OMAP44XX specific GPIO registers
*/
@@ -40,6 +44,9 @@
#define OMAP44XX_GPIO5_BASE 0x4805B000
#define OMAP44XX_GPIO6_BASE 0x4805D000
+#define OMAP4_GPIO_AS_LEN 4096
+#define OMAP4_NR_GPIOS 6
+
/*
* GPIO register offsets
*/
@@ -102,3 +109,7 @@
#define OMAP4_GPIO_SETWKUENA 0x0184
#define OMAP4_GPIO_CLEARDATAOUT 0x0190
#define OMAP4_GPIO_SETDATAOUT 0x0194
+
+extern void omap3_gpio_init_data(void);
+extern int omap3_early_init_gpio(struct platform_device ***pdev);
+#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 4/8] OMAP4:GPIO:Add " Charulatha V
2010-04-01 7:26 ` [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device Felipe Balbi
2010-04-01 7:23 ` [PATCH 2/8] OMAP3:GPIO:Add " Felipe Balbi
` (2 subsequent siblings)
3 siblings, 2 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for implementing OMAP2 GPIO as an
early platform device and adds gpio_init specific to OMAP2
This patch adds device structures for each GPIO device in
OMAP2 architecture. These strutures are not created in a
separate *_data.c file because these structures would be
removed once the driver gets adapted to HWMOD way.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio2xxx.c | 472 +++++++++++++++++++++++++++++++
arch/arm/mach-omap2/include/mach/gpio.h | 2 +
2 files changed, 474 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/gpio2xxx.c
diff --git a/arch/arm/mach-omap2/gpio2xxx.c b/arch/arm/mach-omap2/gpio2xxx.c
new file mode 100644
index 0000000..830bb55
--- /dev/null
+++ b/arch/arm/mach-omap2/gpio2xxx.c
@@ -0,0 +1,472 @@
+/*
+ * gpio2xxx.c - OMAP2-specific gpio code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Charulatha V <charu@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/gpio.h>
+
+/*
+ * OMAP24XX GPIO reg offsets
+ */
+static struct gpio_reg_offset omap2_gpio_reg = {
+ .data_in = OMAP24XX_GPIO_DATAIN,
+ .data_out = OMAP24XX_GPIO_DATAOUT,
+ .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
+ .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
+ .dir_ctrl = OMAP24XX_GPIO_OE,
+ .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
+ .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
+ .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
+ .irq_ena2 = OMAP24XX_GPIO_IRQENABLE2,
+ .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
+ .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
+ .irq_mask_bits = 0xffffffff,
+ .irq_inv = 0,
+ .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
+ .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
+ .wkup_set = OMAP24XX_GPIO_SETWKUENA,
+ .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
+ .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
+ .ctrl = OMAP24XX_GPIO_CTRL,
+ .syscfg = OMAP24XX_GPIO_SYSCONFIG,
+ .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
+ .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
+ .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
+ .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
+ .rev_reg = OMAP24XX_GPIO_REVISION,
+};
+
+/*
+ * OMAP242X GPIO1 interface data
+ */
+static struct __initdata resource omap242x_gpio1_resources[] = {
+ {
+ .start = OMAP242X_GPIO1_BASE,
+ .end = OMAP242X_GPIO1_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap242x_gpio1_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap242x_gpio1 = {
+ .name = "omap-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &omap242x_gpio1_config,
+ },
+ .num_resources = ARRAY_SIZE(omap242x_gpio1_resources),
+ .resource = omap242x_gpio1_resources,
+};
+
+/*
+ * OMAP242X GPIO2 interface data
+ */
+static struct __initdata resource omap242x_gpio2_resources[] = {
+ {
+ .start = OMAP242X_GPIO2_BASE,
+ .end = OMAP242X_GPIO2_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap242x_gpio2_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 32,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap242x_gpio2 = {
+ .name = "omap-gpio",
+ .id = 1,
+ .dev = {
+ .platform_data = &omap242x_gpio2_config,
+ },
+ .num_resources = ARRAY_SIZE(omap242x_gpio2_resources),
+ .resource = omap242x_gpio2_resources,
+};
+
+/*
+ * OMAP242X GPIO3 interface data
+ */
+static struct __initdata resource omap242x_gpio3_resources[] = {
+ {
+ .start = OMAP242X_GPIO3_BASE,
+ .end = OMAP242X_GPIO3_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap242x_gpio3_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 64,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap242x_gpio3 = {
+ .name = "omap-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &omap242x_gpio3_config,
+ },
+ .num_resources = ARRAY_SIZE(omap242x_gpio3_resources),
+ .resource = omap242x_gpio3_resources,
+};
+
+/*
+ * OMAP242X GPIO4 interface data
+ */
+static struct __initdata resource omap242x_gpio4_resources[] = {
+ {
+ .start = OMAP242X_GPIO4_BASE,
+ .end = OMAP242X_GPIO4_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK4,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap242x_gpio4_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 96,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap242x_gpio4 = {
+ .name = "omap-gpio",
+ .id = 3,
+ .dev = {
+ .platform_data = &omap242x_gpio4_config,
+ },
+ .num_resources = ARRAY_SIZE(omap242x_gpio4_resources),
+ .resource = omap242x_gpio4_resources,
+};
+
+/*
+ * OMAP243X GPIO1 interface data
+ */
+static struct __initdata resource omap243x_gpio1_resources[] = {
+ {
+ .start = OMAP243X_GPIO1_BASE,
+ .end = OMAP243X_GPIO1_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap243x_gpio1_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap243x_gpio1 = {
+ .name = "omap-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &omap243x_gpio1_config,
+ },
+ .num_resources = ARRAY_SIZE(omap243x_gpio1_resources),
+ .resource = omap243x_gpio1_resources,
+};
+
+/*
+ * OMAP243X GPIO2 interface data
+ */
+static struct __initdata resource omap243x_gpio2_resources[] = {
+ {
+ .start = OMAP243X_GPIO2_BASE,
+ .end = OMAP243X_GPIO2_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap243x_gpio2_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 32,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap243x_gpio2 = {
+ .name = "omap-gpio",
+ .id = 1,
+ .dev = {
+ .platform_data = &omap243x_gpio2_config,
+ },
+ .num_resources = ARRAY_SIZE(omap243x_gpio2_resources),
+ .resource = omap243x_gpio2_resources,
+};
+
+/*
+ * OMAP243X GPIO3 interface data
+ */
+static struct __initdata resource omap243x_gpio3_resources[] = {
+ {
+ .start = OMAP243X_GPIO3_BASE,
+ .end = OMAP243X_GPIO3_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap243x_gpio3_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 64,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap243x_gpio3 = {
+ .name = "omap-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &omap243x_gpio3_config,
+ },
+ .num_resources = ARRAY_SIZE(omap243x_gpio3_resources),
+ .resource = omap243x_gpio3_resources,
+};
+
+/*
+ * OMAP243X GPIO4 interface data
+ */
+static struct __initdata resource omap243x_gpio4_resources[] = {
+ {
+ .start = OMAP243X_GPIO4_BASE,
+ .end = OMAP243X_GPIO4_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK4,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap243x_gpio4_config = {
+ .ick_name = "gpios_ick",
+ .fck_name = "gpios_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 96,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap243x_gpio4 = {
+ .name = "omap-gpio",
+ .id = 3,
+ .dev = {
+ .platform_data = &omap243x_gpio4_config,
+ },
+ .num_resources = ARRAY_SIZE(omap243x_gpio4_resources),
+ .resource = omap243x_gpio4_resources,
+};
+
+/*
+ * OMAP243X GPIO5 interface data
+ */
+static struct __initdata resource omap243x_gpio5_resources[] = {
+ {
+ .start = OMAP243X_GPIO5_BASE,
+ .end = OMAP243X_GPIO5_BASE + OMAP2_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_24XX_GPIO_BANK5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap243x_gpio5_config = {
+ .ick_name = "gpio5_ick",
+ .fck_name = "gpio5_fck",
+ .virtual_irq_start = IH_GPIO_BASE + 128,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap243x_gpio5 = {
+ .name = "omap-gpio",
+ .id = 4,
+ .dev = {
+ .platform_data = &omap243x_gpio5_config,
+ },
+ .num_resources = ARRAY_SIZE(omap243x_gpio5_resources),
+ .resource = omap243x_gpio5_resources,
+};
+
+static struct __initdata platform_device * omap242x_gpio_early_dev[] = {
+ &omap242x_gpio1,
+ &omap242x_gpio2,
+ &omap242x_gpio3,
+ &omap242x_gpio4
+};
+
+static struct __initdata platform_device * omap243x_gpio_early_dev[] = {
+ &omap243x_gpio1,
+ &omap243x_gpio2,
+ &omap243x_gpio3,
+ &omap243x_gpio4,
+ &omap243x_gpio5
+};
+
+static inline struct gpio_bank *omap2_get_gpio_bank(int gpio,
+ struct gpio_bank *gpio_bank)
+{
+ if (cpu_is_omap24xx())
+ return &gpio_bank[gpio >> 5];
+ BUG();
+ return NULL;
+};
+
+static int set_omap2_gpio_triggering(struct gpio_bank *bank, int gpio,
+ int trigger)
+{
+ void __iomem *base = bank->base;
+ u32 gpio_bit = 1 << gpio;
+
+ if (!cpu_is_omap24xx())
+ return -EINVAL;
+
+ MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_LOW);
+ MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_HIGH);
+ MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_RISING);
+ MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_FALLING);
+ if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
+ if (trigger != 0)
+ __raw_writel(1 << gpio, bank->base
+ + OMAP24XX_GPIO_SETWKUENA);
+ else
+ __raw_writel(1 << gpio, bank->base
+ + OMAP24XX_GPIO_CLEARWKUENA);
+ } else {
+ if (trigger != 0)
+ bank->enabled_non_wakeup_gpios |= gpio_bit;
+ else
+ bank->enabled_non_wakeup_gpios &= ~gpio_bit;
+ }
+
+ bank->level_mask =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+
+ return 0;
+}
+
+void __init omap2_gpio_mod_init(struct gpio_bank *bank, int i)
+{
+ static const u32 non_wakeup_gpios[] = {
+ 0xe203ffc0, 0x08700040
+ };
+
+ /*
+ * Initialize interface clock ungated,
+ * module enabled
+ */
+ __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
+ __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ __raw_writew(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN);
+ __raw_writew(0x0, bank->base + OMAP24XX_GPIO_CTRL);
+
+ if (i < ARRAY_SIZE(non_wakeup_gpios))
+ bank->non_wakeup_gpios = non_wakeup_gpios[i];
+}
+
+/*
+ * OMAP2 GPIO function pointers, reg offset pointer and other info
+ */
+static struct omap_gpio_info omap2_gpio_data = {
+ .reg_off = &omap2_gpio_reg,
+ .index_mask = 0x1f,
+ .no_of_gpio = 128,
+ .bank_bits = 32,
+ .gpio_mod_init = omap2_gpio_mod_init,
+ .get_gpio_bank = omap2_get_gpio_bank,
+ .set_gpio_triggering = set_omap2_gpio_triggering,
+};
+
+void __init omap2_gpio_init_data(void)
+{
+ if (cpu_is_omap242x())
+ omap2_gpio_data.bank_count = 4;
+ else if (cpu_is_omap243x())
+ omap2_gpio_data.bank_count = 5;
+
+ gpio_init(&omap2_gpio_data);
+}
+
+int __init omap2_early_init_gpio(struct platform_device ***pdev)
+{
+ int no_of_dev = 0;
+
+ if (cpu_is_omap242x()) {
+ *pdev = omap242x_gpio_early_dev;
+ no_of_dev = 4;
+ } else if (cpu_is_omap243x()) {
+ *pdev = omap243x_gpio_early_dev;
+ no_of_dev = 5;
+ }
+
+ return no_of_dev;
+}
+
+int __init omap2_gpio_dev_reg(void)
+{
+ if (cpu_is_omap242x()) {
+ platform_device_register(&omap242x_gpio1);
+ platform_device_register(&omap242x_gpio2);
+ platform_device_register(&omap242x_gpio3);
+ platform_device_register(&omap242x_gpio4);
+ } else if (cpu_is_omap243x()) {
+ platform_device_register(&omap243x_gpio1);
+ platform_device_register(&omap243x_gpio2);
+ platform_device_register(&omap243x_gpio3);
+ platform_device_register(&omap243x_gpio4);
+ platform_device_register(&omap243x_gpio5);
+ }
+
+ return 0;
+}
+arch_initcall(omap2_gpio_dev_reg);
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index 07bfa0f..e822a41 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -110,6 +110,8 @@
#define OMAP4_GPIO_CLEARDATAOUT 0x0190
#define OMAP4_GPIO_SETDATAOUT 0x0194
+extern void omap2_gpio_init_data(void);
extern void omap3_gpio_init_data(void);
+extern int omap2_early_init_gpio(struct platform_device ***pdev);
extern int omap3_early_init_gpio(struct platform_device ***pdev);
#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 4/8] OMAP4:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Charulatha V
2010-04-01 7:26 ` [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device Felipe Balbi
1 sibling, 1 reply; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for implementing OMAP4 GPIO as an
early platform device and adds gpio_init specific to OMAP4
This patch adds device structures for each GPIO device in
OMAP4 architecture. These strutures are not created in a
separate *_data.c file because these structures would be
removed once the driver gets adapted to HWMOD way.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio44xx.c | 350 +++++++++++++++++++++++++++++++
arch/arm/mach-omap2/include/mach/gpio.h | 3 +-
2 files changed, 352 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/gpio44xx.c
diff --git a/arch/arm/mach-omap2/gpio44xx.c b/arch/arm/mach-omap2/gpio44xx.c
new file mode 100644
index 0000000..6133251
--- /dev/null
+++ b/arch/arm/mach-omap2/gpio44xx.c
@@ -0,0 +1,350 @@
+/*
+ * gpio44xx.c - OMAP4-specific gpio code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Charulatha V <charu@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/gpio.h>
+
+/*
+ * OMAP4 GPIO reg offsets
+ */
+static struct gpio_reg_offset omap4_gpio_reg = {
+ .data_in = OMAP4_GPIO_DATAIN,
+ .data_out = OMAP4_GPIO_DATAOUT,
+ .data_out_set = OMAP4_GPIO_SETDATAOUT,
+ .data_out_clear = OMAP4_GPIO_CLEARDATAOUT,
+ .dir_ctrl = OMAP4_GPIO_OE,
+ .irq_status0 = OMAP4_GPIO_IRQSTATUS0,
+ .irq_status1 = OMAP4_GPIO_IRQSTATUS1,
+ .irq_mask = OMAP4_GPIO_IRQSTATUSSET0,
+ .irq_set = OMAP4_GPIO_IRQSTATUSSET0,
+ .irq_clear = OMAP4_GPIO_IRQSTATUSCLR0,
+ .irq_mask_bits = 0xffffffff,
+ .irq_inv = 0,
+ .wkup_enable = OMAP4_GPIO_IRQWAKEN0,
+ .wkup_clear = OMAP4_GPIO_IRQWAKEN0,
+ .wkup_set = OMAP4_GPIO_IRQWAKEN0,
+ .debounce_ena = OMAP4_GPIO_DEBOUNCENABLE,
+ .debounce_val = OMAP4_GPIO_DEBOUNCINGTIME,
+ .ctrl = OMAP4_GPIO_CTRL,
+ .syscfg = OMAP4_GPIO_SYSCONFIG,
+ .leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
+ .leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
+ .rise_detect = OMAP4_GPIO_RISINGDETECT,
+ .fall_detect = OMAP4_GPIO_FALLINGDETECT,
+ .rev_reg = OMAP4_GPIO_REVISION,
+};
+
+/*
+ * OMAP4 GPIO1 interface data
+ */
+static struct __initdata resource omap4_gpio1_resources[] = {
+ {
+ .start = OMAP44XX_GPIO1_BASE,
+ .end = OMAP44XX_GPIO1_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio1_config = {
+ .ick_name = "gpio1_ick",
+ .dbck_name = "gpio1_dbck",
+ .virtual_irq_start = IH_GPIO_BASE,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio1 = {
+ .name = "omap-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &omap4_gpio1_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio1_resources),
+ .resource = omap4_gpio1_resources,
+};
+
+/*
+ * OMAP4 GPIO2 interface data
+ */
+static struct __initdata resource omap4_gpio2_resources[] = {
+ {
+ .start = OMAP44XX_GPIO2_BASE,
+ .end = OMAP44XX_GPIO2_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio2_config = {
+ .ick_name = "gpio2_ick",
+ .dbck_name = "gpio2_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 32,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio2 = {
+ .name = "omap-gpio",
+ .id = 1,
+ .dev = {
+ .platform_data = &omap4_gpio2_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio2_resources),
+ .resource = omap4_gpio2_resources,
+};
+
+/*
+ * OMAP4 GPIO3 interface data
+ */
+static struct __initdata resource omap4_gpio3_resources[] = {
+ {
+ .start = OMAP44XX_GPIO3_BASE,
+ .end = OMAP44XX_GPIO3_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio3_config = {
+ .ick_name = "gpio3_ick",
+ .dbck_name = "gpio3_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 64,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio3 = {
+ .name = "omap-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &omap4_gpio3_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio3_resources),
+ .resource = omap4_gpio3_resources,
+};
+
+/*
+ * OMAP4 GPIO4 interface data
+ */
+static struct __initdata resource omap4_gpio4_resources[] = {
+ {
+ .start = OMAP44XX_GPIO4_BASE,
+ .end = OMAP44XX_GPIO4_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO4,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio4_config = {
+ .ick_name = "gpio4_ick",
+ .dbck_name = "gpio4_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 96,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio4 = {
+ .name = "omap-gpio",
+ .id = 3,
+ .dev = {
+ .platform_data = &omap4_gpio4_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio4_resources),
+ .resource = omap4_gpio4_resources,
+};
+
+/*
+ * OMAP4 GPIO5 interface data
+ */
+static struct __initdata resource omap4_gpio5_resources[] = {
+ {
+ .start = OMAP44XX_GPIO5_BASE,
+ .end = OMAP44XX_GPIO5_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO5,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio5_config = {
+ .ick_name = "gpio5_ick",
+ .dbck_name = "gpio5_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 128,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio5 = {
+ .name = "omap-gpio",
+ .id = 4,
+ .dev = {
+ .platform_data = &omap4_gpio5_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio5_resources),
+ .resource = omap4_gpio5_resources,
+};
+
+/*
+ * OMAP4 GPIO6 interface data
+ */
+static struct __initdata resource omap4_gpio6_resources[] = {
+ {
+ .start = OMAP44XX_GPIO6_BASE,
+ .end = OMAP44XX_GPIO6_BASE + OMAP4_GPIO_AS_LEN - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = OMAP44XX_IRQ_GPIO6,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct __initdata omap_gpio_platform_data omap4_gpio6_config = {
+ .ick_name = "gpio6_ick",
+ .dbck_name = "gpio6_dbck",
+ .virtual_irq_start = IH_GPIO_BASE + 160,
+ .method = METHOD_GPIO_OMAP2PLUS,
+};
+
+static struct __initdata platform_device omap4_gpio6 = {
+ .name = "omap-gpio",
+ .id = 5,
+ .dev = {
+ .platform_data = &omap4_gpio6_config,
+ },
+ .num_resources = ARRAY_SIZE(omap4_gpio6_resources),
+ .resource = omap4_gpio6_resources,
+};
+
+static struct __initdata platform_device * omap4_gpio_early_dev[] = {
+ &omap4_gpio1,
+ &omap4_gpio2,
+ &omap4_gpio3,
+ &omap4_gpio4,
+ &omap4_gpio5,
+ &omap4_gpio6
+};
+
+static struct gpio_bank *omap4_get_gpio_bank(int gpio,
+ struct gpio_bank *gpio_bank)
+{
+ if (cpu_is_omap44xx())
+ return &gpio_bank[gpio >> 5];
+ BUG();
+ return NULL;
+}
+
+static int set_omap4_gpio_triggering(struct gpio_bank *bank, int gpio,
+ int trigger)
+{
+ void __iomem *base = bank->base;
+ u32 gpio_bit = 1 << gpio;
+ u32 val;
+
+ if (!cpu_is_omap44xx())
+ return -EINVAL;
+
+ MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_LOW);
+ MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
+ trigger & IRQ_TYPE_LEVEL_HIGH);
+ MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_RISING);
+ MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
+ trigger & IRQ_TYPE_EDGE_FALLING);
+ if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
+ if (trigger != 0)
+ __raw_writel(1 << gpio, bank->base +
+ OMAP4_GPIO_IRQWAKEN0);
+ else {
+ val = __raw_readl(bank->base + OMAP4_GPIO_IRQWAKEN0);
+ __raw_writel(val & (~(1 << gpio)), bank->base +
+ OMAP4_GPIO_IRQWAKEN0);
+ }
+ } else {
+ if (trigger != 0)
+ bank->enabled_non_wakeup_gpios |= gpio_bit;
+ else
+ bank->enabled_non_wakeup_gpios &= ~gpio_bit;
+ }
+
+ bank->level_mask = __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
+ __raw_readl(bank->base +
+ OMAP4_GPIO_LEVELDETECT1);
+
+ return 0;
+}
+
+void __init omap4_gpio_mod_init(struct gpio_bank *bank, int i)
+{
+ static const u32 non_wakeup_gpios[] = {
+ 0xe203ffc0, 0x08700040
+ };
+
+ __raw_writel(0xffffffff, bank->base + OMAP4_GPIO_IRQSTATUSCLR0);
+ __raw_writew(0x0015, bank->base + OMAP4_GPIO_SYSCONFIG);
+ __raw_writel(0x00000000, bank->base + OMAP4_GPIO_DEBOUNCENABLE);
+ /* Initialize interface clock ungated, module enabled */
+ __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
+
+ if (i < ARRAY_SIZE(non_wakeup_gpios))
+ bank->non_wakeup_gpios = non_wakeup_gpios[i];
+}
+
+/*
+ * OMAP4 GPIO function pointers, reg offset pointer and other info
+ */
+static struct omap_gpio_info omap4_gpio_data = {
+ .reg_off = &omap4_gpio_reg,
+ .index_mask = 0x1f,
+ .no_of_gpio = 192,
+ .bank_count = OMAP4_NR_GPIOS,
+ .bank_bits = 32,
+ .get_gpio_bank = omap4_get_gpio_bank,
+ .gpio_mod_init = omap4_gpio_mod_init,
+ .set_gpio_triggering = set_omap4_gpio_triggering,
+};
+
+void __init omap4_gpio_init_data(void)
+{
+ gpio_init(&omap4_gpio_data);
+}
+
+int __init omap4_early_init_gpio(struct platform_device ***pdev)
+{
+ *pdev = omap4_gpio_early_dev;
+ return OMAP4_NR_GPIOS;
+}
+
+int __init omap4_gpio_dev_reg(void)
+{
+ if (cpu_is_omap44xx()) {
+ platform_device_register(&omap4_gpio1);
+ platform_device_register(&omap4_gpio2);
+ platform_device_register(&omap4_gpio3);
+ platform_device_register(&omap4_gpio4);
+ platform_device_register(&omap4_gpio5);
+ platform_device_register(&omap4_gpio6);
+ }
+ return 0;
+}
+arch_initcall(omap4_gpio_dev_reg);
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index e822a41..d2d9d17 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -89,7 +89,6 @@
#define OMAP4_GPIO_IRQWAKEN0 0x0044
#define OMAP4_GPIO_IRQWAKEN1 0x0048
#define OMAP4_GPIO_SYSSTATUS 0x0114
-#define OMAP4_GPIO_SYSSTATUS 0x0114
#define OMAP4_GPIO_IRQENABLE1 0x011c
#define OMAP4_GPIO_WAKE_EN 0x0120
#define OMAP4_GPIO_IRQSTATUS2 0x0128
@@ -112,6 +111,8 @@
extern void omap2_gpio_init_data(void);
extern void omap3_gpio_init_data(void);
+extern void omap4_gpio_init_data(void);
extern int omap2_early_init_gpio(struct platform_device ***pdev);
extern int omap3_early_init_gpio(struct platform_device ***pdev);
+extern int omap4_early_init_gpio(struct platform_device ***pdev);
#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support
2010-03-31 12:23 ` [PATCH 4/8] OMAP4:GPIO:Add " Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 6/8] OMAP1:GPIO:Support for OMAP1 specific gpio Charulatha V
2010-04-01 9:30 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Tony Lindgren
0 siblings, 2 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for handling code common to OMAP2PLUS
architecture.
OMAP2PLUS gpio is one of the early platform devices and this patch
adds support to implement the initialization of OMAP2PLUS architecture
GPIO as early platform device.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/gpio.c | 36 +++++++++++++++++++++++++++++++
arch/arm/mach-omap2/include/mach/gpio.h | 1 +
2 files changed, 37 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/gpio.c
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
new file mode 100644
index 0000000..341cdd5
--- /dev/null
+++ b/arch/arm/mach-omap2/gpio.c
@@ -0,0 +1,36 @@
+/*
+ * gpio.c - OMAP2PLUS architecture specific common gpio code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Charulatha V <charu@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <mach/gpio.h>
+
+void __init omap_gpio_early_init(void)
+{
+ struct platform_device **pdev;
+ int no_of_dev;
+
+ if (cpu_is_omap24xx()) {
+ omap2_gpio_init_data();
+ no_of_dev = omap2_early_init_gpio(&pdev);
+ } else if (cpu_is_omap34xx()) {
+ omap3_gpio_init_data();
+ no_of_dev = omap3_early_init_gpio(&pdev);
+ } else if (cpu_is_omap44xx()) {
+ omap4_gpio_init_data();
+ no_of_dev = omap4_early_init_gpio(&pdev);
+ } else
+ return;
+
+ early_platform_add_devices(pdev, no_of_dev);
+ early_platform_driver_register_all("earlygpio");
+ early_platform_driver_probe("earlygpio", no_of_dev, 0);
+}
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
index d2d9d17..3a0fcb1 100644
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ b/arch/arm/mach-omap2/include/mach/gpio.h
@@ -115,4 +115,5 @@ extern void omap4_gpio_init_data(void);
extern int omap2_early_init_gpio(struct platform_device ***pdev);
extern int omap3_early_init_gpio(struct platform_device ***pdev);
extern int omap4_early_init_gpio(struct platform_device ***pdev);
+extern void __init omap_gpio_early_init(void);
#endif
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 6/8] OMAP1:GPIO:Support for OMAP1 specific gpio
2010-03-31 12:23 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Charulatha V
2010-04-01 9:30 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Tony Lindgren
1 sibling, 1 reply; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for handling OMAP1 specific GPIO operations
including gpio_init
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/gpio.c | 404 ++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 404 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap1/gpio.c
diff --git a/arch/arm/mach-omap1/gpio.c b/arch/arm/mach-omap1/gpio.c
new file mode 100644
index 0000000..e54ce07
--- /dev/null
+++ b/arch/arm/mach-omap1/gpio.c
@@ -0,0 +1,404 @@
+/*
+ * gpio.c - OMAP1 architecture specific common gpio code
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Author:
+ * Charulatha V <charu@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <plat/gpio.h>
+
+static struct gpio_bank omap1610_gpio_bank[5] = {
+ { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
+ METHOD_MPUIO },
+ { OMAP1610_GPIO1_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
+ METHOD_GPIO_1610 },
+ { OMAP1610_GPIO2_BASE, NULL, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16,
+ METHOD_GPIO_1610 },
+ { OMAP1610_GPIO3_BASE, NULL, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32,
+ METHOD_GPIO_1610 },
+ { OMAP1610_GPIO4_BASE, NULL, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48,
+ METHOD_GPIO_1610 },
+};
+
+static struct gpio_bank omap1510_gpio_bank[2] = {
+ { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
+ METHOD_MPUIO },
+ { OMAP1510_GPIO_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
+ METHOD_GPIO_1510 }
+};
+
+static struct gpio_bank omap7xx_gpio_bank[7] = {
+ { OMAP1_MPUIO_VBASE, NULL, INT_7XX_MPUIO, IH_MPUIO_BASE,
+ METHOD_MPUIO },
+ { OMAP7XX_GPIO1_BASE, NULL, INT_7XX_GPIO_BANK1, IH_GPIO_BASE,
+ METHOD_GPIO_7XX },
+ { OMAP7XX_GPIO2_BASE, NULL, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+ METHOD_GPIO_7XX },
+ { OMAP7XX_GPIO3_BASE, NULL, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+ METHOD_GPIO_7XX },
+ { OMAP7XX_GPIO4_BASE, NULL, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+ METHOD_GPIO_7XX },
+ { OMAP7XX_GPIO5_BASE, NULL, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128,
+ METHOD_GPIO_7XX },
+ { OMAP7XX_GPIO6_BASE, NULL, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160,
+ METHOD_GPIO_7XX },
+};
+
+static struct gpio_reg_offset omap1610_gpio_reg = {
+ .data_in = OMAP1610_GPIO_DATAIN,
+ .data_out = OMAP1610_GPIO_DATAOUT,
+ .data_out_set = OMAP1610_GPIO_SET_DATAOUT,
+ .data_out_clear = OMAP1610_GPIO_CLEAR_DATAOUT,
+ .dir_ctrl = OMAP1610_GPIO_DIRECTION,
+ .irq_status0 = OMAP1610_GPIO_IRQSTATUS1,
+ .irq_mask = OMAP1610_GPIO_IRQENABLE1,
+ .irq_set = OMAP1610_GPIO_SET_IRQENABLE1,
+ .irq_clear = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .irq_mask_bits = 0xffff,
+ .irq_inv = 0,
+ .wkup_enable = OMAP1610_GPIO_WAKEUPENABLE,
+ .wkup_clear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
+ .wkup_set = OMAP1610_GPIO_SET_WAKEUPENA,
+ .syscfg = OMAP1610_GPIO_SYSCONFIG,
+};
+
+static struct gpio_reg_offset omap1510_gpio_reg = {
+ .data_in = OMAP1510_GPIO_DATA_INPUT,
+ .data_out = OMAP1510_GPIO_DATA_OUTPUT,
+ .dir_ctrl = OMAP1510_GPIO_DIR_CONTROL,
+ .irq_status0 = OMAP1510_GPIO_INT_STATUS,
+ .irq_mask = OMAP1510_GPIO_INT_MASK,
+ .irq_mask_bits = 0xffff,
+ .irq_inv = 1,
+ .ctrl = OMAP1510_GPIO_PIN_CONTROL,
+};
+
+static struct gpio_reg_offset omap7xx_gpio_reg = {
+ .data_in = OMAP7XX_GPIO_DATA_INPUT,
+ .data_out = OMAP7XX_GPIO_DATA_OUTPUT,
+ .dir_ctrl = OMAP7XX_GPIO_DIR_CONTROL,
+ .irq_status0 = OMAP7XX_GPIO_INT_STATUS,
+ .irq_mask = OMAP7XX_GPIO_INT_MASK,
+ .irq_mask_bits = 0xffffffff,
+ .irq_inv = 1,
+};
+
+static struct mpu_gpio_reg_off omap1_gpio_mpureg = {
+ .mpu_io_ctrl = OMAP_MPUIO_IO_CNTL,
+ .mpu_data_out = OMAP_MPUIO_OUTPUT,
+ .mpu_data_in = OMAP_MPUIO_INPUT_LATCH,
+ .mpu_isr = OMAP_MPUIO_GPIO_INT,
+ .mpu_irq_mask = OMAP_MPUIO_GPIO_MASKIT,
+ .mpu_irq_mask_bits = 0xffff,
+ .mpu_irq_inv = 1,
+};
+
+static struct gpio_bank *omap1_get_gpio_bank(int gpio,
+ struct gpio_bank *gpio_bank)
+{
+ if (cpu_is_omap15xx()) {
+ if (OMAP_GPIO_IS_MPUIO(gpio))
+ return &gpio_bank[0];
+ return &gpio_bank[1];
+ } else if (cpu_is_omap16xx()) {
+ if (OMAP_GPIO_IS_MPUIO(gpio))
+ return &gpio_bank[0];
+ return &gpio_bank[1 + (gpio >> 4)];
+ } else if (cpu_is_omap7xx()) {
+ if (OMAP_GPIO_IS_MPUIO(gpio))
+ return &gpio_bank[0];
+ return &gpio_bank[1 + (gpio >> 5)];
+ }
+ BUG();
+ return NULL;
+}
+
+/*
+ * This only applies to chips that can't do both rising and falling edge
+ * detection at once. For all other chips, this function is a noop.
+ */
+static void omap1_toggle_edge_triggering(struct gpio_bank *bank, int gpio)
+{
+ void __iomem *reg = bank->base;
+ u32 l = 0;
+
+ switch (bank->method) {
+ case METHOD_MPUIO:
+ reg += OMAP_MPUIO_GPIO_INT_EDGE;
+ break;
+ case METHOD_GPIO_1510:
+ reg += OMAP1510_GPIO_INT_CONTROL;
+ break;
+ case METHOD_GPIO_7XX:
+ reg += OMAP7XX_GPIO_INT_CONTROL;
+ break;
+ default:
+ return;
+ }
+
+ l = __raw_readl(reg);
+ if ((l >> gpio) & 1)
+ l &= ~(1 << gpio);
+ else
+ l |= 1 << gpio;
+
+ __raw_writel(l, reg);
+}
+
+static int set_omap1_gpio_triggering(struct gpio_bank *bank, int gpio,
+ int trigger)
+{
+ void __iomem *reg = bank->base;
+ u32 l = 0;
+
+ switch (bank->method) {
+ case METHOD_MPUIO:
+ reg += OMAP_MPUIO_GPIO_INT_EDGE;
+ l = __raw_readl(reg);
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
+ bank->toggle_mask |= 1 << gpio;
+ if (trigger & IRQ_TYPE_EDGE_RISING)
+ l |= 1 << gpio;
+ else if (trigger & IRQ_TYPE_EDGE_FALLING)
+ l &= ~(1 << gpio);
+ else
+ goto bad;
+ break;
+ case METHOD_GPIO_1510:
+ reg += OMAP1510_GPIO_INT_CONTROL;
+ l = __raw_readl(reg);
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
+ bank->toggle_mask |= 1 << gpio;
+ if (trigger & IRQ_TYPE_EDGE_RISING)
+ l |= 1 << gpio;
+ else if (trigger & IRQ_TYPE_EDGE_FALLING)
+ l &= ~(1 << gpio);
+ else
+ goto bad;
+ break;
+ case METHOD_GPIO_1610:
+ if (gpio & 0x08)
+ reg += OMAP1610_GPIO_EDGE_CTRL2;
+ else
+ reg += OMAP1610_GPIO_EDGE_CTRL1;
+ gpio &= 0x07;
+ l = __raw_readl(reg);
+ l &= ~(3 << (gpio << 1));
+ if (trigger & IRQ_TYPE_EDGE_RISING)
+ l |= 2 << (gpio << 1);
+ if (trigger & IRQ_TYPE_EDGE_FALLING)
+ l |= 1 << (gpio << 1);
+ if (trigger)
+ /* Enable wake-up during idle for dynamic tick */
+ __raw_writel(1 << gpio, bank->base +
+ OMAP1610_GPIO_SET_WAKEUPENA);
+ else
+ __raw_writel(1 << gpio, bank->base +
+ OMAP1610_GPIO_CLEAR_WAKEUPENA);
+ break;
+ case METHOD_GPIO_7XX:
+ reg += OMAP7XX_GPIO_INT_CONTROL;
+ l = __raw_readl(reg);
+ if (trigger & IRQ_TYPE_EDGE_BOTH)
+ bank->toggle_mask |= 1 << gpio;
+ if (trigger & IRQ_TYPE_EDGE_RISING)
+ l |= 1 << gpio;
+ else if (trigger & IRQ_TYPE_EDGE_FALLING)
+ l &= ~(1 << gpio);
+ else
+ goto bad;
+ break;
+ default:
+ goto bad;
+ }
+ __raw_writel(l, reg);
+ return 0;
+bad:
+ return -EINVAL;
+}
+
+#ifdef CONFIG_ARCH_OMAP16XX
+static int omap_mpuio_suspend_noirq(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
+ unsigned long flags;
+
+ spin_lock_irqsave(&bank->lock, flags);
+ bank->saved_wakeup = __raw_readl(mask_reg);
+ __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
+ spin_unlock_irqrestore(&bank->lock, flags);
+
+ return 0;
+}
+
+static int omap_mpuio_resume_noirq(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
+ unsigned long flags;
+
+ spin_lock_irqsave(&bank->lock, flags);
+ __raw_writel(bank->saved_wakeup, mask_reg);
+ spin_unlock_irqrestore(&bank->lock, flags);
+
+ return 0;
+}
+
+static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
+ .suspend_noirq = omap_mpuio_suspend_noirq,
+ .resume_noirq = omap_mpuio_resume_noirq,
+};
+
+/* use platform_driver for this, now that there's no longer any
+ * point to sys_device (other than not disturbing old code).
+ */
+static struct platform_driver omap_mpuio_driver = {
+ .driver = {
+ .name = "mpuio",
+ .pm = &omap_mpuio_dev_pm_ops,
+ },
+};
+
+static struct platform_device omap_mpuio_device = {
+ .name = "mpuio",
+ .id = -1,
+ .dev = {
+ .driver = &omap_mpuio_driver.driver,
+ }
+ /* could list the /proc/iomem resources */
+};
+
+void mpuio_init(void)
+{
+ platform_set_drvdata(&omap_mpuio_device, &omap1610_gpio_bank[0]);
+
+ if (platform_driver_register(&omap_mpuio_driver) == 0)
+ (void) platform_device_register(&omap_mpuio_device);
+}
+#else
+static struct platform_device omap_mpuio_device;
+void mpuio_init(void) {}
+#endif
+
+/*
+ * OMAP1 GPIO function pointers, reg offset pointer and other info
+ */
+static struct omap_gpio_info omap1_gpio_data = {
+ .get_gpio_bank = omap1_get_gpio_bank,
+ .set_gpio_triggering = set_omap1_gpio_triggering,
+ .toggle_edge_triggering = omap1_toggle_edge_triggering,
+ .mpu_reg = &omap1_gpio_mpureg,
+};
+
+static void __init omap1_init_gpio(struct gpio_bank *gpio_bank)
+{
+ int i;
+ struct gpio_bank *bank;
+
+ if (cpu_is_omap15xx()) {
+ struct clk *gpio_ick;
+ gpio_ick = clk_get(NULL, "arm_gpio_ck");
+ if (IS_ERR(gpio_ick))
+ printk(KERN_ERR "Could not get arm_gpio_ck\n");
+ else
+ clk_enable(gpio_ick);
+ }
+
+ for (i = 0; i < omap1_gpio_data.bank_count; i++) {
+ bank = &gpio_bank[i];
+ spin_lock_init(&bank->lock);
+
+ /* Static mapping, never released */
+ bank->base = ioremap(bank->pbase, SZ_2K);
+ if (!bank->base) {
+ printk(KERN_ERR "Could not ioremap gpio bank%i\n", i);
+ continue;
+ }
+ }
+
+ if (bank_is_mpuio(bank))
+ __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
+ else if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
+ __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
+ __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
+ } else if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
+ __raw_writew(0x0000, bank->base + OMAP1610_GPIO_IRQENABLE1);
+ __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
+ __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
+ } else if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
+ __raw_writel(0xffffffff, bank->base + OMAP7XX_GPIO_INT_MASK);
+ __raw_writel(0x00000000, bank->base + OMAP7XX_GPIO_INT_STATUS);
+ }
+
+ if (cpu_is_omap16xx()) {
+ u32 rev;
+ /* Enable system clock for GPIO module.
+ * The CAM_CLK_CTRL *is* really the right place.
+ */
+ bank->chip.dev = &omap_mpuio_device.dev;
+ if (bank_is_mpuio(bank))
+ omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) |
+ 0x04, ULPD_CAM_CLK_CTRL);
+ rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
+ printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
+ (rev >> 4) & 0x0f, rev & 0x0f);
+ }
+}
+
+static void __init omap1_gpio_init(void)
+{
+ if (cpu_is_omap16xx()) {
+ omap1_gpio_data.reg_off = &omap1610_gpio_reg;
+ omap1_gpio_data.index_mask = 0x0f;
+ omap1_gpio_data.no_of_gpio = 64;
+ omap1_gpio_data.bank_count = 5;
+ omap1_gpio_data.bank_bits = 16;
+ omap1_gpio_data.gpio_bank = omap1610_gpio_bank;
+ } else if (cpu_is_omap15xx()) {
+ omap1_gpio_data.reg_off = &omap1510_gpio_reg;
+ omap1_gpio_data.index_mask = 0x0f;
+ omap1_gpio_data.no_of_gpio = 16;
+ omap1_gpio_data.bank_count = 2;
+ omap1_gpio_data.bank_bits = 16;
+ omap1_gpio_data.gpio_bank = omap1510_gpio_bank;
+ } else if (cpu_is_omap7xx()) {
+ omap1_gpio_data.reg_off = &omap7xx_gpio_reg;
+ omap1_gpio_data.index_mask = 0x1f;
+ omap1_gpio_data.no_of_gpio = 192;
+ omap1_gpio_data.bank_count = 7;
+ omap1_gpio_data.bank_bits = 32;
+ omap1_gpio_data.gpio_bank = omap7xx_gpio_bank;
+ }
+ omap1_init_gpio(omap1_gpio_data.gpio_bank);
+ gpio_init(&omap1_gpio_data);
+}
+
+/*
+ * This may get called early from board specific init
+ * for boards that have interrupts routed via FPGA.
+ */
+int __init omap_gpio_init(void)
+{
+ int i;
+ static int initialized;
+
+ if ((!initialized) && cpu_class_is_omap1()) {
+ omap1_gpio_init();
+ for (i = 0; i < omap1_gpio_data.bank_count; i++)
+ init_gpio_chip_irq(omap1_gpio_data.gpio_bank);
+
+ mpuio_init();
+ }
+ initialized = 1;
+
+ return 0;
+}
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw
2010-03-31 12:23 ` [PATCH 6/8] OMAP1:GPIO:Support for OMAP1 specific gpio Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-03-31 12:23 ` [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs Charulatha V
` (2 more replies)
0 siblings, 3 replies; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This is preparation for early platform device implementation
for GPIO in OMAP2PLUS. This patch moves initialization of gpio
from board files to omap2_init_common_hw API in io.c
Init_irq needs to be done before gpio_init, the init_irq
is called before omap2_init_common_hw in board files
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap2/board-2430sdp.c | 3 +--
arch/arm/mach-omap2/board-3430sdp.c | 3 +--
arch/arm/mach-omap2/board-3630sdp.c | 3 +--
arch/arm/mach-omap2/board-4430sdp.c | 3 +--
arch/arm/mach-omap2/board-am3517evm.c | 3 +--
arch/arm/mach-omap2/board-apollon.c | 3 +--
arch/arm/mach-omap2/board-cm-t35.c | 3 +--
arch/arm/mach-omap2/board-devkit8000.c | 3 +--
arch/arm/mach-omap2/board-generic.c | 2 +-
arch/arm/mach-omap2/board-h4.c | 3 +--
arch/arm/mach-omap2/board-igep0020.c | 3 +--
arch/arm/mach-omap2/board-ldp.c | 3 +--
arch/arm/mach-omap2/board-n8x0.c | 3 +--
arch/arm/mach-omap2/board-omap3beagle.c | 3 +--
arch/arm/mach-omap2/board-omap3evm.c | 3 +--
arch/arm/mach-omap2/board-omap3pandora.c | 3 +--
arch/arm/mach-omap2/board-omap3touchbook.c | 3 +--
arch/arm/mach-omap2/board-overo.c | 3 +--
arch/arm/mach-omap2/board-rx51.c | 3 +--
arch/arm/mach-omap2/board-zoom2.c | 3 +--
arch/arm/mach-omap2/board-zoom3.c | 3 +--
arch/arm/mach-omap2/io.c | 2 ++
22 files changed, 23 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 01d113f..7f55fcf 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -146,9 +146,8 @@ static void __init omap_2430sdp_init_irq(void)
{
omap_board_config = sdp2430_config;
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
}
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 5822bcf..6cd640c 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -327,9 +327,8 @@ static void __init omap_3430sdp_init_irq(void)
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
- omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
}
static int sdp3430_batt_table[] = {
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 504d2bd..843a729 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -79,10 +79,9 @@ static void __init omap_sdp_init_irq(void)
{
omap_board_config = sdp_config;
omap_board_config_size = ARRAY_SIZE(sdp_config);
+ omap_init_irq();
omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index b88f28c..baf5955 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -97,12 +97,11 @@ static void __init omap_4430sdp_init_irq(void)
{
omap_board_config = sdp4430_config;
omap_board_config_size = ARRAY_SIZE(sdp4430_config);
+ gic_init_irq();
omap2_init_common_hw(NULL, NULL);
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(1);
#endif
- gic_init_irq();
- omap_gpio_init();
}
static struct omap_musb_board_data musb_board_data = {
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 6ae8805..ea52dc9 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -268,9 +268,8 @@ static void __init am3517_evm_init_irq(void)
omap_board_config = am3517_evm_config;
omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
}
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index aa69fb9..3fe86df 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -277,9 +277,8 @@ static void __init omap_apollon_init_irq(void)
{
omap_board_config = apollon_config;
omap_board_config_size = ARRAY_SIZE(apollon_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
apollon_init_smc91x();
}
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 2de4f79..596acba 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -701,10 +701,9 @@ static void __init cm_t35_init_irq(void)
omap_board_config = cm_t35_config;
omap_board_config_size = ARRAY_SIZE(cm_t35_config);
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
static void __init cm_t35_map_io(void)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 5bfc13b..0e8d38c 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -481,13 +481,12 @@ static void __init devkit8000_init_irq(void)
{
omap_board_config = devkit8000_config;
omap_board_config_size = ARRAY_SIZE(devkit8000_config);
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
- omap_gpio_init();
}
static void __init devkit8000_ads7846_init(void)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 16cc068..9ba0777 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -38,8 +38,8 @@ static void __init omap_generic_init_irq(void)
{
omap_board_config = generic_config;
omap_board_config_size = ARRAY_SIZE(generic_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
+ omap2_init_common_hw(NULL, NULL);
}
static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0665f2c..a143e64 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -312,9 +312,8 @@ static void __init omap_h4_init_irq(void)
{
omap_board_config = h4_config;
omap_board_config_size = ARRAY_SIZE(h4_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
h4_init_flash();
}
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 3c7789d..885313e 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -404,9 +404,8 @@ static void __init igep2_init_irq(void)
{
omap_board_config = igep2_config;
omap_board_config_size = ARRAY_SIZE(igep2_config);
- omap2_init_common_hw(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(m65kxxxxam_sdrc_params, m65kxxxxam_sdrc_params);
}
static struct twl4030_codec_audio_data igep2_audio_data = {
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 5fcb52e..f0d6ad9 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -290,9 +290,8 @@ static void __init omap_ldp_init_irq(void)
{
omap_board_config = ldp_config;
omap_board_config_size = ARRAY_SIZE(ldp_config);
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
ldp_init_smsc911x();
}
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 131ce3c..396ef39 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -673,9 +673,8 @@ static void __init n8x0_map_io(void)
static void __init n8x0_init_irq(void)
{
- omap2_init_common_hw(NULL, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(NULL, NULL);
}
static void __init n8x0_init_machine(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 962d377..96d44f4 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -357,13 +357,12 @@ static void __init omap3_beagle_init_irq(void)
{
omap_board_config = omap3_beagle_config;
omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
- omap_gpio_init();
}
static struct platform_device *omap3_beagle_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 017bb2f..a592773 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -626,9 +626,8 @@ static void __init omap3_evm_init_irq(void)
{
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
- omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
}
static struct platform_device *omap3_evm_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 395d049..7606170 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -533,10 +533,9 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
static void __init omap3pandora_init_irq(void)
{
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
static struct platform_device *omap3pandora_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 2504d41..fa35ffe 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -439,13 +439,12 @@ static void __init omap3_touchbook_init_irq(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_board_config = omap3_touchbook_config;
omap_board_config_size = ARRAY_SIZE(omap3_touchbook_config);
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
- omap_gpio_init();
}
static struct platform_device *omap3_touchbook_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8848c7c..830515e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -384,10 +384,9 @@ static void __init overo_init_irq(void)
{
omap_board_config = overo_config;
omap_board_config_size = ARRAY_SIZE(overo_config);
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
static struct platform_device *overo_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index b155c36..dbaaf56 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -105,9 +105,8 @@ static void __init rx51_init_irq(void)
omap_board_config_size = ARRAY_SIZE(rx51_config);
omap3_pm_init_cpuidle(rx51_cpuidle_params);
sdrc_params = rx51_get_sdram_timings();
- omap2_init_common_hw(sdrc_params, sdrc_params);
omap_init_irq();
- omap_gpio_init();
+ omap2_init_common_hw(sdrc_params, sdrc_params);
}
extern void __init rx51_peripherals_init(void);
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 9a26f84..6238338 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -28,10 +28,9 @@
static void __init omap_zoom2_init_irq(void)
{
+ omap_init_irq();
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
/* REVISIT: These audio entries can be removed once MFD code is merged */
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index cd3e40c..ff2fb22 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -38,10 +38,9 @@ static void __init omap_zoom_init_irq(void)
{
omap_board_config = zoom_config;
omap_board_config_size = ARRAY_SIZE(zoom_config);
+ omap_init_irq();
omap2_init_common_hw(h8mbx00u0mer0em_sdrc_params,
h8mbx00u0mer0em_sdrc_params);
- omap_init_irq();
- omap_gpio_init();
}
#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 87f676a..e6e5834 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -34,6 +34,7 @@
#include <plat/gpmc.h>
#include <plat/serial.h>
#include <plat/vram.h>
+#include <plat/gpio.h>
#include "clock2xxx.h"
#include "clock3xxx.h"
@@ -339,4 +340,5 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
_omap2_init_reprogram_sdrc();
}
gpmc_init();
+ omap_gpio_init();
}
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs
2010-03-31 12:23 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Charulatha V
@ 2010-03-31 12:23 ` Charulatha V
2010-04-01 9:34 ` Tony Lindgren
2010-04-01 9:32 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Tony Lindgren
2010-04-06 22:13 ` Kevin Hilman
2 siblings, 1 reply; 35+ messages in thread
From: Charulatha V @ 2010-03-31 12:23 UTC (permalink / raw)
To: linux-omap; +Cc: rnayak, paul, tony, Charulatha V
This patch adds support for common GPIO code in plat-omap layer
to perform most common operations for all OMAPs. This is handled
by getting function pointers and register offsets from
architecture specific files in mach-omap layer.
The common APIs are handled by plat-omap/gpio.c file. Specific function,
eg., get_gpio_bank, set_gpio_triggering, etc., are handled differently
in different architectures. Hence they are handled in mach-omap layer.
This patch also adds support for passing platform_data for OMAP2PLUS.
For OMAP1, it still supports the old way of doing omap_gpio_init which
would be handled in mach-omap1 layer.
This patch is in prepartion for HWMOD FW adaptation for GPIO module.
Signed-off-by: Charulatha V <charu@ti.com>
---
arch/arm/mach-omap1/Makefile | 2 +-
arch/arm/mach-omap2/Makefile | 7 +-
arch/arm/mach-omap2/io.c | 2 +-
arch/arm/plat-omap/gpio.c | 1645 +++++++-------------------------
arch/arm/plat-omap/include/plat/gpio.h | 25 +-
5 files changed, 401 insertions(+), 1280 deletions(-)
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index b6a537c..21629f2 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -4,7 +4,7 @@
# Common support
obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o
-obj-y += clock.o clock_data.o opp_data.o
+obj-y += clock.o clock_data.o opp_data.o gpio.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 4b9fc57..53d1a2b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
#
# Common support
-obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o gpio.o
omap-2-3-common = irq.o sdrc.o
hwmod-common = omap_hwmod.o \
@@ -42,6 +42,11 @@ obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
# obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o
+# GPIO
+obj-$(CONFIG_ARCH_OMAP2) += gpio2xxx.o
+obj-$(CONFIG_ARCH_OMAP3) += gpio3xxx.o
+obj-$(CONFIG_ARCH_OMAP4) += gpio44xx.o
+
# Power Management
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e6e5834..2b9efda 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -340,5 +340,5 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
_omap2_init_reprogram_sdrc();
}
gpmc_init();
- omap_gpio_init();
+ omap_gpio_early_init();
}
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 069dd66..2d4faa9 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -16,151 +16,14 @@
#include <plat/gpio.h>
-#ifdef CONFIG_ARCH_OMAP16XX
-static struct gpio_bank gpio_bank_1610[5] = {
- { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
- METHOD_MPUIO },
- { OMAP1610_GPIO1_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_1610 },
- { OMAP1610_GPIO2_BASE, NULL, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16,
- METHOD_GPIO_1610 },
- { OMAP1610_GPIO3_BASE, NULL, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32,
- METHOD_GPIO_1610 },
- { OMAP1610_GPIO4_BASE, NULL, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48,
- METHOD_GPIO_1610 },
-};
-#endif
-
-#ifdef CONFIG_ARCH_OMAP15XX
-static struct gpio_bank gpio_bank_1510[2] = {
- { OMAP1_MPUIO_VBASE, NULL, INT_MPUIO, IH_MPUIO_BASE,
- METHOD_MPUIO },
- { OMAP1510_GPIO_BASE, NULL, INT_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_1510 }
-};
-#endif
-
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-static struct gpio_bank gpio_bank_7xx[7] = {
- { OMAP1_MPUIO_VBASE, NULL, INT_7XX_MPUIO, IH_MPUIO_BASE,
- METHOD_MPUIO },
- { OMAP7XX_GPIO1_BASE, NULL, INT_7XX_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_7XX },
- { OMAP7XX_GPIO2_BASE, NULL, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32,
- METHOD_GPIO_7XX },
- { OMAP7XX_GPIO3_BASE, NULL, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64,
- METHOD_GPIO_7XX },
- { OMAP7XX_GPIO4_BASE, NULL, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96,
- METHOD_GPIO_7XX },
- { OMAP7XX_GPIO5_BASE, NULL, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128,
- METHOD_GPIO_7XX },
- { OMAP7XX_GPIO6_BASE, NULL, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160,
- METHOD_GPIO_7XX },
-};
-#endif
-
-#ifdef CONFIG_ARCH_OMAP2
-
-static struct gpio_bank gpio_bank_242x[4] = {
- { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_24XX },
- { OMAP242X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
- METHOD_GPIO_24XX },
- { OMAP242X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
- METHOD_GPIO_24XX },
- { OMAP242X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
- METHOD_GPIO_24XX },
-};
-
-static struct gpio_bank gpio_bank_243x[5] = {
- { OMAP243X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_24XX },
- { OMAP243X_GPIO2_BASE, NULL, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
- METHOD_GPIO_24XX },
- { OMAP243X_GPIO3_BASE, NULL, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
- METHOD_GPIO_24XX },
- { OMAP243X_GPIO4_BASE, NULL, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
- METHOD_GPIO_24XX },
- { OMAP243X_GPIO5_BASE, NULL, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128,
- METHOD_GPIO_24XX },
-};
-
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-static struct gpio_bank gpio_bank_34xx[6] = {
- { OMAP34XX_GPIO1_BASE, NULL, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_24XX },
- { OMAP34XX_GPIO2_BASE, NULL, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,
- METHOD_GPIO_24XX },
- { OMAP34XX_GPIO3_BASE, NULL, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,
- METHOD_GPIO_24XX },
- { OMAP34XX_GPIO4_BASE, NULL, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,
- METHOD_GPIO_24XX },
- { OMAP34XX_GPIO5_BASE, NULL, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128,
- METHOD_GPIO_24XX },
- { OMAP34XX_GPIO6_BASE, NULL, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160,
- METHOD_GPIO_24XX },
-};
-
-static struct omap_gpio_reg_val gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-static struct gpio_bank gpio_bank_44xx[6] = {
- { OMAP44XX_GPIO1_BASE, NULL, OMAP44XX_IRQ_GPIO1, IH_GPIO_BASE,
- METHOD_GPIO_44XX },
- { OMAP44XX_GPIO2_BASE, NULL, OMAP44XX_IRQ_GPIO2, IH_GPIO_BASE + 32,
- METHOD_GPIO_44XX },
- { OMAP44XX_GPIO3_BASE, NULL, OMAP44XX_IRQ_GPIO3, IH_GPIO_BASE + 64,
- METHOD_GPIO_44XX },
- { OMAP44XX_GPIO4_BASE, NULL, OMAP44XX_IRQ_GPIO4, IH_GPIO_BASE + 96,
- METHOD_GPIO_44XX },
- { OMAP44XX_GPIO5_BASE, NULL, OMAP44XX_IRQ_GPIO5, IH_GPIO_BASE + 128,
- METHOD_GPIO_44XX },
- { OMAP44XX_GPIO6_BASE, NULL, OMAP44XX_IRQ_GPIO6, IH_GPIO_BASE + 160,
- METHOD_GPIO_44XX },
-};
-
-#endif
-
-static struct gpio_bank *gpio_bank;
-static int gpio_bank_count;
-
-static inline struct gpio_bank *get_gpio_bank(int gpio)
-{
- if (cpu_is_omap15xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return &gpio_bank[0];
- return &gpio_bank[1];
- }
- if (cpu_is_omap16xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return &gpio_bank[0];
- return &gpio_bank[1 + (gpio >> 4)];
- }
- if (cpu_is_omap7xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return &gpio_bank[0];
- return &gpio_bank[1 + (gpio >> 5)];
- }
- if (cpu_is_omap24xx())
- return &gpio_bank[gpio >> 5];
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return &gpio_bank[gpio >> 5];
- BUG();
- return NULL;
-}
+static struct omap_gpio_info *arch_gpio;
+static struct gpio_bank gpio_bank[7];
+static struct omap_gpio_reg_val *gpio_context;
+static int gpio_bank_count;
static inline int get_gpio_index(int gpio)
{
- if (cpu_is_omap7xx())
- return gpio & 0x1f;
- if (cpu_is_omap24xx())
- return gpio & 0x1f;
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return gpio & 0x1f;
- return gpio & 0x0f;
+ return gpio & arch_gpio->index_mask;
}
static inline int gpio_valid(int gpio)
@@ -171,16 +34,7 @@ static inline int gpio_valid(int gpio)
if (gpio >= OMAP_MAX_GPIO_LINES + 16)
return -1;
return 0;
- }
- if (cpu_is_omap15xx() && gpio < 16)
- return 0;
- if ((cpu_is_omap16xx()) && gpio < 64)
- return 0;
- if (cpu_is_omap7xx() && gpio < 192)
- return 0;
- if (cpu_is_omap24xx() && gpio < 128)
- return 0;
- if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192)
+ } else if (gpio < arch_gpio->no_of_gpio)
return 0;
return -1;
}
@@ -200,41 +54,11 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
void __iomem *reg = bank->base;
u32 l;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_IO_CNTL;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_DIR_CONTROL;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_DIRECTION;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_DIR_CONTROL;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_OE;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- case METHOD_GPIO_44XX:
- reg += OMAP4_GPIO_OE;
- break;
-#endif
- default:
- WARN_ON(1);
- return;
- }
+ if (bank->method == METHOD_MPUIO)
+ reg += arch_gpio->mpu_reg->mpu_io_ctrl;
+ else
+ reg += arch_gpio->reg_off->dir_ctrl;
+
l = __raw_readl(reg);
if (is_input)
l |= 1 << gpio;
@@ -248,67 +72,29 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
void __iomem *reg = bank->base;
u32 l = 0;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_OUTPUT;
+ if (bank->method == METHOD_MPUIO) {
+ reg += arch_gpio->mpu_reg->mpu_data_out;
l = __raw_readl(reg);
if (enable)
l |= 1 << gpio;
else
l &= ~(1 << gpio);
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_DATA_OUTPUT;
- l = __raw_readl(reg);
- if (enable)
- l |= 1 << gpio;
- else
- l &= ~(1 << gpio);
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- if (enable)
- reg += OMAP1610_GPIO_SET_DATAOUT;
- else
- reg += OMAP1610_GPIO_CLEAR_DATAOUT;
+
+ } else if (arch_gpio->reg_off->data_out_set && enable) {
+ reg += arch_gpio->reg_off->data_out_set;
l = 1 << gpio;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_DATA_OUTPUT;
+
+ } else if (arch_gpio->reg_off->data_out_clear && (!enable)) {
+ reg += arch_gpio->reg_off->data_out_clear;
+ l = 1 << gpio;
+
+ } else {
+ reg += arch_gpio->reg_off->data_out;
l = __raw_readl(reg);
if (enable)
l |= 1 << gpio;
else
l &= ~(1 << gpio);
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- if (enable)
- reg += OMAP24XX_GPIO_SETDATAOUT;
- else
- reg += OMAP24XX_GPIO_CLEARDATAOUT;
- l = 1 << gpio;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- if (enable)
- reg += OMAP4_GPIO_SETDATAOUT;
- else
- reg += OMAP4_GPIO_CLEARDATAOUT;
- l = 1 << gpio;
- break;
-#endif
- default:
- WARN_ON(1);
- return;
}
__raw_writel(l, reg);
}
@@ -320,40 +106,11 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
if (check_gpio(gpio) < 0)
return -EINVAL;
reg = bank->base;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_INPUT_LATCH;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_DATA_INPUT;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_DATAIN;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_DATA_INPUT;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_DATAIN;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- reg += OMAP4_GPIO_DATAIN;
- break;
-#endif
- default:
- return -EINVAL;
- }
+
+ if (bank->method == METHOD_MPUIO)
+ reg += arch_gpio->mpu_reg->mpu_data_in;
+ else
+ reg += arch_gpio->reg_off->data_in;
return (__raw_readl(reg)
& (1 << get_gpio_index(gpio))) != 0;
}
@@ -366,48 +123,14 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
return -EINVAL;
reg = bank->base;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_OUTPUT;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_DATA_OUTPUT;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_DATAOUT;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_DATA_OUTPUT;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- reg += OMAP24XX_GPIO_DATAOUT;
- break;
-#endif
- default:
- return -EINVAL;
- }
+ if (bank->method == METHOD_MPUIO)
+ reg += arch_gpio->mpu_reg->mpu_data_out;
+ else
+ reg += arch_gpio->reg_off->data_out;
return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0;
}
-#define MOD_REG_BIT(reg, bit_mask, set) \
-do { \
- int l = __raw_readl(base + reg); \
- if (set) l |= bit_mask; \
- else l &= ~bit_mask; \
- __raw_writel(l, base + reg); \
-} while(0)
-
void omap_set_gpio_debounce(int gpio, int enable)
{
struct gpio_bank *bank;
@@ -418,15 +141,9 @@ void omap_set_gpio_debounce(int gpio, int enable)
if (cpu_class_is_omap1())
return;
- bank = get_gpio_bank(gpio);
+ bank = arch_gpio->get_gpio_bank(gpio, gpio_bank);
reg = bank->base;
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_DEBOUNCENABLE;
- else
- reg += OMAP24XX_GPIO_DEBOUNCE_EN;
-#endif
+ reg += arch_gpio->reg_off->debounce_ena;
if (!(bank->mod_usage & l)) {
printk(KERN_ERR "GPIO %d not requested\n", gpio);
@@ -464,7 +181,7 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
if (cpu_class_is_omap1())
return;
- bank = get_gpio_bank(gpio);
+ bank = arch_gpio->get_gpio_bank(gpio, gpio_bank);
reg = bank->base;
if (!bank->mod_usage) {
@@ -472,203 +189,15 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
return;
}
+ reg += arch_gpio->reg_off->debounce_val;
enc_time &= 0xff;
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_DEBOUNCINGTIME;
- else
- reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
-#endif
-
__raw_writel(enc_time, reg);
}
EXPORT_SYMBOL(omap_set_gpio_debounce_time);
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
- int trigger)
-{
- void __iomem *base = bank->base;
- u32 gpio_bit = 1 << gpio;
- u32 val;
-
- if (cpu_is_omap44xx()) {
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- } else {
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- }
- if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
- if (cpu_is_omap44xx()) {
- if (trigger != 0)
- __raw_writel(1 << gpio, bank->base+
- OMAP4_GPIO_IRQWAKEN0);
- else {
- val = __raw_readl(bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- __raw_writel(val & (~(1 << gpio)), bank->base +
- OMAP4_GPIO_IRQWAKEN0);
- }
- } else {
- if (trigger != 0)
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_SETWKUENA);
- else
- __raw_writel(1 << gpio, bank->base
- + OMAP24XX_GPIO_CLEARWKUENA);
- }
- } else {
- if (trigger != 0)
- bank->enabled_non_wakeup_gpios |= gpio_bit;
- else
- bank->enabled_non_wakeup_gpios &= ~gpio_bit;
- }
-
- if (cpu_is_omap44xx()) {
- bank->level_mask =
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank->level_mask =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- }
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP1
-/*
- * This only applies to chips that can't do both rising and falling edge
- * detection at once. For all other chips, this function is a noop.
- */
-static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
-{
- void __iomem *reg = bank->base;
- u32 l = 0;
-
- switch (bank->method) {
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE;
- break;
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- break;
-#endif
- default:
- return;
- }
-
- l = __raw_readl(reg);
- if ((l >> gpio) & 1)
- l &= ~(1 << gpio);
- else
- l |= 1 << gpio;
-
- __raw_writel(l, reg);
-}
-#endif
-
static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
{
- void __iomem *reg = bank->base;
- u32 l = 0;
-
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_INT_EDGE;
- l = __raw_readl(reg);
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_CONTROL;
- l = __raw_readl(reg);
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- if (gpio & 0x08)
- reg += OMAP1610_GPIO_EDGE_CTRL2;
- else
- reg += OMAP1610_GPIO_EDGE_CTRL1;
- gpio &= 0x07;
- l = __raw_readl(reg);
- l &= ~(3 << (gpio << 1));
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 2 << (gpio << 1);
- if (trigger & IRQ_TYPE_EDGE_FALLING)
- l |= 1 << (gpio << 1);
- if (trigger)
- /* Enable wake-up during idle for dynamic tick */
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
- else
- __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_CONTROL;
- l = __raw_readl(reg);
- if (trigger & IRQ_TYPE_EDGE_BOTH)
- bank->toggle_mask |= 1 << gpio;
- if (trigger & IRQ_TYPE_EDGE_RISING)
- l |= 1 << gpio;
- else if (trigger & IRQ_TYPE_EDGE_FALLING)
- l &= ~(1 << gpio);
- else
- goto bad;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- set_24xx_gpio_triggering(bank, gpio, trigger);
- break;
-#endif
- default:
- goto bad;
- }
- __raw_writel(l, reg);
- return 0;
-bad:
- return -EINVAL;
+ return arch_gpio->set_gpio_triggering(bank, gpio, trigger);
}
static int gpio_irq_type(unsigned irq, unsigned type)
@@ -715,60 +244,26 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
{
void __iomem *reg = bank->base;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
+ if (bank->method == METHOD_MPUIO)
/* MPUIO irqstatus is reset by reading the status register,
* so do nothing here */
return;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_STATUS;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_IRQSTATUS1;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_STATUS;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_IRQSTATUS1;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- case METHOD_GPIO_44XX:
- reg += OMAP4_GPIO_IRQSTATUS0;
- break;
-#endif
- default:
- WARN_ON(1);
- return;
- }
+ else
+ reg += arch_gpio->reg_off->irq_status0;
__raw_writel(gpio_mask, reg);
-#ifdef CONFIG_ARCH_OMAP2PLUS
- /* Workaround for clearing DSP GPIO interrupts to allow retention */
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
- else if (cpu_is_omap44xx())
- reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
- __raw_writel(gpio_mask, reg);
-
- /* Flush posted write for the irq status to
- * avoid spurious interrupts
+ if (arch_gpio->reg_off->irq_status1) {
+ /* Workaround for clearing DSP GPIO interrupts
+ * to allow retention
*/
- __raw_readl(reg);
+ reg = bank->base + arch_gpio->reg_off->irq_status1;
+ __raw_writel(gpio_mask, reg);
}
-#endif
+
+ /* Flush posted write for the irq status to avoid spurious
+ * interrupts
+ */
+ __raw_readl(reg);
}
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -783,49 +278,14 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
u32 l;
u32 mask;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_MASKIT;
- mask = 0xffff;
- inv = 1;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_MASK;
- mask = 0xffff;
- inv = 1;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_IRQENABLE1;
- mask = 0xffff;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_MASK;
- mask = 0xffffffff;
- inv = 1;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- reg += OMAP24XX_GPIO_IRQENABLE1;
- mask = 0xffffffff;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- case METHOD_GPIO_44XX:
- reg += OMAP4_GPIO_IRQSTATUSSET0;
- mask = 0xffffffff;
- break;
-#endif
- default:
- WARN_ON(1);
- return 0;
+ if (bank->method == METHOD_MPUIO) {
+ reg += arch_gpio->mpu_reg->mpu_irq_mask;
+ mask = arch_gpio->mpu_reg->mpu_irq_mask_bits;
+ inv = arch_gpio->mpu_reg->mpu_irq_inv;
+ } else {
+ reg += arch_gpio->reg_off->irq_mask;
+ mask = arch_gpio->reg_off->irq_mask_bits;
+ inv = arch_gpio->reg_off->irq_inv;
}
l = __raw_readl(reg);
@@ -840,67 +300,29 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
void __iomem *reg = bank->base;
u32 l;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_GPIO_MASKIT;
- l = __raw_readl(reg);
- if (enable)
- l &= ~(gpio_mask);
- else
- l |= gpio_mask;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_MASK;
+ if (bank->method == METHOD_MPUIO) {
+ reg += arch_gpio->mpu_reg->mpu_irq_mask;
l = __raw_readl(reg);
if (enable)
l &= ~(gpio_mask);
else
l |= gpio_mask;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- if (enable)
- reg += OMAP1610_GPIO_SET_IRQENABLE1;
- else
- reg += OMAP1610_GPIO_CLEAR_IRQENABLE1;
+
+ } else if (arch_gpio->reg_off->irq_set && enable) {
+ reg += arch_gpio->reg_off->irq_set;
l = gpio_mask;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_INT_MASK;
+
+ } else if (arch_gpio->reg_off->irq_clear && (!enable)) {
+ reg += arch_gpio->reg_off->irq_clear;
+ l = gpio_mask;
+
+ } else {
+ reg += arch_gpio->reg_off->irq_mask;
l = __raw_readl(reg);
if (enable)
l &= ~(gpio_mask);
else
l |= gpio_mask;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- if (enable)
- reg += OMAP24XX_GPIO_SETIRQENABLE1;
- else
- reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
- l = gpio_mask;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- if (enable)
- reg += OMAP4_GPIO_IRQSTATUSSET0;
- else
- reg += OMAP4_GPIO_IRQSTATUSCLR0;
- l = gpio_mask;
- break;
-#endif
- default:
- WARN_ON(1);
- return;
}
__raw_writel(l, reg);
}
@@ -923,20 +345,20 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
unsigned long uninitialized_var(flags);
switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
+
case METHOD_MPUIO:
case METHOD_GPIO_1610:
- spin_lock_irqsave(&bank->lock, flags);
- if (enable)
- bank->suspend_wakeup |= (1 << gpio);
- else
- bank->suspend_wakeup &= ~(1 << gpio);
- spin_unlock_irqrestore(&bank->lock, flags);
+ if (cpu_is_omap16xx()) {
+ spin_lock_irqsave(&bank->lock, flags);
+ if (enable)
+ bank->suspend_wakeup |= (1 << gpio);
+ else
+ bank->suspend_wakeup &= ~(1 << gpio);
+ spin_unlock_irqrestore(&bank->lock, flags);
+ }
return 0;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
+
+ case METHOD_GPIO_OMAP2PLUS:
if (bank->non_wakeup_gpios & (1 << gpio)) {
printk(KERN_ERR "Unable to modify wakeup on "
"non-wakeup GPIO%d\n",
@@ -950,7 +372,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
bank->suspend_wakeup &= ~(1 << gpio);
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
-#endif
+
default:
printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n",
bank->method);
@@ -993,27 +415,25 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
*/
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-#ifdef CONFIG_ARCH_OMAP15XX
if (bank->method == METHOD_GPIO_1510) {
void __iomem *reg;
/* Claim the pin for MPU */
- reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
+ reg = bank->base + arch_gpio->reg_off->ctrl;
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if (!cpu_class_is_omap1()) {
+
+ if (bank->method == METHOD_GPIO_OMAP2PLUS) {
if (!bank->mod_usage) {
u32 ctrl;
- ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+ void __iomem *reg = bank->base;
+ ctrl = __raw_readl(reg + arch_gpio->reg_off->ctrl);
ctrl &= 0xFFFFFFFE;
/* Module is enabled, clocks are not gated */
- __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
+ __raw_writel(ctrl, reg + arch_gpio->reg_off->ctrl);
}
bank->mod_usage |= 1 << offset;
}
-#endif
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -1025,31 +445,24 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank->method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if ((bank->method == METHOD_GPIO_24XX) ||
- (bank->method == METHOD_GPIO_44XX)) {
+ if (arch_gpio->reg_off->wkup_clear) {
+ void __iomem *reg = bank->base;
+ reg += arch_gpio->reg_off->wkup_clear;
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
__raw_writel(1 << offset, reg);
}
- if (!cpu_class_is_omap1()) {
+
+ if (bank->method == METHOD_GPIO_OMAP2PLUS) {
bank->mod_usage &= ~(1 << offset);
if (!bank->mod_usage) {
u32 ctrl;
- ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+ void __iomem *reg = bank->base;
+ ctrl = __raw_readl(reg + arch_gpio->reg_off->ctrl);
/* Module is disabled, clocks are gated */
ctrl |= 1;
- __raw_writel(ctrl, bank->base + OMAP24XX_GPIO_CTRL);
+ __raw_writel(ctrl, reg + arch_gpio->reg_off->ctrl);
}
}
-#endif
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -1075,30 +488,11 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
desc->chip->ack(irq);
bank = get_irq_data(irq);
-#ifdef CONFIG_ARCH_OMAP1
if (bank->method == METHOD_MPUIO)
- isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- if (bank->method == METHOD_GPIO_1510)
- isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
- if (bank->method == METHOD_GPIO_1610)
- isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- if (bank->method == METHOD_GPIO_7XX)
- isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank->method == METHOD_GPIO_24XX)
- isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- if (bank->method == METHOD_GPIO_44XX)
- isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
-#endif
+ isr_reg = bank->base + arch_gpio->mpu_reg->mpu_isr;
+ else
+ isr_reg = bank->base + arch_gpio->reg_off->irq_status0;
+
while(1) {
u32 isr_saved, level_mask = 0;
u32 enabled;
@@ -1108,10 +502,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
isr &= 0x0000ffff;
-
- if (cpu_class_is_omap2()) {
+ else if (cpu_class_is_omap2())
level_mask = bank->level_mask & enabled;
- }
/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
@@ -1139,7 +531,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (!(isr & 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -1147,9 +538,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
* to respond to the IRQ for the opposite direction.
* This will be indicated in the bank toggle_mask.
*/
- if (bank->toggle_mask & (1 << gpio_index))
- _toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
+ if (cpu_class_is_omap1() &&
+ (bank->toggle_mask & (1 << gpio_index)))
+ arch_gpio->toggle_edge_triggering(bank,
+ gpio_index);
generic_handle_irq(gpio_irq);
}
@@ -1219,12 +611,7 @@ static struct irq_chip gpio_irq_chip = {
.set_wake = gpio_wake_enable,
};
-/*---------------------------------------------------------------------*/
-
-#ifdef CONFIG_ARCH_OMAP1
-
/* MPUIO uses the always-on 32k clock */
-
static void mpuio_ack_irq(unsigned int irq)
{
/* The ISR is reset automatically, so do nothing here. */
@@ -1252,96 +639,8 @@ static struct irq_chip mpuio_irq_chip = {
.mask = mpuio_mask_irq,
.unmask = mpuio_unmask_irq,
.set_type = gpio_irq_type,
-#ifdef CONFIG_ARCH_OMAP16XX
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- .set_wake = gpio_wake_enable,
-#endif
-};
-
-
-#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
-
-
-#ifdef CONFIG_ARCH_OMAP16XX
-
-#include <linux/platform_device.h>
-
-static int omap_mpuio_suspend_noirq(struct device *dev)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct gpio_bank *bank = platform_get_drvdata(pdev);
- void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
- unsigned long flags;
-
- spin_lock_irqsave(&bank->lock, flags);
- bank->saved_wakeup = __raw_readl(mask_reg);
- __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
- spin_unlock_irqrestore(&bank->lock, flags);
-
- return 0;
-}
-
-static int omap_mpuio_resume_noirq(struct device *dev)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct gpio_bank *bank = platform_get_drvdata(pdev);
- void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
- unsigned long flags;
-
- spin_lock_irqsave(&bank->lock, flags);
- __raw_writel(bank->saved_wakeup, mask_reg);
- spin_unlock_irqrestore(&bank->lock, flags);
-
- return 0;
-}
-
-static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
- .suspend_noirq = omap_mpuio_suspend_noirq,
- .resume_noirq = omap_mpuio_resume_noirq,
-};
-
-/* use platform_driver for this, now that there's no longer any
- * point to sys_device (other than not disturbing old code).
- */
-static struct platform_driver omap_mpuio_driver = {
- .driver = {
- .name = "mpuio",
- .pm = &omap_mpuio_dev_pm_ops,
- },
-};
-
-static struct platform_device omap_mpuio_device = {
- .name = "mpuio",
- .id = -1,
- .dev = {
- .driver = &omap_mpuio_driver.driver,
- }
- /* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
-{
- platform_set_drvdata(&omap_mpuio_device, &gpio_bank_1610[0]);
-
- if (platform_driver_register(&omap_mpuio_driver) == 0)
- (void) platform_device_register(&omap_mpuio_device);
-}
-
-#else
-static inline void mpuio_init(void) {}
-#endif /* 16xx */
-
-#else
-
-extern struct irq_chip mpuio_irq_chip;
-
-#define bank_is_mpuio(bank) 0
-static inline void mpuio_init(void) {}
-
-#endif
-
-/*---------------------------------------------------------------------*/
-
/* REVISIT these are stupid implementations! replace by ones that
* don't switch on METHOD_* and which mostly avoid spinlocks
*/
@@ -1362,28 +661,10 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
{
void __iomem *reg = bank->base;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- reg += OMAP_MPUIO_IO_CNTL;
- break;
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_DIR_CONTROL;
- break;
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_DIRECTION;
- break;
- case METHOD_GPIO_7XX:
- reg += OMAP7XX_GPIO_DIR_CONTROL;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- reg += OMAP24XX_GPIO_OE;
- break;
-#endif
- }
+ if (bank->method == METHOD_MPUIO)
+ reg += arch_gpio->mpu_reg->mpu_io_ctrl;
+ else
+ reg += arch_gpio->reg_off->dir_ctrl;
return __raw_readl(reg) & mask;
}
@@ -1395,7 +676,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset)
u32 mask;
gpio = chip->base + offset;
- bank = get_gpio_bank(gpio);
+ bank = arch_gpio->get_gpio_bank(gpio, gpio_bank);
reg = bank->base;
mask = 1 << get_gpio_index(gpio);
@@ -1439,43 +720,11 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
/*---------------------------------------------------------------------*/
-static int initialized;
-#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2)
-static struct clk * gpio_ick;
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-static struct clk * gpio_fck;
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2430)
-static struct clk * gpio5_ick;
-static struct clk * gpio5_fck;
-#endif
-
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
-static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
-#endif
-
-static void __init omap_gpio_show_rev(void)
+static void __init omap_gpio_show_rev(void __iomem *base)
{
u32 rev;
-#ifdef CONFIG_ARCH_OMAP1
- if (cpu_is_omap16xx())
- rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
- else
- return;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
- else if (cpu_is_omap44xx())
- rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
- else
- return;
-#endif
-
+ rev = __raw_readw(base + arch_gpio->reg_off->rev_reg);
printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
(rev >> 4) & 0x0f, rev & 0x0f);
}
@@ -1485,255 +734,167 @@ static void __init omap_gpio_show_rev(void)
*/
static struct lock_class_key gpio_lock_class;
-static int __init _omap_gpio_init(void)
+void __init init_gpio_chip_irq(struct gpio_bank *bank)
{
- int i;
- int gpio = 0;
- struct gpio_bank *bank;
- int bank_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */
- char clk_name[11];
+ int j, gpio_count = arch_gpio->bank_bits;
+ static int gpio;
- initialized = 1;
-
-#if defined(CONFIG_ARCH_OMAP1)
- if (cpu_is_omap15xx()) {
- gpio_ick = clk_get(NULL, "arm_gpio_ck");
- if (IS_ERR(gpio_ick))
- printk("Could not get arm_gpio_ck\n");
- else
- clk_enable(gpio_ick);
+ bank->mod_usage = 0;
+ /* REVISIT eventually switch from OMAP-specific gpio structs
+ * over to the generic ones
+ */
+ bank->chip.request = omap_gpio_request;
+ bank->chip.free = omap_gpio_free;
+ bank->chip.direction_input = gpio_input;
+ bank->chip.get = gpio_get;
+ bank->chip.direction_output = gpio_output;
+ bank->chip.set = gpio_set;
+ bank->chip.to_irq = gpio_2irq;
+ if (bank_is_mpuio(bank)) {
+ bank->chip.label = "mpuio";
+ bank->chip.base = OMAP_MPUIO(0);
+ } else {
+ bank->chip.label = "gpio";
+ bank->chip.base = gpio;
+ gpio += gpio_count;
}
-#endif
-#if defined(CONFIG_ARCH_OMAP2)
- if (cpu_class_is_omap2()) {
- gpio_ick = clk_get(NULL, "gpios_ick");
- if (IS_ERR(gpio_ick))
- printk("Could not get gpios_ick\n");
- else
- clk_enable(gpio_ick);
- gpio_fck = clk_get(NULL, "gpios_fck");
- if (IS_ERR(gpio_fck))
- printk("Could not get gpios_fck\n");
- else
- clk_enable(gpio_fck);
+ bank->chip.ngpio = gpio_count;
- /*
- * On 2430 & 3430 GPIO 5 uses CORE L4 ICLK
- */
-#if defined(CONFIG_ARCH_OMAP2430)
- if (cpu_is_omap2430()) {
- gpio5_ick = clk_get(NULL, "gpio5_ick");
- if (IS_ERR(gpio5_ick))
- printk("Could not get gpio5_ick\n");
- else
- clk_enable(gpio5_ick);
- gpio5_fck = clk_get(NULL, "gpio5_fck");
- if (IS_ERR(gpio5_fck))
- printk("Could not get gpio5_fck\n");
- else
- clk_enable(gpio5_fck);
- }
-#endif
- }
-#endif
+ gpiochip_add(&bank->chip);
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
- sprintf(clk_name, "gpio%d_ick", i + 1);
- gpio_iclks[i] = clk_get(NULL, clk_name);
- if (IS_ERR(gpio_iclks[i]))
- printk(KERN_ERR "Could not get %s\n", clk_name);
- else
- clk_enable(gpio_iclks[i]);
- }
+ for (j = bank->virtual_irq_start;
+ j < bank->virtual_irq_start + gpio_count; j++) {
+ lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
+ set_irq_chip_data(j, bank);
+ if (bank_is_mpuio(bank)) {
+ /* REVISIT: assuming only 16xx supports
+ * MPUIO wake events
+ */
+ if (cpu_is_omap16xx())
+ mpuio_irq_chip.set_wake = gpio_wake_enable;
+ set_irq_chip(j, &mpuio_irq_chip);
+ } else
+ set_irq_chip(j, &gpio_irq_chip);
+ set_irq_handler(j, handle_simple_irq);
+ set_irq_flags(j, IRQF_VALID);
}
-#endif
+ set_irq_chained_handler(bank->irq, gpio_irq_handler);
+ set_irq_data(bank->irq, bank);
+}
+static int __devexit omap_gpio_remove(struct platform_device *pdev)
+{
+ struct omap_gpio_platform_data *pdata = pdev->dev.platform_data;
+ struct gpio_bank *bank;
+ int id;
-#ifdef CONFIG_ARCH_OMAP15XX
- if (cpu_is_omap15xx()) {
- gpio_bank_count = 2;
- gpio_bank = gpio_bank_1510;
- bank_size = SZ_2K;
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
- if (cpu_is_omap16xx()) {
- gpio_bank_count = 5;
- gpio_bank = gpio_bank_1610;
- bank_size = SZ_2K;
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- if (cpu_is_omap7xx()) {
- gpio_bank_count = 7;
- gpio_bank = gpio_bank_7xx;
- bank_size = SZ_2K;
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP2
- if (cpu_is_omap242x()) {
- gpio_bank_count = 4;
- gpio_bank = gpio_bank_242x;
- }
- if (cpu_is_omap243x()) {
- gpio_bank_count = 5;
- gpio_bank = gpio_bank_243x;
+ if (!pdev || !pdata)
+ return 0;
+
+ id = pdev->id;
+ if (id > gpio_bank_count)
+ return 0;
+
+ bank = &gpio_bank[id];
+ if (cpu_is_omap24xx()) {
+ clk_disable(bank->fck);
+ clk_put(bank->fck);
}
-#endif
-#ifdef CONFIG_ARCH_OMAP3
- if (cpu_is_omap34xx()) {
- gpio_bank_count = OMAP34XX_NR_GPIOS;
- gpio_bank = gpio_bank_34xx;
+ clk_disable(bank->ick);
+ clk_put(bank->ick);
+
+ bank->ick = NULL;
+ bank->fck = NULL;
+ bank->initialized = 0;
+ iounmap(bank->base);
+
+ return 0;
+}
+
+static int __devinit omap_gpio_probe(struct platform_device *pdev)
+{
+ struct omap_gpio_platform_data *pdata = pdev->dev.platform_data;
+ struct gpio_bank *bank;
+ struct resource *res;
+ static int initialized;
+ int id;
+
+ if (cpu_class_is_omap1())
+ return -EINVAL;
+
+ if (!pdev || !pdata) {
+ pr_err("GPIO device initialize without"
+ "platform data\n");
+ return -EINVAL;
}
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (cpu_is_omap44xx()) {
- gpio_bank_count = OMAP34XX_NR_GPIOS;
- gpio_bank = gpio_bank_44xx;
+
+ id = pdev->id;
+ if (id > gpio_bank_count) {
+ pr_err("Invalid GPIO device id (%d)\n", id);
+ return -EINVAL;
}
-#endif
- for (i = 0; i < gpio_bank_count; i++) {
- int j, gpio_count = 16;
- bank = &gpio_bank[i];
- spin_lock_init(&bank->lock);
+ bank = &gpio_bank[id];
- /* Static mapping, never released */
- bank->base = ioremap(bank->pbase, bank_size);
- if (!bank->base) {
- printk(KERN_ERR "Could not ioremap gpio bank%i\n", i);
- continue;
- }
+ if (bank->initialized == 1)
+ return 0;
-#ifdef CONFIG_ARCH_OMAP1
- if (bank_is_mpuio(bank))
- __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
- if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
- __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
- __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
- }
- if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
- __raw_writew(0x0000, bank->base + OMAP1610_GPIO_IRQENABLE1);
- __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
- __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
- }
- if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
- __raw_writel(0xffffffff, bank->base + OMAP7XX_GPIO_INT_MASK);
- __raw_writel(0x00000000, bank->base + OMAP7XX_GPIO_INT_STATUS);
+ bank->virtual_irq_start = pdata->virtual_irq_start;
+ bank->ick = clk_get(NULL, pdata->ick_name);
+ bank->method = pdata->method;
+ if (IS_ERR(bank->ick))
+ pr_err("Could not get %s\n", pdata->ick_name);
+ else
+ clk_enable(bank->ick);
- gpio_count = 32; /* 7xx has 32-bit GPIOs */
- }
-#endif
+ if (cpu_is_omap24xx()) {
+ bank->fck = clk_get(NULL, pdata->fck_name);
+ if (IS_ERR(bank->fck))
+ pr_err("Could not get %s\n", pdata->fck_name);
+ else
+ clk_enable(bank->fck);
+ }
-#ifdef CONFIG_ARCH_OMAP2PLUS
- if ((bank->method == METHOD_GPIO_24XX) ||
- (bank->method == METHOD_GPIO_44XX)) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
-
- if (cpu_is_omap44xx()) {
- __raw_writel(0xffffffff, bank->base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writew(0x0015, bank->base +
- OMAP4_GPIO_SYSCONFIG);
- __raw_writel(0x00000000, bank->base +
- OMAP4_GPIO_DEBOUNCENABLE);
- /*
- * Initialize interface clock ungated,
- * module enabled
- */
- __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
- } else {
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0xffffffff, bank->base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writew(0x0015, bank->base +
- OMAP24XX_GPIO_SYSCONFIG);
- __raw_writel(0x00000000, bank->base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
-
- /*
- * Initialize interface clock ungated,
- * module enabled
- */
- __raw_writel(0, bank->base +
- OMAP24XX_GPIO_CTRL);
- }
- if (i < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios = non_wakeup_gpios[i];
- gpio_count = 32;
- }
-#endif
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ bank->dbck = clk_get(NULL, pdata->dbck_name);
+ if (IS_ERR(bank->dbck))
+ pr_err("Could not get %s\n", pdata->dbck_name);
+ }
- bank->mod_usage = 0;
- /* REVISIT eventually switch from OMAP-specific gpio structs
- * over to the generic ones
- */
- bank->chip.request = omap_gpio_request;
- bank->chip.free = omap_gpio_free;
- bank->chip.direction_input = gpio_input;
- bank->chip.get = gpio_get;
- bank->chip.direction_output = gpio_output;
- bank->chip.set = gpio_set;
- bank->chip.to_irq = gpio_2irq;
- if (bank_is_mpuio(bank)) {
- bank->chip.label = "mpuio";
-#ifdef CONFIG_ARCH_OMAP16XX
- bank->chip.dev = &omap_mpuio_device.dev;
-#endif
- bank->chip.base = OMAP_MPUIO(0);
- } else {
- bank->chip.label = "gpio";
- bank->chip.base = gpio;
- gpio += gpio_count;
- }
- bank->chip.ngpio = gpio_count;
+ spin_lock_init(&bank->lock);
- gpiochip_add(&bank->chip);
+ /* Static mapping, never released */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (unlikely(!res)) {
+ pr_err("GPIO Bank %i Invalid mem resource\n", id);
+ return -ENODEV;
+ }
- for (j = bank->virtual_irq_start;
- j < bank->virtual_irq_start + gpio_count; j++) {
- lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
- set_irq_chip_data(j, bank);
- if (bank_is_mpuio(bank))
- set_irq_chip(j, &mpuio_irq_chip);
- else
- set_irq_chip(j, &gpio_irq_chip);
- set_irq_handler(j, handle_simple_irq);
- set_irq_flags(j, IRQF_VALID);
- }
- set_irq_chained_handler(bank->irq, gpio_irq_handler);
- set_irq_data(bank->irq, bank);
-
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- sprintf(clk_name, "gpio%d_dbck", i + 1);
- bank->dbck = clk_get(NULL, clk_name);
- if (IS_ERR(bank->dbck))
- printk(KERN_ERR "Could not get %s\n", clk_name);
- }
+ bank->base = ioremap(res->start, resource_size(res));
+ if (!bank->base) {
+ pr_err("Could not ioremap gpio bank%i\n", id);
+ return -ENOMEM;
}
- /* Enable system clock for GPIO module.
- * The CAM_CLK_CTRL *is* really the right place. */
- if (cpu_is_omap16xx())
- omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL);
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (unlikely(!res)) {
+ pr_err("GPIO Bank %i Invalid IRQ resource\n", id);
+ return -ENODEV;
+ }
- /* Enable autoidle for the OCP interface */
- if (cpu_is_omap24xx())
- omap_writel(1 << 0, 0x48019010);
- if (cpu_is_omap34xx())
- omap_writel(1 << 0, 0x48306814);
+ arch_gpio->gpio_mod_init(bank, id);
+ bank->irq = res->start;
+ init_gpio_chip_irq(bank);
+ bank->initialized = 1;
- omap_gpio_show_rev();
+ if (!initialized) {
+ omap_gpio_show_rev(gpio_bank[id].base);
+ initialized = 1;
+ }
return 0;
}
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{
int i;
@@ -1743,36 +904,18 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
for (i = 0; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
- void __iomem *wake_status;
- void __iomem *wake_clear;
- void __iomem *wake_set;
+ void __iomem *wake_status = bank->base;
+ void __iomem *wake_clear = bank->base;
+ void __iomem *wake_set = bank->base;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
+ if ((bank->method == METHOD_GPIO_OMAP2PLUS) ||
+ (bank->method == METHOD_GPIO_1610)) {
+ wake_status += arch_gpio->reg_off->wkup_enable;
+ wake_clear += arch_gpio->reg_off->wkup_clear;
+ wake_set += arch_gpio->reg_off->wkup_set;
+ } else
continue;
- }
spin_lock_irqsave(&bank->lock, flags);
bank->saved_wakeup = __raw_readl(wake_status);
@@ -1793,32 +936,16 @@ static int omap_gpio_resume(struct sys_device *dev)
for (i = 0; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
- void __iomem *wake_clear;
- void __iomem *wake_set;
+ void __iomem *wake_clear = bank->base;
+ void __iomem *wake_set = bank->base;
unsigned long flags;
- switch (bank->method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
- break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
+ if ((bank->method == METHOD_GPIO_OMAP2PLUS) ||
+ (bank->method == METHOD_GPIO_1610)) {
+ wake_clear += arch_gpio->reg_off->wkup_clear;
+ wake_set += arch_gpio->reg_off->wkup_set;
+ } else
continue;
- }
spin_lock_irqsave(&bank->lock, flags);
__raw_writel(0xffffffff, wake_clear);
@@ -1840,16 +967,15 @@ static struct sys_device omap_gpio_device = {
.cls = &omap_gpio_sysclass,
};
-#endif
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-
static int workaround_enabled;
void omap2_gpio_prepare_for_retention(void)
{
int i, c = 0;
+ if (cpu_class_is_omap1())
+ return;
+
/* Remove triggering for all non-wakeup GPIOs. Otherwise spurious
* IRQs will be generated. See OMAP2420 Errata item 1.101. */
for (i = 0; i < gpio_bank_count; i++) {
@@ -1859,41 +985,18 @@ void omap2_gpio_prepare_for_retention(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP24XX_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- bank->saved_datain = __raw_readl(bank->base +
- OMAP4_GPIO_DATAIN);
- l1 = __raw_readl(bank->base +
- OMAP4_GPIO_FALLINGDETECT);
- l2 = __raw_readl(bank->base +
- OMAP4_GPIO_RISINGDETECT);
- }
+ bank->saved_datain = __raw_readl(bank->base +
+ arch_gpio->reg_off->data_in);
+ l1 = __raw_readl(bank->base + arch_gpio->reg_off->fall_detect);
+ l2 = __raw_readl(bank->base + arch_gpio->reg_off->rise_detect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(l1, bank->base +
- OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base +
- OMAP24XX_GPIO_RISINGDETECT);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
- }
-
+ __raw_writel(l1, bank->base + arch_gpio->reg_off->fall_detect);
+ __raw_writel(l2, bank->base + arch_gpio->reg_off->rise_detect);
c++;
}
if (!c) {
@@ -1907,8 +1010,9 @@ void omap2_gpio_resume_after_retention(void)
{
int i;
- if (!workaround_enabled)
+ if (cpu_class_is_omap1() || (!workaround_enabled))
return;
+
for (i = 0; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
u32 l, gen, gen0, gen1;
@@ -1916,21 +1020,11 @@ void omap2_gpio_resume_after_retention(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
- }
-
- if (cpu_is_omap44xx()) {
- __raw_writel(bank->saved_fallingdetect,
- bank->base + OMAP4_GPIO_FALLINGDETECT);
- __raw_writel(bank->saved_risingdetect,
- bank->base + OMAP4_GPIO_RISINGDETECT);
- l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
- }
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + arch_gpio->reg_off->fall_detect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + arch_gpio->reg_off->rise_detect);
+ l = __raw_readl(bank->base + arch_gpio->reg_off->data_in);
/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
@@ -1958,77 +1052,61 @@ void omap2_gpio_resume_after_retention(void)
if (gen) {
u32 old0, old1;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- old0 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1 | gen, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP24XX_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP24XX_GPIO_LEVELDETECT1);
- }
-
- if (cpu_is_omap44xx()) {
- old0 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- old1 = __raw_readl(bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1 | l, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- __raw_writel(old0, bank->base +
- OMAP4_GPIO_LEVELDETECT0);
- __raw_writel(old1, bank->base +
- OMAP4_GPIO_LEVELDETECT1);
- }
+ old0 = __raw_readl(bank->base +
+ arch_gpio->reg_off->leveldetect0);
+ old1 = __raw_readl(bank->base +
+ arch_gpio->reg_off->leveldetect1);
+ __raw_writel(old0 | gen, bank->base +
+ arch_gpio->reg_off->leveldetect0);
+ __raw_writel(old1 | gen, bank->base +
+ arch_gpio->reg_off->leveldetect1);
+ __raw_writel(old0, bank->base +
+ arch_gpio->reg_off->leveldetect0);
+ __raw_writel(old1, bank->base +
+ arch_gpio->reg_off->leveldetect1);
}
}
-
}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
/* save the registers of bank 2-6 */
void omap_gpio_save_context(void)
{
int i;
+ if (!cpu_is_omap34xx())
+ return;
+
/* saving banks from 2-6 only since GPIO1 is in WKUP */
for (i = 1; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
+ void __iomem *reg = bank->base;
+
gpio_context[i].sysconfig =
- __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ __raw_readl(reg + arch_gpio->reg_off->syscfg);
gpio_context[i].irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_readl(reg + arch_gpio->reg_off->irq_mask);
gpio_context[i].irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_readl(reg + arch_gpio->reg_off->irq_ena2);
gpio_context[i].wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
+ __raw_readl(reg + arch_gpio->reg_off->wkup_enable);
gpio_context[i].ctrl =
- __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+ __raw_readl(reg + arch_gpio->reg_off->ctrl);
gpio_context[i].oe =
- __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+ __raw_readl(reg + arch_gpio->reg_off->dir_ctrl);
gpio_context[i].leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_readl(reg + arch_gpio->reg_off->leveldetect0);
gpio_context[i].leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_readl(reg + arch_gpio->reg_off->leveldetect1);
gpio_context[i].risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_readl(reg + arch_gpio->reg_off->rise_detect);
gpio_context[i].fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+ __raw_readl(reg + arch_gpio->reg_off->fall_detect);
gpio_context[i].dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ __raw_readl(reg + arch_gpio->reg_off->data_out);
gpio_context[i].setwkuena =
- __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA);
+ __raw_readl(reg + arch_gpio->reg_off->wkup_set);
gpio_context[i].setdataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT);
+ __raw_readl(reg + arch_gpio->reg_off->data_out_set);
}
}
@@ -2037,75 +1115,95 @@ void omap_gpio_restore_context(void)
{
int i;
+ if (!cpu_is_omap34xx())
+ return;
+
for (i = 1; i < gpio_bank_count; i++) {
struct gpio_bank *bank = &gpio_bank[i];
__raw_writel(gpio_context[i].sysconfig,
- bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ bank->base + arch_gpio->reg_off->syscfg);
__raw_writel(gpio_context[i].irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->base + arch_gpio->reg_off->irq_mask);
__raw_writel(gpio_context[i].irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->base + arch_gpio->reg_off->irq_ena2);
__raw_writel(gpio_context[i].wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
+ bank->base + arch_gpio->reg_off->wkup_enable);
__raw_writel(gpio_context[i].ctrl,
- bank->base + OMAP24XX_GPIO_CTRL);
+ bank->base + arch_gpio->reg_off->ctrl);
__raw_writel(gpio_context[i].oe,
- bank->base + OMAP24XX_GPIO_OE);
+ bank->base + arch_gpio->reg_off->dir_ctrl);
__raw_writel(gpio_context[i].leveldetect0,
- bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ bank->base + arch_gpio->reg_off->leveldetect0);
__raw_writel(gpio_context[i].leveldetect1,
- bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ bank->base + arch_gpio->reg_off->leveldetect1);
__raw_writel(gpio_context[i].risingdetect,
- bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ bank->base + arch_gpio->reg_off->rise_detect);
__raw_writel(gpio_context[i].fallingdetect,
- bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+ bank->base + arch_gpio->reg_off->fall_detect);
__raw_writel(gpio_context[i].dataout,
- bank->base + OMAP24XX_GPIO_DATAOUT);
+ bank->base + arch_gpio->reg_off->data_out);
__raw_writel(gpio_context[i].setwkuena,
- bank->base + OMAP24XX_GPIO_SETWKUENA);
+ bank->base + arch_gpio->reg_off->wkup_set);
__raw_writel(gpio_context[i].setdataout,
- bank->base + OMAP24XX_GPIO_SETDATAOUT);
+ bank->base + arch_gpio->reg_off->data_out_set);
}
}
-#endif
-/*
- * This may get called early from board specific init
- * for boards that have interrupts routed via FPGA.
- */
-int __init omap_gpio_init(void)
+int __init gpio_init(struct omap_gpio_info *custom_gpio)
{
- if (!initialized)
- return _omap_gpio_init();
- else
- return 0;
+ struct gpio_bank *bank;
+ int i;
+
+ if (!custom_gpio) {
+ printk(KERN_ERR "No custom gpio data registered\n");
+ BUG();
+ }
+ arch_gpio = custom_gpio;
+ gpio_bank_count = custom_gpio->bank_count;
+
+ /* For OMAP2PLUS, gpio_bank pointer is obtained during probe */
+ if (cpu_class_is_omap1()) {
+ for (i = 0; i < gpio_bank_count; i++) {
+ bank = &gpio_bank[i];
+ *bank = custom_gpio->gpio_bank[i];
+ }
+ }
+
+ return 0;
+}
+
+static struct platform_driver omap_gpio_driver = {
+ .probe = omap_gpio_probe,
+ .remove = __devexit_p(omap_gpio_remove),
+ .driver = {
+ .name = "omap-gpio",
+ },
+};
+
+static int __init omap_gpio_driver_reg(void)
+{
+ return platform_driver_register(&omap_gpio_driver);
}
static int __init omap_gpio_sysinit(void)
{
int ret = 0;
- if (!initialized)
- ret = _omap_gpio_init();
-
- mpuio_init();
+ if (cpu_class_is_omap2())
+ ret = omap_gpio_driver_reg();
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
- if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
- if (ret == 0) {
- ret = sysdev_class_register(&omap_gpio_sysclass);
- if (ret == 0)
- ret = sysdev_register(&omap_gpio_device);
- }
+ if (cpu_is_omap16xx() || cpu_class_is_omap2() || (ret == 0)) {
+ ret = sysdev_class_register(&omap_gpio_sysclass);
+ if (ret == 0)
+ ret = sysdev_register(&omap_gpio_device);
}
-#endif
return ret;
}
+early_platform_init("earlygpio", &omap_gpio_driver);
arch_initcall(omap_gpio_sysinit);
-
#ifdef CONFIG_DEBUG_FS
#include <linux/debugfs.h>
@@ -2117,13 +1215,11 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
for (i = 0, gpio = 0; i < gpio_bank_count; i++) {
struct gpio_bank *bank = gpio_bank + i;
- unsigned bankwidth = 16;
+ unsigned bankwidth = arch_gpio->bank_bits;
u32 mask = 1;
if (bank_is_mpuio(bank))
gpio = OMAP_MPUIO(0);
- else if (cpu_class_is_omap2() || cpu_is_omap7xx())
- bankwidth = 32;
for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
unsigned irq, value, is_in, irqstat;
@@ -2146,12 +1242,14 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
is_in ? "in " : "out",
value ? "hi" : "lo");
-/* FIXME for at least omap2, show pullup/pulldown state */
+ /* FIXME for at least omap2,
+ * show pullup/pulldown state
+ */
irqstat = irq_desc[irq].status;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
- if (is_in && ((bank->suspend_wakeup & mask)
- || irqstat & IRQ_TYPE_SENSE_MASK)) {
+ if ((cpu_class_is_omap2() || cpu_is_omap16xx()) &&
+ (is_in && ((bank->suspend_wakeup & mask)
+ || irqstat & IRQ_TYPE_SENSE_MASK))) {
char *trigger = NULL;
switch (irqstat & IRQ_TYPE_SENSE_MASK) {
@@ -2179,7 +1277,6 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
(bank->suspend_wakeup & mask)
? " wakeup" : "");
}
-#endif
seq_printf(s, "\n");
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index d154897..98e0088 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -47,15 +47,25 @@
#define METHOD_GPIO_1510 1
#define METHOD_GPIO_1610 2
#define METHOD_GPIO_7XX 3
-#define METHOD_GPIO_24XX 4
-#define METHOD_GPIO_44XX 5
+#define METHOD_GPIO_OMAP2PLUS 4
+#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
IH_MPUIO_BASE + ((nr) & 0x0f) : \
IH_GPIO_BASE + (nr))
+#define MOD_REG_BIT(reg, bit_mask, set) \
+do { \
+ int l = __raw_readl(base + reg); \
+ if (set) \
+ l |= bit_mask; \
+ else \
+ l &= ~bit_mask; \
+ __raw_writel(l, base + reg); \
+} while (0)
+
struct omap_gpio_platform_data {
u16 virtual_irq_start;
int method;
@@ -103,7 +113,9 @@ struct mpu_gpio_reg_off {
};
struct gpio_bank {
+#ifdef CONFIG_ARCH_OMAP1
unsigned long pbase;
+#endif
void __iomem *base;
u16 irq;
u16 virtual_irq_start;
@@ -159,14 +171,21 @@ struct omap_gpio_info {
void (*gpio_mod_init) (struct gpio_bank *bank, int i);
};
+extern int gpio_init(struct omap_gpio_info *custom_gpio);
+#ifdef CONFIG_ARCH_OMAP1
+extern int omap_gpio_init(void); /* Call from board init only */
+extern void init_gpio_chip_irq(struct gpio_bank *bank);
+#endif
-extern int omap_gpio_init(void); /* Call from board init only */
+#ifdef CONFIG_ARCH_OMAP2PLUS
extern void omap2_gpio_prepare_for_retention(void);
extern void omap2_gpio_resume_after_retention(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
extern void omap_gpio_save_context(void);
extern void omap_gpio_restore_context(void);
+#endif
+
/*-------------------------------------------------------------------------*/
/* Wrappers for "new style" GPIO calls, using the new infrastructure
--
1.6.3.3
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-03-31 12:23 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Charulatha V
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
@ 2010-04-01 7:17 ` Felipe Balbi
2010-04-01 8:52 ` Varadarajan, Charulatha
1 sibling, 1 reply; 35+ messages in thread
From: Felipe Balbi @ 2010-04-01 7:17 UTC (permalink / raw)
To: ext Charulatha V; +Cc: linux-omap, rnayak, paul, tony
Hi,
On Wed, Mar 31, 2010 at 02:23:52PM +0200, ext Charulatha V wrote:
>diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
>index e737706..c4945d7 100644
>--- a/arch/arm/mach-omap1/include/mach/gpio.h
>+++ b/arch/arm/mach-omap1/include/mach/gpio.h
>@@ -3,3 +3,91 @@
> */
>
> #include <plat/gpio.h>
>+
>+/*
>+ * OMAP1510 GPIO registers
>+ */
>+#define OMAP1510_GPIO_BASE 0xfffce000
>+#define OMAP1510_GPIO_DATA_INPUT 0x00
>+#define OMAP1510_GPIO_DATA_OUTPUT 0x04
>+#define OMAP1510_GPIO_DIR_CONTROL 0x08
>+#define OMAP1510_GPIO_INT_CONTROL 0x0c
>+#define OMAP1510_GPIO_INT_MASK 0x10
>+#define OMAP1510_GPIO_INT_STATUS 0x14
>+#define OMAP1510_GPIO_PIN_CONTROL 0x18
>+
>+#define OMAP1510_IH_GPIO_BASE 64
>+
>+/*
>+ * OMAP1610 specific GPIO registers
>+ */
>+#define OMAP1610_GPIO1_BASE 0xfffbe400
>+#define OMAP1610_GPIO2_BASE 0xfffbec00
>+#define OMAP1610_GPIO3_BASE 0xfffbb400
>+#define OMAP1610_GPIO4_BASE 0xfffbbc00
>+#define OMAP1610_GPIO_REVISION 0x0000
>+#define OMAP1610_GPIO_SYSCONFIG 0x0010
>+#define OMAP1610_GPIO_SYSSTATUS 0x0014
>+#define OMAP1610_GPIO_IRQSTATUS1 0x0018
>+#define OMAP1610_GPIO_IRQENABLE1 0x001c
>+#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
>+#define OMAP1610_GPIO_DATAIN 0x002c
>+#define OMAP1610_GPIO_DATAOUT 0x0030
>+#define OMAP1610_GPIO_DIRECTION 0x0034
>+#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
>+#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
>+#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
>+#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
>+#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
>+#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
>+#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
>+#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
>+
>+/*
>+ * OMAP7XX specific GPIO registers
>+ */
>+#define OMAP7XX_GPIO1_BASE 0xfffbc000
>+#define OMAP7XX_GPIO2_BASE 0xfffbc800
>+#define OMAP7XX_GPIO3_BASE 0xfffbd000
>+#define OMAP7XX_GPIO4_BASE 0xfffbd800
>+#define OMAP7XX_GPIO5_BASE 0xfffbe000
>+#define OMAP7XX_GPIO6_BASE 0xfffbe800
>+#define OMAP7XX_GPIO_DATA_INPUT 0x00
>+#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
>+#define OMAP7XX_GPIO_DIR_CONTROL 0x08
>+#define OMAP7XX_GPIO_INT_CONTROL 0x0c
>+#define OMAP7XX_GPIO_INT_MASK 0x10
>+#define OMAP7XX_GPIO_INT_STATUS 0x14
>+
>+#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
>+#define OMAP1_MPUIO_BASE 0xfffb5000
>+
>+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
>+#define OMAP_MPUIO_INPUT_LATCH 0x00
>+#define OMAP_MPUIO_OUTPUT 0x02
>+#define OMAP_MPUIO_IO_CNTL 0x04
>+#define OMAP_MPUIO_KBR_LATCH 0x08
>+#define OMAP_MPUIO_KBC 0x0a
>+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
>+#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
>+#define OMAP_MPUIO_KBD_INT 0x10
>+#define OMAP_MPUIO_GPIO_INT 0x12
>+#define OMAP_MPUIO_KBD_MASKIT 0x14
>+#define OMAP_MPUIO_GPIO_MASKIT 0x16
>+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
>+#define OMAP_MPUIO_LATCH 0x1a
>+#else
>+#define OMAP_MPUIO_INPUT_LATCH 0x00
>+#define OMAP_MPUIO_OUTPUT 0x04
>+#define OMAP_MPUIO_IO_CNTL 0x08
>+#define OMAP_MPUIO_KBR_LATCH 0x10
>+#define OMAP_MPUIO_KBC 0x14
>+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
>+#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
>+#define OMAP_MPUIO_KBD_INT 0x20
>+#define OMAP_MPUIO_GPIO_INT 0x24
>+#define OMAP_MPUIO_KBD_MASKIT 0x28
>+#define OMAP_MPUIO_GPIO_MASKIT 0x2c
>+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
>+#define OMAP_MPUIO_LATCH 0x34
>+#endif
Add prefixes to these defines and remove the ifdefs.
This breaks multi-omap builds.
>-struct gpio_bank {
>- unsigned long pbase;
>- void __iomem *base;
>- u16 irq;
>- u16 virtual_irq_start;
>- int method;
>-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
>- u32 suspend_wakeup;
>- u32 saved_wakeup;
>-#endif
>-#ifdef CONFIG_ARCH_OMAP2PLUS
>- u32 non_wakeup_gpios;
>- u32 enabled_non_wakeup_gpios;
>-
>- u32 saved_datain;
>- u32 saved_fallingdetect;
>- u32 saved_risingdetect;
>-#endif
>- u32 level_mask;
>- u32 toggle_mask;
>- spinlock_t lock;
>- struct gpio_chip chip;
>- struct clk *dbck;
>- u32 mod_usage;
>-};
defines are fine, but this structure belongs to this driver. Nobody else
should need to poke on it. Keep it here.
>@@ -625,10 +421,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
> bank = get_gpio_bank(gpio);
> reg = bank->base;
>
>+#ifdef CONFIG_ARCH_OMAP2PLUS
> if (cpu_is_omap44xx())
> reg += OMAP4_GPIO_DEBOUNCENABLE;
> else
> reg += OMAP24XX_GPIO_DEBOUNCE_EN;
>+#endif
you should try to remove ifdefs not add more.
--
balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
@ 2010-04-01 7:23 ` Felipe Balbi
2010-04-01 8:58 ` Varadarajan, Charulatha
2010-04-01 9:13 ` Tony Lindgren
2010-04-01 9:31 ` Tony Lindgren
3 siblings, 1 reply; 35+ messages in thread
From: Felipe Balbi @ 2010-04-01 7:23 UTC (permalink / raw)
To: ext Charulatha V; +Cc: linux-omap, rnayak, paul, tony
On Wed, Mar 31, 2010 at 02:23:53PM +0200, ext Charulatha V wrote:
>This patch adds support for implementing OMAP3 GPIO as an
>early platform device and adds gpio_init specific to OMAP3
>
>This patch adds device structures for each GPIO device in
>OMAP3 architecture. These strutures are not created in a
>separate *_data.c file because these structures would be
>removed once the driver gets adapted to HWMOD way.
>
>Signed-off-by: Charulatha V <charu@ti.com>
>---
> arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> 2 files changed, 363 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
>
>diff --git a/arch/arm/mach-omap2/gpio3xxx.c b/arch/arm/mach-omap2/gpio3xxx.c
>new file mode 100644
>index 0000000..8f404e7
>--- /dev/null
>+++ b/arch/arm/mach-omap2/gpio3xxx.c
>@@ -0,0 +1,351 @@
>+/*
>+ * gpio3xxx.c - OMAP3-specific gpio code
>+ *
>+ * Copyright (C) 2010 Texas Instruments, Inc.
>+ *
>+ * Author:
>+ * Charulatha V <charu@ti.com>
>+ *
>+ * This program is free software; you can redistribute it and/or modify
>+ * it under the terms of the GNU General Public License version 2 as
>+ * published by the Free Software Foundation.
>+ */
>+
>+#include <plat/gpio.h>
>+
>+/*
>+ * OMAP3 GPIO reg offsets
>+ */
>+static struct gpio_reg_offset omap3_gpio_reg = {
>+ .data_in = OMAP24XX_GPIO_DATAIN,
>+ .data_out = OMAP24XX_GPIO_DATAOUT,
>+ .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
>+ .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
>+ .dir_ctrl = OMAP24XX_GPIO_OE,
>+ .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
>+ .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
>+ .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
>+ .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
>+ .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
>+ .irq_mask_bits = 0xffffffff,
>+ .irq_inv = 0,
>+ .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
>+ .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
>+ .wkup_set = OMAP24XX_GPIO_SETWKUENA,
>+ .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
>+ .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
>+ .ctrl = OMAP24XX_GPIO_CTRL,
>+ .syscfg = OMAP24XX_GPIO_SYSCONFIG,
>+ .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
>+ .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
>+ .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
>+ .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
>+ .rev_reg = OMAP24XX_GPIO_REVISION,
>+};
>+
>+/*
>+ * OMAP3 GPIO1 interface data
>+ */
>+static struct __initdata resource omap3_gpio1_resources[] = {
>+ {
>+ .start = OMAP34XX_GPIO1_BASE,
>+ .end = OMAP34XX_GPIO1_BASE + OMAP3_GPIO_AS_LEN - 1,
OMAP34XX_GPIO1_BASE + SZ_4K - 1
>+ .flags = IORESOURCE_MEM,
>+ },
>+ {
>+ .start = INT_34XX_GPIO_BANK1,
>+ .flags = IORESOURCE_IRQ,
>+ },
>+};
>+
>+static struct __initdata omap_gpio_platform_data omap3_gpio1_config = {
>+ .ick_name = "gpio1_ick",
>+ .dbck_name = "gpio1_dbck",
do not pass clock names. Update the clkdev entries clk*_data.c
>+int __init omap3_early_init_gpio(struct platform_device ***pdev)
I don't see the point in passing ***pdev.
>+int __init omap3_gpio_dev_reg(void)
>+{
>+ if (cpu_is_omap34xx()) {
>+ platform_device_register(&omap3_gpio1);
>+ platform_device_register(&omap3_gpio2);
>+ platform_device_register(&omap3_gpio3);
>+ platform_device_register(&omap3_gpio4);
>+ platform_device_register(&omap3_gpio5);
>+ platform_device_register(&omap3_gpio6);
>+ }
platform_add_devices(omap3_gpio_early_dev,
ARRAY_SIZE(omap3_gpio_early_dev);
--
balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
2010-03-31 12:23 ` [PATCH 4/8] OMAP4:GPIO:Add " Charulatha V
@ 2010-04-01 7:26 ` Felipe Balbi
2010-04-01 8:53 ` Varadarajan, Charulatha
1 sibling, 1 reply; 35+ messages in thread
From: Felipe Balbi @ 2010-04-01 7:26 UTC (permalink / raw)
To: ext Charulatha V; +Cc: linux-omap, rnayak, paul, tony
On Wed, Mar 31, 2010 at 02:23:54PM +0200, ext Charulatha V wrote:
>+static inline struct gpio_bank *omap2_get_gpio_bank(int gpio,
>+ struct gpio_bank *gpio_bank)
>+{
>+ if (cpu_is_omap24xx())
>+ return &gpio_bank[gpio >> 5];
>+ BUG();
so if we build support omap 2420 and 3430 we will have a BUG() ??
--
balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-04-01 7:17 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Felipe Balbi
@ 2010-04-01 8:52 ` Varadarajan, Charulatha
2010-04-01 9:00 ` Felipe Balbi
2010-04-01 9:41 ` Tony Lindgren
0 siblings, 2 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 8:52 UTC (permalink / raw)
To: felipe.balbi; +Cc: linux-omap, Nayak, Rajendra, paul, tony
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> Sent: Thursday, April 01, 2010 12:47 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
> Subject: Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific
> header
>
> Hi,
>
> On Wed, Mar 31, 2010 at 02:23:52PM +0200, ext Charulatha V wrote:
> >diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-
> omap1/include/mach/gpio.h
> >index e737706..c4945d7 100644
> >--- a/arch/arm/mach-omap1/include/mach/gpio.h
> >+++ b/arch/arm/mach-omap1/include/mach/gpio.h
> >@@ -3,3 +3,91 @@
> > */
> >
> > #include <plat/gpio.h>
> >+
> >+/*
> >+ * OMAP1510 GPIO registers
> >+ */
> >+#define OMAP1510_GPIO_BASE 0xfffce000
> >+#define OMAP1510_GPIO_DATA_INPUT 0x00
> >+#define OMAP1510_GPIO_DATA_OUTPUT 0x04
> >+#define OMAP1510_GPIO_DIR_CONTROL 0x08
> >+#define OMAP1510_GPIO_INT_CONTROL 0x0c
> >+#define OMAP1510_GPIO_INT_MASK 0x10
> >+#define OMAP1510_GPIO_INT_STATUS 0x14
> >+#define OMAP1510_GPIO_PIN_CONTROL 0x18
> >+
> >+#define OMAP1510_IH_GPIO_BASE 64
> >+
> >+/*
> >+ * OMAP1610 specific GPIO registers
> >+ */
> >+#define OMAP1610_GPIO1_BASE 0xfffbe400
> >+#define OMAP1610_GPIO2_BASE 0xfffbec00
> >+#define OMAP1610_GPIO3_BASE 0xfffbb400
> >+#define OMAP1610_GPIO4_BASE 0xfffbbc00
> >+#define OMAP1610_GPIO_REVISION 0x0000
> >+#define OMAP1610_GPIO_SYSCONFIG 0x0010
> >+#define OMAP1610_GPIO_SYSSTATUS 0x0014
> >+#define OMAP1610_GPIO_IRQSTATUS1 0x0018
> >+#define OMAP1610_GPIO_IRQENABLE1 0x001c
> >+#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
> >+#define OMAP1610_GPIO_DATAIN 0x002c
> >+#define OMAP1610_GPIO_DATAOUT 0x0030
> >+#define OMAP1610_GPIO_DIRECTION 0x0034
> >+#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
> >+#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
> >+#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
> >+#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
> >+#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
> >+#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
> >+#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
> >+#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
> >+
> >+/*
> >+ * OMAP7XX specific GPIO registers
> >+ */
> >+#define OMAP7XX_GPIO1_BASE 0xfffbc000
> >+#define OMAP7XX_GPIO2_BASE 0xfffbc800
> >+#define OMAP7XX_GPIO3_BASE 0xfffbd000
> >+#define OMAP7XX_GPIO4_BASE 0xfffbd800
> >+#define OMAP7XX_GPIO5_BASE 0xfffbe000
> >+#define OMAP7XX_GPIO6_BASE 0xfffbe800
> >+#define OMAP7XX_GPIO_DATA_INPUT 0x00
> >+#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
> >+#define OMAP7XX_GPIO_DIR_CONTROL 0x08
> >+#define OMAP7XX_GPIO_INT_CONTROL 0x0c
> >+#define OMAP7XX_GPIO_INT_MASK 0x10
> >+#define OMAP7XX_GPIO_INT_STATUS 0x14
> >+
> >+#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
> >+#define OMAP1_MPUIO_BASE 0xfffb5000
> >+
> >+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
> >+#define OMAP_MPUIO_INPUT_LATCH 0x00
> >+#define OMAP_MPUIO_OUTPUT 0x02
> >+#define OMAP_MPUIO_IO_CNTL 0x04
> >+#define OMAP_MPUIO_KBR_LATCH 0x08
> >+#define OMAP_MPUIO_KBC 0x0a
> >+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
> >+#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
> >+#define OMAP_MPUIO_KBD_INT 0x10
> >+#define OMAP_MPUIO_GPIO_INT 0x12
> >+#define OMAP_MPUIO_KBD_MASKIT 0x14
> >+#define OMAP_MPUIO_GPIO_MASKIT 0x16
> >+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
> >+#define OMAP_MPUIO_LATCH 0x1a
> >+#else
> >+#define OMAP_MPUIO_INPUT_LATCH 0x00
> >+#define OMAP_MPUIO_OUTPUT 0x04
> >+#define OMAP_MPUIO_IO_CNTL 0x08
> >+#define OMAP_MPUIO_KBR_LATCH 0x10
> >+#define OMAP_MPUIO_KBC 0x14
> >+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
> >+#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
> >+#define OMAP_MPUIO_KBD_INT 0x20
> >+#define OMAP_MPUIO_GPIO_INT 0x24
> >+#define OMAP_MPUIO_KBD_MASKIT 0x28
> >+#define OMAP_MPUIO_GPIO_MASKIT 0x2c
> >+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
> >+#define OMAP_MPUIO_LATCH 0x34
> >+#endif
>
> Add prefixes to these defines and remove the ifdefs.
> This breaks multi-omap builds.
AFAIK multi-omap build not applicable for OMAP1
>
> >-struct gpio_bank {
> >- unsigned long pbase;
> >- void __iomem *base;
> >- u16 irq;
> >- u16 virtual_irq_start;
> >- int method;
> >-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
> >- u32 suspend_wakeup;
> >- u32 saved_wakeup;
> >-#endif
> >-#ifdef CONFIG_ARCH_OMAP2PLUS
> >- u32 non_wakeup_gpios;
> >- u32 enabled_non_wakeup_gpios;
> >-
> >- u32 saved_datain;
> >- u32 saved_fallingdetect;
> >- u32 saved_risingdetect;
> >-#endif
> >- u32 level_mask;
> >- u32 toggle_mask;
> >- spinlock_t lock;
> >- struct gpio_chip chip;
> >- struct clk *dbck;
> >- u32 mod_usage;
> >-};
>
> defines are fine, but this structure belongs to this driver. Nobody else
> should need to poke on it. Keep it here.
This would get used in mach-omap layers in the later patches.
Hence moving it to gpio.h
>
> >@@ -625,10 +421,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
> > bank = get_gpio_bank(gpio);
> > reg = bank->base;
> >
> >+#ifdef CONFIG_ARCH_OMAP2PLUS
> > if (cpu_is_omap44xx())
> > reg += OMAP4_GPIO_DEBOUNCENABLE;
> > else
> > reg += OMAP24XX_GPIO_DEBOUNCE_EN;
> >+#endif
>
> you should try to remove ifdefs not add more.
As mentioned in the beginning of this patch, these are
only temporary and all possible #ifdefs are removed at
the end of this patch series when plat-omap/gpio.c handles
only common APIs.
>
> --
> balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
2010-04-01 7:26 ` [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device Felipe Balbi
@ 2010-04-01 8:53 ` Varadarajan, Charulatha
2010-04-01 8:58 ` Felipe Balbi
0 siblings, 1 reply; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 8:53 UTC (permalink / raw)
To: felipe.balbi; +Cc: linux-omap, Nayak, Rajendra, paul, tony
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> Sent: Thursday, April 01, 2010 12:56 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
> Subject: Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
>
> On Wed, Mar 31, 2010 at 02:23:54PM +0200, ext Charulatha V wrote:
> >+static inline struct gpio_bank *omap2_get_gpio_bank(int gpio,
> >+ struct gpio_bank *gpio_bank)
> >+{
> >+ if (cpu_is_omap24xx())
> >+ return &gpio_bank[gpio >> 5];
> >+ BUG();
>
> so if we build support omap 2420 and 3430 we will have a BUG() ??
Multi-OMAP build will not give a BUG(). If this function is called during non-3430 OMAP arch, it will have a BUG().
>
> --
> balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-04-01 7:23 ` [PATCH 2/8] OMAP3:GPIO:Add " Felipe Balbi
@ 2010-04-01 8:58 ` Varadarajan, Charulatha
2010-04-01 9:12 ` Tony Lindgren
0 siblings, 1 reply; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 8:58 UTC (permalink / raw)
To: felipe.balbi; +Cc: linux-omap, Nayak, Rajendra, paul, tony
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> Sent: Thursday, April 01, 2010 12:53 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
> Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
>
> On Wed, Mar 31, 2010 at 02:23:53PM +0200, ext Charulatha V wrote:
> >This patch adds support for implementing OMAP3 GPIO as an
> >early platform device and adds gpio_init specific to OMAP3
> >
> >This patch adds device structures for each GPIO device in
> >OMAP3 architecture. These strutures are not created in a
> >separate *_data.c file because these structures would be
> >removed once the driver gets adapted to HWMOD way.
> >
> >Signed-off-by: Charulatha V <charu@ti.com>
> >---
> > arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> > 2 files changed, 363 insertions(+), 1 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
> >
> >diff --git a/arch/arm/mach-omap2/gpio3xxx.c b/arch/arm/mach-omap2/gpio3xxx.c
> >new file mode 100644
> >index 0000000..8f404e7
> >--- /dev/null
> >+++ b/arch/arm/mach-omap2/gpio3xxx.c
> >@@ -0,0 +1,351 @@
> >+/*
> >+ * gpio3xxx.c - OMAP3-specific gpio code
> >+ *
> >+ * Copyright (C) 2010 Texas Instruments, Inc.
> >+ *
> >+ * Author:
> >+ * Charulatha V <charu@ti.com>
> >+ *
> >+ * This program is free software; you can redistribute it and/or modify
> >+ * it under the terms of the GNU General Public License version 2 as
> >+ * published by the Free Software Foundation.
> >+ */
> >+
> >+#include <plat/gpio.h>
> >+
> >+/*
> >+ * OMAP3 GPIO reg offsets
> >+ */
> >+static struct gpio_reg_offset omap3_gpio_reg = {
> >+ .data_in = OMAP24XX_GPIO_DATAIN,
> >+ .data_out = OMAP24XX_GPIO_DATAOUT,
> >+ .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
> >+ .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
> >+ .dir_ctrl = OMAP24XX_GPIO_OE,
> >+ .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
> >+ .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
> >+ .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
> >+ .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
> >+ .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
> >+ .irq_mask_bits = 0xffffffff,
> >+ .irq_inv = 0,
> >+ .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
> >+ .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
> >+ .wkup_set = OMAP24XX_GPIO_SETWKUENA,
> >+ .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
> >+ .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
> >+ .ctrl = OMAP24XX_GPIO_CTRL,
> >+ .syscfg = OMAP24XX_GPIO_SYSCONFIG,
> >+ .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
> >+ .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
> >+ .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
> >+ .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
> >+ .rev_reg = OMAP24XX_GPIO_REVISION,
> >+};
> >+
> >+/*
> >+ * OMAP3 GPIO1 interface data
> >+ */
> >+static struct __initdata resource omap3_gpio1_resources[] = {
> >+ {
> >+ .start = OMAP34XX_GPIO1_BASE,
> >+ .end = OMAP34XX_GPIO1_BASE + OMAP3_GPIO_AS_LEN - 1,
>
> OMAP34XX_GPIO1_BASE + SZ_4K - 1
>
> >+ .flags = IORESOURCE_MEM,
> >+ },
> >+ {
> >+ .start = INT_34XX_GPIO_BANK1,
> >+ .flags = IORESOURCE_IRQ,
> >+ },
> >+};
> >+
> >+static struct __initdata omap_gpio_platform_data omap3_gpio1_config = {
> >+ .ick_name = "gpio1_ick",
> >+ .dbck_name = "gpio1_dbck",
>
> do not pass clock names. Update the clkdev entries clk*_data.c
Agreed. These patches are in preparation for HWMOD. Once GPIO driver gets
adapted to HWMOD, this would be removed.
>
> >+int __init omap3_early_init_gpio(struct platform_device ***pdev)
>
> I don't see the point in passing ***pdev.
It is required to get the early init device structure which is SoC specific.
>
> >+int __init omap3_gpio_dev_reg(void)
> >+{
> >+ if (cpu_is_omap34xx()) {
> >+ platform_device_register(&omap3_gpio1);
> >+ platform_device_register(&omap3_gpio2);
> >+ platform_device_register(&omap3_gpio3);
> >+ platform_device_register(&omap3_gpio4);
> >+ platform_device_register(&omap3_gpio5);
> >+ platform_device_register(&omap3_gpio6);
> >+ }
>
> platform_add_devices(omap3_gpio_early_dev,
> ARRAY_SIZE(omap3_gpio_early_dev);
>
> --
> balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
2010-04-01 8:53 ` Varadarajan, Charulatha
@ 2010-04-01 8:58 ` Felipe Balbi
2010-04-01 9:16 ` Varadarajan, Charulatha
0 siblings, 1 reply; 35+ messages in thread
From: Felipe Balbi @ 2010-04-01 8:58 UTC (permalink / raw)
To: ext Varadarajan, Charulatha
Cc: Balbi Felipe (Nokia-D/Helsinki), linux-omap, Nayak, Rajendra, paul, tony
On Thu, Apr 01, 2010 at 10:53:48AM +0200, ext Varadarajan, Charulatha wrote:
>
>
>> -----Original Message-----
>> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
>> Sent: Thursday, April 01, 2010 12:56 PM
>> To: Varadarajan, Charulatha
>> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
>> Subject: Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
>>
>> On Wed, Mar 31, 2010 at 02:23:54PM +0200, ext Charulatha V wrote:
>> >+static inline struct gpio_bank *omap2_get_gpio_bank(int gpio,
>> >+ struct gpio_bank *gpio_bank)
>> >+{
>> >+ if (cpu_is_omap24xx())
>> >+ return &gpio_bank[gpio >> 5];
>> >+ BUG();
>>
>> so if we build support omap 2420 and 3430 we will have a BUG() ??
>
>Multi-OMAP build will not give a BUG(). If this function is called
>during non-3430 OMAP arch, it will have a BUG().
still, you shouldn't sprinkle BUG() around the code this can cause some
hard to find kernel oopses. Just return NULL.
--
balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-04-01 8:52 ` Varadarajan, Charulatha
@ 2010-04-01 9:00 ` Felipe Balbi
2010-04-01 9:41 ` Tony Lindgren
1 sibling, 0 replies; 35+ messages in thread
From: Felipe Balbi @ 2010-04-01 9:00 UTC (permalink / raw)
To: ext Varadarajan, Charulatha
Cc: Balbi Felipe (Nokia-D/Helsinki), linux-omap, Nayak, Rajendra, paul, tony
On Thu, Apr 01, 2010 at 10:52:42AM +0200, ext Varadarajan, Charulatha wrote:
>
>
>> -----Original Message-----
>> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
>> Sent: Thursday, April 01, 2010 12:47 PM
>> To: Varadarajan, Charulatha
>> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
>> Subject: Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific
>> header
>>
>> Hi,
>>
>> On Wed, Mar 31, 2010 at 02:23:52PM +0200, ext Charulatha V wrote:
>> >diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-
>> omap1/include/mach/gpio.h
>> >index e737706..c4945d7 100644
>> >--- a/arch/arm/mach-omap1/include/mach/gpio.h
>> >+++ b/arch/arm/mach-omap1/include/mach/gpio.h
>> >@@ -3,3 +3,91 @@
>> > */
>> >
>> > #include <plat/gpio.h>
>> >+
>> >+/*
>> >+ * OMAP1510 GPIO registers
>> >+ */
>> >+#define OMAP1510_GPIO_BASE 0xfffce000
>> >+#define OMAP1510_GPIO_DATA_INPUT 0x00
>> >+#define OMAP1510_GPIO_DATA_OUTPUT 0x04
>> >+#define OMAP1510_GPIO_DIR_CONTROL 0x08
>> >+#define OMAP1510_GPIO_INT_CONTROL 0x0c
>> >+#define OMAP1510_GPIO_INT_MASK 0x10
>> >+#define OMAP1510_GPIO_INT_STATUS 0x14
>> >+#define OMAP1510_GPIO_PIN_CONTROL 0x18
>> >+
>> >+#define OMAP1510_IH_GPIO_BASE 64
>> >+
>> >+/*
>> >+ * OMAP1610 specific GPIO registers
>> >+ */
>> >+#define OMAP1610_GPIO1_BASE 0xfffbe400
>> >+#define OMAP1610_GPIO2_BASE 0xfffbec00
>> >+#define OMAP1610_GPIO3_BASE 0xfffbb400
>> >+#define OMAP1610_GPIO4_BASE 0xfffbbc00
>> >+#define OMAP1610_GPIO_REVISION 0x0000
>> >+#define OMAP1610_GPIO_SYSCONFIG 0x0010
>> >+#define OMAP1610_GPIO_SYSSTATUS 0x0014
>> >+#define OMAP1610_GPIO_IRQSTATUS1 0x0018
>> >+#define OMAP1610_GPIO_IRQENABLE1 0x001c
>> >+#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
>> >+#define OMAP1610_GPIO_DATAIN 0x002c
>> >+#define OMAP1610_GPIO_DATAOUT 0x0030
>> >+#define OMAP1610_GPIO_DIRECTION 0x0034
>> >+#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
>> >+#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
>> >+#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
>> >+#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
>> >+#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
>> >+#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
>> >+#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
>> >+#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
>> >+
>> >+/*
>> >+ * OMAP7XX specific GPIO registers
>> >+ */
>> >+#define OMAP7XX_GPIO1_BASE 0xfffbc000
>> >+#define OMAP7XX_GPIO2_BASE 0xfffbc800
>> >+#define OMAP7XX_GPIO3_BASE 0xfffbd000
>> >+#define OMAP7XX_GPIO4_BASE 0xfffbd800
>> >+#define OMAP7XX_GPIO5_BASE 0xfffbe000
>> >+#define OMAP7XX_GPIO6_BASE 0xfffbe800
>> >+#define OMAP7XX_GPIO_DATA_INPUT 0x00
>> >+#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
>> >+#define OMAP7XX_GPIO_DIR_CONTROL 0x08
>> >+#define OMAP7XX_GPIO_INT_CONTROL 0x0c
>> >+#define OMAP7XX_GPIO_INT_MASK 0x10
>> >+#define OMAP7XX_GPIO_INT_STATUS 0x14
>> >+
>> >+#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
>> >+#define OMAP1_MPUIO_BASE 0xfffb5000
>> >+
>> >+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
>> >+#define OMAP_MPUIO_INPUT_LATCH 0x00
>> >+#define OMAP_MPUIO_OUTPUT 0x02
>> >+#define OMAP_MPUIO_IO_CNTL 0x04
>> >+#define OMAP_MPUIO_KBR_LATCH 0x08
>> >+#define OMAP_MPUIO_KBC 0x0a
>> >+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
>> >+#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
>> >+#define OMAP_MPUIO_KBD_INT 0x10
>> >+#define OMAP_MPUIO_GPIO_INT 0x12
>> >+#define OMAP_MPUIO_KBD_MASKIT 0x14
>> >+#define OMAP_MPUIO_GPIO_MASKIT 0x16
>> >+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
>> >+#define OMAP_MPUIO_LATCH 0x1a
>> >+#else
>> >+#define OMAP_MPUIO_INPUT_LATCH 0x00
>> >+#define OMAP_MPUIO_OUTPUT 0x04
>> >+#define OMAP_MPUIO_IO_CNTL 0x08
>> >+#define OMAP_MPUIO_KBR_LATCH 0x10
>> >+#define OMAP_MPUIO_KBC 0x14
>> >+#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
>> >+#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
>> >+#define OMAP_MPUIO_KBD_INT 0x20
>> >+#define OMAP_MPUIO_GPIO_INT 0x24
>> >+#define OMAP_MPUIO_KBD_MASKIT 0x28
>> >+#define OMAP_MPUIO_GPIO_MASKIT 0x2c
>> >+#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
>> >+#define OMAP_MPUIO_LATCH 0x34
>> >+#endif
>>
>> Add prefixes to these defines and remove the ifdefs.
>> This breaks multi-omap builds.
>
>AFAIK multi-omap build not applicable for OMAP1
yes, and we should try to fix that.
>> >-struct gpio_bank {
>> >- unsigned long pbase;
>> >- void __iomem *base;
>> >- u16 irq;
>> >- u16 virtual_irq_start;
>> >- int method;
>> >-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
>> >- u32 suspend_wakeup;
>> >- u32 saved_wakeup;
>> >-#endif
>> >-#ifdef CONFIG_ARCH_OMAP2PLUS
>> >- u32 non_wakeup_gpios;
>> >- u32 enabled_non_wakeup_gpios;
>> >-
>> >- u32 saved_datain;
>> >- u32 saved_fallingdetect;
>> >- u32 saved_risingdetect;
>> >-#endif
>> >- u32 level_mask;
>> >- u32 toggle_mask;
>> >- spinlock_t lock;
>> >- struct gpio_chip chip;
>> >- struct clk *dbck;
>> >- u32 mod_usage;
>> >-};
>>
>> defines are fine, but this structure belongs to this driver. Nobody else
>> should need to poke on it. Keep it here.
>
>This would get used in mach-omap layers in the later patches.
>Hence moving it to gpio.h
it shouldn't need to be there. The gpio driver should be only one. from
mach-omap1/2 directories should come enough data to allow the driver to
work correctly on any omap processor.
--
balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-04-01 8:58 ` Varadarajan, Charulatha
@ 2010-04-01 9:12 ` Tony Lindgren
2010-04-01 9:19 ` Varadarajan, Charulatha
0 siblings, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:12 UTC (permalink / raw)
To: Varadarajan, Charulatha; +Cc: felipe.balbi, linux-omap, Nayak, Rajendra, paul
* Varadarajan, Charulatha <charu@ti.com> [100401 01:54]:
>
>
> > -----Original Message-----
> > From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> > Sent: Thursday, April 01, 2010 12:53 PM
> > To: Varadarajan, Charulatha
> > Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
> > Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
> >
> > On Wed, Mar 31, 2010 at 02:23:53PM +0200, ext Charulatha V wrote:
> > >This patch adds support for implementing OMAP3 GPIO as an
> > >early platform device and adds gpio_init specific to OMAP3
> > >
> > >This patch adds device structures for each GPIO device in
> > >OMAP3 architecture. These strutures are not created in a
> > >separate *_data.c file because these structures would be
> > >removed once the driver gets adapted to HWMOD way.
> > >
> > >Signed-off-by: Charulatha V <charu@ti.com>
> > >---
> > > arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
> > > arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> > > 2 files changed, 363 insertions(+), 1 deletions(-)
> > > create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
> > >
> > >--- /dev/null
> > >+++ b/arch/arm/mach-omap2/gpio3xxx.c
> > >+
> > >+static struct __initdata omap_gpio_platform_data omap3_gpio1_config = {
> > >+ .ick_name = "gpio1_ick",
> > >+ .dbck_name = "gpio1_dbck",
> >
> > do not pass clock names. Update the clkdev entries clk*_data.c
>
> Agreed. These patches are in preparation for HWMOD. Once GPIO driver gets
> adapted to HWMOD, this would be removed.
Still need to change it before hwmod. No passing of clock names has been
needed for quite a while now.
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
2010-04-01 7:23 ` [PATCH 2/8] OMAP3:GPIO:Add " Felipe Balbi
@ 2010-04-01 9:13 ` Tony Lindgren
2010-04-01 10:49 ` Varadarajan, Charulatha
2010-04-01 9:31 ` Tony Lindgren
3 siblings, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:13 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul
* Charulatha V <charu@ti.com> [100331 05:15]:
> This patch adds support for implementing OMAP3 GPIO as an
> early platform device and adds gpio_init specific to OMAP3
>
> This patch adds device structures for each GPIO device in
> OMAP3 architecture. These strutures are not created in a
> separate *_data.c file because these structures would be
> removed once the driver gets adapted to HWMOD way.
>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> 2 files changed, 363 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
>
> diff --git a/arch/arm/mach-omap2/gpio3xxx.c b/arch/arm/mach-omap2/gpio3xxx.c
> new file mode 100644
> index 0000000..8f404e7
> --- /dev/null
> +++ b/arch/arm/mach-omap2/gpio3xxx.c
> @@ -0,0 +1,351 @@
> +/*
> + * gpio3xxx.c - OMAP3-specific gpio code
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + *
> + * Author:
> + * Charulatha V <charu@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <plat/gpio.h>
> +
> +/*
> + * OMAP3 GPIO reg offsets
> + */
> +static struct gpio_reg_offset omap3_gpio_reg = {
> + .data_in = OMAP24XX_GPIO_DATAIN,
> + .data_out = OMAP24XX_GPIO_DATAOUT,
> + .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
> + .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
> + .dir_ctrl = OMAP24XX_GPIO_OE,
> + .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
> + .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
> + .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
> + .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
> + .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
> + .irq_mask_bits = 0xffffffff,
> + .irq_inv = 0,
> + .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
> + .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
> + .wkup_set = OMAP24XX_GPIO_SETWKUENA,
> + .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
> + .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
> + .ctrl = OMAP24XX_GPIO_CTRL,
> + .syscfg = OMAP24XX_GPIO_SYSCONFIG,
> + .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
> + .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
> + .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
> + .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
> + .rev_reg = OMAP24XX_GPIO_REVISION,
> +};
Can we use just a omap specific shift here? Or is the register
ordering different too?
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
2010-04-01 8:58 ` Felipe Balbi
@ 2010-04-01 9:16 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 9:16 UTC (permalink / raw)
To: felipe.balbi; +Cc: linux-omap, Nayak, Rajendra, paul, tony
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> Sent: Thursday, April 01, 2010 2:29 PM
> To: Varadarajan, Charulatha
> Cc: Balbi Felipe (Nokia-D/Helsinki); linux-omap@vger.kernel.org; Nayak, Rajendra;
> paul@pwsan.com; tony@atomide.com
> Subject: Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
>
> On Thu, Apr 01, 2010 at 10:53:48AM +0200, ext Varadarajan, Charulatha wrote:
> >
> >
> >> -----Original Message-----
> >> From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> >> Sent: Thursday, April 01, 2010 12:56 PM
> >> To: Varadarajan, Charulatha
> >> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com;
> tony@atomide.com
> >> Subject: Re: [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device
> >>
> >> On Wed, Mar 31, 2010 at 02:23:54PM +0200, ext Charulatha V wrote:
> >> >+static inline struct gpio_bank *omap2_get_gpio_bank(int gpio,
> >> >+ struct gpio_bank *gpio_bank)
> >> >+{
> >> >+ if (cpu_is_omap24xx())
> >> >+ return &gpio_bank[gpio >> 5];
> >> >+ BUG();
> >>
> >> so if we build support omap 2420 and 3430 we will have a BUG() ??
> >
> >Multi-OMAP build will not give a BUG(). If this function is called
> >during non-3430 OMAP arch, it will have a BUG().
>
> still, you shouldn't sprinkle BUG() around the code this can cause some
> hard to find kernel oopses. Just return NULL.
Okay.
>
> --
> balbi
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-04-01 9:12 ` Tony Lindgren
@ 2010-04-01 9:19 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 9:19 UTC (permalink / raw)
To: Tony Lindgren; +Cc: felipe.balbi, linux-omap, Nayak, Rajendra, paul
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Thursday, April 01, 2010 2:42 PM
> To: Varadarajan, Charulatha
> Cc: felipe.balbi@nokia.com; linux-omap@vger.kernel.org; Nayak, Rajendra;
> paul@pwsan.com
> Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
>
> * Varadarajan, Charulatha <charu@ti.com> [100401 01:54]:
> >
> >
> > > -----Original Message-----
> > > From: Felipe Balbi [mailto:felipe.balbi@nokia.com]
> > > Sent: Thursday, April 01, 2010 12:53 PM
> > > To: Varadarajan, Charulatha
> > > Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com;
> tony@atomide.com
> > > Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
> > >
> > > On Wed, Mar 31, 2010 at 02:23:53PM +0200, ext Charulatha V wrote:
> > > >This patch adds support for implementing OMAP3 GPIO as an
> > > >early platform device and adds gpio_init specific to OMAP3
> > > >
> > > >This patch adds device structures for each GPIO device in
> > > >OMAP3 architecture. These strutures are not created in a
> > > >separate *_data.c file because these structures would be
> > > >removed once the driver gets adapted to HWMOD way.
> > > >
> > > >Signed-off-by: Charulatha V <charu@ti.com>
> > > >---
> > > > arch/arm/mach-omap2/gpio3xxx.c | 351
> +++++++++++++++++++++++++++++++
> > > > arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> > > > 2 files changed, 363 insertions(+), 1 deletions(-)
> > > > create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
> > > >
> > > >--- /dev/null
> > > >+++ b/arch/arm/mach-omap2/gpio3xxx.c
> > > >+
> > > >+static struct __initdata omap_gpio_platform_data omap3_gpio1_config = {
> > > >+ .ick_name = "gpio1_ick",
> > > >+ .dbck_name = "gpio1_dbck",
> > >
> > > do not pass clock names. Update the clkdev entries clk*_data.c
> >
> > Agreed. These patches are in preparation for HWMOD. Once GPIO driver gets
> > adapted to HWMOD, this would be removed.
>
> Still need to change it before hwmod. No passing of clock names has been
> needed for quite a while now.
>
Okay.
> Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support
2010-03-31 12:23 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Charulatha V
2010-03-31 12:23 ` [PATCH 6/8] OMAP1:GPIO:Support for OMAP1 specific gpio Charulatha V
@ 2010-04-01 9:30 ` Tony Lindgren
2010-04-06 22:08 ` Kevin Hilman
1 sibling, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:30 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul
* Charulatha V <charu@ti.com> [100331 05:15]:
> --- /dev/null
> +++ b/arch/arm/mach-omap2/gpio.c
> @@ -0,0 +1,36 @@
> +/*
> + * gpio.c - OMAP2PLUS architecture specific common gpio code
> + *
> + * Copyright (C) 2010 Texas Instruments, Inc.
> + *
> + * Author:
> + * Charulatha V <charu@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <mach/gpio.h>
Should be include <linux/gpio.h>
> +void __init omap_gpio_early_init(void)
> +{
> + struct platform_device **pdev;
> + int no_of_dev;
> +
> + if (cpu_is_omap24xx()) {
> + omap2_gpio_init_data();
> + no_of_dev = omap2_early_init_gpio(&pdev);
> + } else if (cpu_is_omap34xx()) {
> + omap3_gpio_init_data();
> + no_of_dev = omap3_early_init_gpio(&pdev);
> + } else if (cpu_is_omap44xx()) {
> + omap4_gpio_init_data();
> + no_of_dev = omap4_early_init_gpio(&pdev);
> + } else
> + return;
> +
> + early_platform_add_devices(pdev, no_of_dev);
> + early_platform_driver_register_all("earlygpio");
> + early_platform_driver_probe("earlygpio", no_of_dev, 0);
> +}
> diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
> index d2d9d17..3a0fcb1 100644
> --- a/arch/arm/mach-omap2/include/mach/gpio.h
> +++ b/arch/arm/mach-omap2/include/mach/gpio.h
> @@ -115,4 +115,5 @@ extern void omap4_gpio_init_data(void);
> extern int omap2_early_init_gpio(struct platform_device ***pdev);
> extern int omap3_early_init_gpio(struct platform_device ***pdev);
> extern int omap4_early_init_gpio(struct platform_device ***pdev);
> +extern void __init omap_gpio_early_init(void);
> #endif
Uhh, is this some April fool's day joke? :)
To me it looks like you have no need for ***pdev, just swap the init
code around so the omap specific code calls omap_gpio_init with the
platform data.
Regards,
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
` (2 preceding siblings ...)
2010-04-01 9:13 ` Tony Lindgren
@ 2010-04-01 9:31 ` Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
3 siblings, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:31 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul
* Charulatha V <charu@ti.com> [100331 05:15]:
> +
> +int __init omap3_early_init_gpio(struct platform_device ***pdev)
> +{
> + *pdev = omap3_gpio_early_dev;
> + return OMAP34XX_NR_GPIOS;
> +}
...
> +int __init omap3_gpio_dev_reg(void)
> +{
> + if (cpu_is_omap34xx()) {
> + platform_device_register(&omap3_gpio1);
> + platform_device_register(&omap3_gpio2);
> + platform_device_register(&omap3_gpio3);
> + platform_device_register(&omap3_gpio4);
> + platform_device_register(&omap3_gpio5);
> + platform_device_register(&omap3_gpio6);
> + }
> + return 0;
> +}
> +arch_initcall(omap3_gpio_dev_reg);
Just call omap_gpio_init for each platform data.
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw
2010-03-31 12:23 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Charulatha V
2010-03-31 12:23 ` [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs Charulatha V
@ 2010-04-01 9:32 ` Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
2010-04-06 22:13 ` Kevin Hilman
2 siblings, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:32 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul
* Charulatha V <charu@ti.com> [100331 05:15]:
> This is preparation for early platform device implementation
> for GPIO in OMAP2PLUS. This patch moves initialization of gpio
> from board files to omap2_init_common_hw API in io.c
>
> Init_irq needs to be done before gpio_init, the init_irq
> is called before omap2_init_common_hw in board files
Nope. We want to call omap2_init_common_hw as early as
possible, otherwise the cpu detection won't work.
What omaps have you tested this series on?
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs
2010-03-31 12:23 ` [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs Charulatha V
@ 2010-04-01 9:34 ` Tony Lindgren
0 siblings, 0 replies; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:34 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul
* Charulatha V <charu@ti.com> [100331 05:15]:
> This patch adds support for common GPIO code in plat-omap layer
> to perform most common operations for all OMAPs. This is handled
> by getting function pointers and register offsets from
> architecture specific files in mach-omap layer.
>
> The common APIs are handled by plat-omap/gpio.c file. Specific function,
> eg., get_gpio_bank, set_gpio_triggering, etc., are handled differently
> in different architectures. Hence they are handled in mach-omap layer.
>
> This patch also adds support for passing platform_data for OMAP2PLUS.
> For OMAP1, it still supports the old way of doing omap_gpio_init which
> would be handled in mach-omap1 layer.
>
> This patch is in prepartion for HWMOD FW adaptation for GPIO module.
Sounds like this needs to be broken down into smaller patches. Let's first
get initializing things with platform data working, only then start patching
the functional code.
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-04-01 8:52 ` Varadarajan, Charulatha
2010-04-01 9:00 ` Felipe Balbi
@ 2010-04-01 9:41 ` Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
1 sibling, 1 reply; 35+ messages in thread
From: Tony Lindgren @ 2010-04-01 9:41 UTC (permalink / raw)
To: Varadarajan, Charulatha; +Cc: felipe.balbi, linux-omap, Nayak, Rajendra, paul
* Varadarajan, Charulatha <charu@ti.com> [100401 01:48]:
> >
> > Add prefixes to these defines and remove the ifdefs.
> > This breaks multi-omap builds.
>
> AFAIK multi-omap build not applicable for OMAP1
Wrong. Multi-omap for omap1 has been mostly working for
about 5 years. In general, we don't want to apply patches
that obviously break things like that.
If you take a look at arch/arm/mach-omap1/Kconfig, there's
no "choice" there between omap1 socs.
> >
> > >-struct gpio_bank {
> > >- unsigned long pbase;
> > >- void __iomem *base;
> > >- u16 irq;
> > >- u16 virtual_irq_start;
> > >- int method;
> > >-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
> > >- u32 suspend_wakeup;
> > >- u32 saved_wakeup;
> > >-#endif
> > >-#ifdef CONFIG_ARCH_OMAP2PLUS
> > >- u32 non_wakeup_gpios;
> > >- u32 enabled_non_wakeup_gpios;
> > >-
> > >- u32 saved_datain;
> > >- u32 saved_fallingdetect;
> > >- u32 saved_risingdetect;
> > >-#endif
> > >- u32 level_mask;
> > >- u32 toggle_mask;
> > >- spinlock_t lock;
> > >- struct gpio_chip chip;
> > >- struct clk *dbck;
> > >- u32 mod_usage;
> > >-};
> >
> > defines are fine, but this structure belongs to this driver. Nobody else
> > should need to poke on it. Keep it here.
>
> This would get used in mach-omap layers in the later patches.
> Hence moving it to gpio.h
Why would the hwmod code need to know about the register layout?
That's totally gpio specific.
> > >@@ -625,10 +421,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
> > > bank = get_gpio_bank(gpio);
> > > reg = bank->base;
> > >
> > >+#ifdef CONFIG_ARCH_OMAP2PLUS
> > > if (cpu_is_omap44xx())
> > > reg += OMAP4_GPIO_DEBOUNCENABLE;
> > > else
> > > reg += OMAP24XX_GPIO_DEBOUNCE_EN;
> > >+#endif
> >
> > you should try to remove ifdefs not add more.
>
> As mentioned in the beginning of this patch, these are
> only temporary and all possible #ifdefs are removed at
> the end of this patch series when plat-omap/gpio.c handles
> only common APIs.
You need to first implement just initializing things using the
platform data. Only then start messing with the functions.
Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-04-01 9:13 ` Tony Lindgren
@ 2010-04-01 10:49 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 10:49 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, Nayak, Rajendra, paul
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Thursday, April 01, 2010 2:44 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com
> Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
>
> * Charulatha V <charu@ti.com> [100331 05:15]:
> > This patch adds support for implementing OMAP3 GPIO as an
> > early platform device and adds gpio_init specific to OMAP3
> >
> > This patch adds device structures for each GPIO device in
> > OMAP3 architecture. These strutures are not created in a
> > separate *_data.c file because these structures would be
> > removed once the driver gets adapted to HWMOD way.
> >
> > Signed-off-by: Charulatha V <charu@ti.com>
> > ---
> > arch/arm/mach-omap2/gpio3xxx.c | 351 +++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/include/mach/gpio.h | 13 +-
> > 2 files changed, 363 insertions(+), 1 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/gpio3xxx.c
> >
> > diff --git a/arch/arm/mach-omap2/gpio3xxx.c b/arch/arm/mach-omap2/gpio3xxx.c
> > new file mode 100644
> > index 0000000..8f404e7
> > --- /dev/null
> > +++ b/arch/arm/mach-omap2/gpio3xxx.c
> > @@ -0,0 +1,351 @@
> > +/*
> > + * gpio3xxx.c - OMAP3-specific gpio code
> > + *
> > + * Copyright (C) 2010 Texas Instruments, Inc.
> > + *
> > + * Author:
> > + * Charulatha V <charu@ti.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#include <plat/gpio.h>
> > +
> > +/*
> > + * OMAP3 GPIO reg offsets
> > + */
> > +static struct gpio_reg_offset omap3_gpio_reg = {
> > + .data_in = OMAP24XX_GPIO_DATAIN,
> > + .data_out = OMAP24XX_GPIO_DATAOUT,
> > + .data_out_set = OMAP24XX_GPIO_SETDATAOUT,
> > + .data_out_clear = OMAP24XX_GPIO_CLEARDATAOUT,
> > + .dir_ctrl = OMAP24XX_GPIO_OE,
> > + .irq_status0 = OMAP24XX_GPIO_IRQSTATUS1,
> > + .irq_status1 = OMAP24XX_GPIO_IRQSTATUS2,
> > + .irq_mask = OMAP24XX_GPIO_IRQENABLE1,
> > + .irq_set = OMAP24XX_GPIO_SETIRQENABLE1,
> > + .irq_clear = OMAP24XX_GPIO_CLEARIRQENABLE1,
> > + .irq_mask_bits = 0xffffffff,
> > + .irq_inv = 0,
> > + .wkup_enable = OMAP24XX_GPIO_WAKE_EN,
> > + .wkup_clear = OMAP24XX_GPIO_CLEARWKUENA,
> > + .wkup_set = OMAP24XX_GPIO_SETWKUENA,
> > + .debounce_ena = OMAP24XX_GPIO_DEBOUNCE_EN,
> > + .debounce_val = OMAP24XX_GPIO_DEBOUNCE_VAL,
> > + .ctrl = OMAP24XX_GPIO_CTRL,
> > + .syscfg = OMAP24XX_GPIO_SYSCONFIG,
> > + .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
> > + .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
> > + .rise_detect = OMAP24XX_GPIO_RISINGDETECT,
> > + .fall_detect = OMAP24XX_GPIO_FALLINGDETECT,
> > + .rev_reg = OMAP24XX_GPIO_REVISION,
> > +};
>
> Can we use just a omap specific shift here? Or is the register
> ordering different too?
The register ordering is more or less same for OMAP2PLUS, but in
OMAP1 some registers don't even exist.
>
> Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw
2010-04-01 9:32 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Tony Lindgren
@ 2010-04-01 10:50 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 10:50 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, Nayak, Rajendra, paul
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Thursday, April 01, 2010 3:03 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com
> Subject: Re: [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to
> init_common_hw
>
> * Charulatha V <charu@ti.com> [100331 05:15]:
> > This is preparation for early platform device implementation
> > for GPIO in OMAP2PLUS. This patch moves initialization of gpio
> > from board files to omap2_init_common_hw API in io.c
> >
> > Init_irq needs to be done before gpio_init, the init_irq
> > is called before omap2_init_common_hw in board files
>
> Nope. We want to call omap2_init_common_hw as early as
> possible, otherwise the cpu detection won't work.
>
> What omaps have you tested this series on?
I tested it on 3430SDP, 4430SDP and zoom3 and did not face
any problem. I will keep this point in mind while creating
next version of patches.
>
> Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
2010-04-01 9:31 ` Tony Lindgren
@ 2010-04-01 10:50 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 10:50 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, Nayak, Rajendra, paul
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Thursday, April 01, 2010 3:01 PM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com
> Subject: Re: [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device
>
> * Charulatha V <charu@ti.com> [100331 05:15]:
> > +
> > +int __init omap3_early_init_gpio(struct platform_device ***pdev)
> > +{
> > + *pdev = omap3_gpio_early_dev;
> > + return OMAP34XX_NR_GPIOS;
> > +}
>
> ...
>
> > +int __init omap3_gpio_dev_reg(void)
> > +{
> > + if (cpu_is_omap34xx()) {
> > + platform_device_register(&omap3_gpio1);
> > + platform_device_register(&omap3_gpio2);
> > + platform_device_register(&omap3_gpio3);
> > + platform_device_register(&omap3_gpio4);
> > + platform_device_register(&omap3_gpio5);
> > + platform_device_register(&omap3_gpio6);
> > + }
> > + return 0;
> > +}
> > +arch_initcall(omap3_gpio_dev_reg);
>
> Just call omap_gpio_init for each platform data.
I miss something here. Please provide more info.
>
> Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header
2010-04-01 9:41 ` Tony Lindgren
@ 2010-04-01 10:50 ` Varadarajan, Charulatha
0 siblings, 0 replies; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-01 10:50 UTC (permalink / raw)
To: Tony Lindgren; +Cc: felipe.balbi, linux-omap, Nayak, Rajendra, paul
> -----Original Message-----
> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Thursday, April 01, 2010 3:11 PM
> To: Varadarajan, Charulatha
> Cc: felipe.balbi@nokia.com; linux-omap@vger.kernel.org; Nayak, Rajendra;
> paul@pwsan.com
> Subject: Re: [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific
> header
>
> * Varadarajan, Charulatha <charu@ti.com> [100401 01:48]:
> > >
> > > Add prefixes to these defines and remove the ifdefs.
> > > This breaks multi-omap builds.
> >
> > AFAIK multi-omap build not applicable for OMAP1
>
> Wrong. Multi-omap for omap1 has been mostly working for
> about 5 years. In general, we don't want to apply patches
> that obviously break things like that.
>
These macros already existed in plat/gpio.c and I just moved
it to gpio.h. It was not newly introduced by me.
Please point to a defconfig that takes care of multi-omap1 build
similar to what we have for OMAP2PLUS so that we can take
care of this in the future.
> If you take a look at arch/arm/mach-omap1/Kconfig, there's
> no "choice" there between omap1 socs.
>
> > >
> > > >-struct gpio_bank {
> > > >- unsigned long pbase;
> > > >- void __iomem *base;
> > > >- u16 irq;
> > > >- u16 virtual_irq_start;
> > > >- int method;
> > > >-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
> > > >- u32 suspend_wakeup;
> > > >- u32 saved_wakeup;
> > > >-#endif
> > > >-#ifdef CONFIG_ARCH_OMAP2PLUS
> > > >- u32 non_wakeup_gpios;
> > > >- u32 enabled_non_wakeup_gpios;
> > > >-
> > > >- u32 saved_datain;
> > > >- u32 saved_fallingdetect;
> > > >- u32 saved_risingdetect;
> > > >-#endif
> > > >- u32 level_mask;
> > > >- u32 toggle_mask;
> > > >- spinlock_t lock;
> > > >- struct gpio_chip chip;
> > > >- struct clk *dbck;
> > > >- u32 mod_usage;
> > > >-};
> > >
> > > defines are fine, but this structure belongs to this driver. Nobody else
> > > should need to poke on it. Keep it here.
> >
> > This would get used in mach-omap layers in the later patches.
> > Hence moving it to gpio.h
>
> Why would the hwmod code need to know about the register layout?
> That's totally gpio specific.
Yes, they are GPIO specific and not used in hwmod code. They are
used in the OMAP specific GPIO code (eg., set gpio triggering
is handled different for different OMAPs and they need this structure).
>
> > > >@@ -625,10 +421,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
> > > > bank = get_gpio_bank(gpio);
> > > > reg = bank->base;
> > > >
> > > >+#ifdef CONFIG_ARCH_OMAP2PLUS
> > > > if (cpu_is_omap44xx())
> > > > reg += OMAP4_GPIO_DEBOUNCENABLE;
> > > > else
> > > > reg += OMAP24XX_GPIO_DEBOUNCE_EN;
> > > >+#endif
> > >
> > > you should try to remove ifdefs not add more.
> >
> > As mentioned in the beginning of this patch, these are
> > only temporary and all possible #ifdefs are removed at
> > the end of this patch series when plat-omap/gpio.c handles
> > only common APIs.
>
> You need to first implement just initializing things using the
> platform data. Only then start messing with the functions.
Okay.
>
> Tony
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support
2010-04-01 9:30 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Tony Lindgren
@ 2010-04-06 22:08 ` Kevin Hilman
0 siblings, 0 replies; 35+ messages in thread
From: Kevin Hilman @ 2010-04-06 22:08 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Charulatha V, linux-omap, rnayak, paul
Tony Lindgren <tony@atomide.com> writes:
> * Charulatha V <charu@ti.com> [100331 05:15]:
>> --- /dev/null
>> +++ b/arch/arm/mach-omap2/gpio.c
>> @@ -0,0 +1,36 @@
>> +/*
>> + * gpio.c - OMAP2PLUS architecture specific common gpio code
>> + *
>> + * Copyright (C) 2010 Texas Instruments, Inc.
>> + *
>> + * Author:
>> + * Charulatha V <charu@ti.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <mach/gpio.h>
>
> Should be include <linux/gpio.h>
>
>> +void __init omap_gpio_early_init(void)
>> +{
>> + struct platform_device **pdev;
>> + int no_of_dev;
>> +
>> + if (cpu_is_omap24xx()) {
>> + omap2_gpio_init_data();
>> + no_of_dev = omap2_early_init_gpio(&pdev);
>> + } else if (cpu_is_omap34xx()) {
>> + omap3_gpio_init_data();
>> + no_of_dev = omap3_early_init_gpio(&pdev);
>> + } else if (cpu_is_omap44xx()) {
>> + omap4_gpio_init_data();
>> + no_of_dev = omap4_early_init_gpio(&pdev);
>> + } else
>> + return;
>> +
>> + early_platform_add_devices(pdev, no_of_dev);
>> + early_platform_driver_register_all("earlygpio");
>> + early_platform_driver_probe("earlygpio", no_of_dev, 0);
>> +}
>> diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
>> index d2d9d17..3a0fcb1 100644
>> --- a/arch/arm/mach-omap2/include/mach/gpio.h
>> +++ b/arch/arm/mach-omap2/include/mach/gpio.h
>> @@ -115,4 +115,5 @@ extern void omap4_gpio_init_data(void);
>> extern int omap2_early_init_gpio(struct platform_device ***pdev);
>> extern int omap3_early_init_gpio(struct platform_device ***pdev);
>> extern int omap4_early_init_gpio(struct platform_device ***pdev);
>> +extern void __init omap_gpio_early_init(void);
>> #endif
>
> Uhh, is this some April fool's day joke? :)
>
> To me it looks like you have no need for ***pdev, just swap the init
> code around so the omap specific code calls omap_gpio_init with the
> platform data.
Or better yet, just use hwmod + omap_device for early platform_devices
and drop this patch entirely.
Kevin
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw
2010-03-31 12:23 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Charulatha V
2010-03-31 12:23 ` [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs Charulatha V
2010-04-01 9:32 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Tony Lindgren
@ 2010-04-06 22:13 ` Kevin Hilman
2 siblings, 0 replies; 35+ messages in thread
From: Kevin Hilman @ 2010-04-06 22:13 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul, tony
Charulatha V <charu@ti.com> writes:
> This is preparation for early platform device implementation
> for GPIO in OMAP2PLUS. This patch moves initialization of gpio
> from board files to omap2_init_common_hw API in io.c
Why?
Not a helpful description.
Kevin
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
2010-03-31 12:23 [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Charulatha V
2010-03-31 12:23 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Charulatha V
@ 2010-04-06 22:31 ` Kevin Hilman
2010-04-12 12:16 ` Varadarajan, Charulatha
1 sibling, 1 reply; 35+ messages in thread
From: Kevin Hilman @ 2010-04-06 22:31 UTC (permalink / raw)
To: Charulatha V; +Cc: linux-omap, rnayak, paul, tony
Charulatha V <charu@ti.com> writes:
> This patch series is in preparation to adapt GPIO to HWMOD FW.
> It creates OMAP architecture specific gpio files to handle
> SoC specific gpio_init. The common plat-omap/gpio.c handles all
> common GPIO APIs.
>
> OMAP2PLUS GPIO module is implemented as early platform device and
> OMAP1 GPIO is still handled in old way via gpio_init from board files.
>
> Save/restore context, gpio_prepare_for_retention and
> gpio_resume_after_retention APIs are also handled in plat-omap layer.
> These APIs are currently not used in OMAP1, but still they might
> become common for different OMAP architectures in the future.
> Hence they are handled in plat-omap layer. If they need to be moved
> to mach-omap2 layer, additional patches may be sent during
> next version of this patch series.
>
> This patch series is generated on top of linux-omap-2.6 branch: master
> and tested on 3430SDP, 4430SDP & zoom3.
I have many problems with this series, but without going into the
specifics of each patch, I have a big problem with the general
approach being taken here.
You say this is in preparation for adaptation to hwmod, but in fact,
this series is duplicating a lot of the work you would get for free by
starting with hwmod.
You're generating a bunch of code that will be completely thrown away
with a hwmod conversion. Instead, you should *start* by using hwmod +
omap_device to generate the platform_devices for you. Doing this, you
will drop patches 2, 3 and 4 entirely (they are mostly identical
anyways, except for the search-and-replace) and also eliminate the
need for patch 5.
What is needed here is a way to introduce the platform_device
conversion without introducing signifcant functional changes at the
same time. Here's a proposal to do that, and which should also be
considerably easier to review for sanity:
- use hwmod + omap_device to generate (early) platform_devices
- modify plat-omap/gpio.c to use base addr and IRQ from platform_device
- modify plat-omap/gpio.c to get clocks based on 'struct device'
For an example, you can see the pm-wip/hwmods branch in my tree for
how this was done for UART and the pm-wip/mmc branch for how this was
done for MMC.
Kevin
^ permalink raw reply [flat|nested] 35+ messages in thread
* RE: [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
2010-04-06 22:31 ` [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Kevin Hilman
@ 2010-04-12 12:16 ` Varadarajan, Charulatha
2010-04-19 14:31 ` Kevin Hilman
0 siblings, 1 reply; 35+ messages in thread
From: Varadarajan, Charulatha @ 2010-04-12 12:16 UTC (permalink / raw)
To: Kevin Hilman; +Cc: linux-omap, Nayak, Rajendra, paul, tony
> -----Original Message-----
> From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
> Sent: Wednesday, April 07, 2010 4:01 AM
> To: Varadarajan, Charulatha
> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
> Subject: Re: [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
>
> Charulatha V <charu@ti.com> writes:
>
> > This patch series is in preparation to adapt GPIO to HWMOD FW.
> > It creates OMAP architecture specific gpio files to handle
> > SoC specific gpio_init. The common plat-omap/gpio.c handles all
> > common GPIO APIs.
> >
> > OMAP2PLUS GPIO module is implemented as early platform device and
> > OMAP1 GPIO is still handled in old way via gpio_init from board files.
> >
> > Save/restore context, gpio_prepare_for_retention and
> > gpio_resume_after_retention APIs are also handled in plat-omap layer.
> > These APIs are currently not used in OMAP1, but still they might
> > become common for different OMAP architectures in the future.
> > Hence they are handled in plat-omap layer. If they need to be moved
> > to mach-omap2 layer, additional patches may be sent during
> > next version of this patch series.
> >
> > This patch series is generated on top of linux-omap-2.6 branch: master
> > and tested on 3430SDP, 4430SDP & zoom3.
>
> I have many problems with this series, but without going into the
> specifics of each patch, I have a big problem with the general
> approach being taken here.
>
> You say this is in preparation for adaptation to hwmod, but in fact,
> this series is duplicating a lot of the work you would get for free by
> starting with hwmod.
>
> You're generating a bunch of code that will be completely thrown away
> with a hwmod conversion. Instead, you should *start* by using hwmod +
> omap_device to generate the platform_devices for you. Doing this, you
> will drop patches 2, 3 and 4 entirely (they are mostly identical
> anyways, except for the search-and-replace) and also eliminate the
> need for patch 5.
>
> What is needed here is a way to introduce the platform_device
> conversion without introducing signifcant functional changes at the
> same time. Here's a proposal to do that, and which should also be
> considerably easier to review for sanity:
>
> - use hwmod + omap_device to generate (early) platform_devices
> - modify plat-omap/gpio.c to use base addr and IRQ from platform_device
> - modify plat-omap/gpio.c to get clocks based on 'struct device'
>
> For an example, you can see the pm-wip/hwmods branch in my tree for
> how this was done for UART and the pm-wip/mmc branch for how this was
> done for MMC.
I agree that most of the code would be thrown away once HWMOD comes into picture. Since hwmod patches would be gated for a long time, we decided to first proceed in pushing "GPIO as early init" patch series to mainline first, so that hwmods branch and mainline would not differ much.
Tony/Kevin,
Please suggest which approach is better
1. to send early init GPIO patches to mainline due to above mentioned reason (or)
2. to make GPIO as a HWMOD FW adapted driver and gate it in hwmods branch.
-Charulatha
>
> Kevin
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
2010-04-12 12:16 ` Varadarajan, Charulatha
@ 2010-04-19 14:31 ` Kevin Hilman
0 siblings, 0 replies; 35+ messages in thread
From: Kevin Hilman @ 2010-04-19 14:31 UTC (permalink / raw)
To: Varadarajan, Charulatha; +Cc: linux-omap, Nayak, Rajendra, paul, tony
"Varadarajan, Charulatha" <charu@ti.com> writes:
>> -----Original Message-----
>> From: Kevin Hilman [mailto:khilman@deeprootsystems.com]
>> Sent: Wednesday, April 07, 2010 4:01 AM
>> To: Varadarajan, Charulatha
>> Cc: linux-omap@vger.kernel.org; Nayak, Rajendra; paul@pwsan.com; tony@atomide.com
>> Subject: Re: [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS
>>
>> Charulatha V <charu@ti.com> writes:
>>
>> > This patch series is in preparation to adapt GPIO to HWMOD FW.
>> > It creates OMAP architecture specific gpio files to handle
>> > SoC specific gpio_init. The common plat-omap/gpio.c handles all
>> > common GPIO APIs.
>> >
>> > OMAP2PLUS GPIO module is implemented as early platform device and
>> > OMAP1 GPIO is still handled in old way via gpio_init from board files.
>> >
>> > Save/restore context, gpio_prepare_for_retention and
>> > gpio_resume_after_retention APIs are also handled in plat-omap layer.
>> > These APIs are currently not used in OMAP1, but still they might
>> > become common for different OMAP architectures in the future.
>> > Hence they are handled in plat-omap layer. If they need to be moved
>> > to mach-omap2 layer, additional patches may be sent during
>> > next version of this patch series.
>> >
>> > This patch series is generated on top of linux-omap-2.6 branch: master
>> > and tested on 3430SDP, 4430SDP & zoom3.
>>
>> I have many problems with this series, but without going into the
>> specifics of each patch, I have a big problem with the general
>> approach being taken here.
>>
>> You say this is in preparation for adaptation to hwmod, but in fact,
>> this series is duplicating a lot of the work you would get for free by
>> starting with hwmod.
>>
>> You're generating a bunch of code that will be completely thrown away
>> with a hwmod conversion. Instead, you should *start* by using hwmod +
>> omap_device to generate the platform_devices for you. Doing this, you
>> will drop patches 2, 3 and 4 entirely (they are mostly identical
>> anyways, except for the search-and-replace) and also eliminate the
>> need for patch 5.
>>
>> What is needed here is a way to introduce the platform_device
>> conversion without introducing signifcant functional changes at the
>> same time. Here's a proposal to do that, and which should also be
>> considerably easier to review for sanity:
>>
>> - use hwmod + omap_device to generate (early) platform_devices
>> - modify plat-omap/gpio.c to use base addr and IRQ from platform_device
>> - modify plat-omap/gpio.c to get clocks based on 'struct device'
>>
>> For an example, you can see the pm-wip/hwmods branch in my tree for
>> how this was done for UART and the pm-wip/mmc branch for how this was
>> done for MMC.
>
> I agree that most of the code would be thrown away once HWMOD comes into picture. Since hwmod patches would be gated for a long time, we decided to first proceed in pushing "GPIO as early init" patch series to mainline first, so that hwmods branch and mainline would not differ much.
>
> Tony/Kevin,
>
> Please suggest which approach is better
> 1. to send early init GPIO patches to mainline due to above mentioned reason (or)
> 2. to make GPIO as a HWMOD FW adapted driver and gate it in hwmods branch.
Please do option 2 to avoid massive duplication of work.
Kevin
^ permalink raw reply [flat|nested] 35+ messages in thread
end of thread, other threads:[~2010-04-19 14:31 UTC | newest]
Thread overview: 35+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-03-31 12:23 [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Charulatha V
2010-03-31 12:23 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Charulatha V
2010-03-31 12:23 ` [PATCH 2/8] OMAP3:GPIO:Add support for early platform gpio device Charulatha V
2010-03-31 12:23 ` [PATCH 3/8] OMAP2:GPIO:Add " Charulatha V
2010-03-31 12:23 ` [PATCH 4/8] OMAP4:GPIO:Add " Charulatha V
2010-03-31 12:23 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Charulatha V
2010-03-31 12:23 ` [PATCH 6/8] OMAP1:GPIO:Support for OMAP1 specific gpio Charulatha V
2010-03-31 12:23 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Charulatha V
2010-03-31 12:23 ` [PATCH 8/8] OMAP:GPIO:Common platform code for all OMAPs Charulatha V
2010-04-01 9:34 ` Tony Lindgren
2010-04-01 9:32 ` [PATCH 7/8] OMAP2PLUS:GPIO:Move gpio_init from board files to init_common_hw Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
2010-04-06 22:13 ` Kevin Hilman
2010-04-01 9:30 ` [PATCH 5/8] OMAP2PLUS:GPIO:Add OMAP2PLUS specific gpio support Tony Lindgren
2010-04-06 22:08 ` Kevin Hilman
2010-04-01 7:26 ` [PATCH 3/8] OMAP2:GPIO:Add support for early platform gpio device Felipe Balbi
2010-04-01 8:53 ` Varadarajan, Charulatha
2010-04-01 8:58 ` Felipe Balbi
2010-04-01 9:16 ` Varadarajan, Charulatha
2010-04-01 7:23 ` [PATCH 2/8] OMAP3:GPIO:Add " Felipe Balbi
2010-04-01 8:58 ` Varadarajan, Charulatha
2010-04-01 9:12 ` Tony Lindgren
2010-04-01 9:19 ` Varadarajan, Charulatha
2010-04-01 9:13 ` Tony Lindgren
2010-04-01 10:49 ` Varadarajan, Charulatha
2010-04-01 9:31 ` Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
2010-04-01 7:17 ` [PATCH 1/8] OMAP:GPIO:Move architecture specific macros to specific header Felipe Balbi
2010-04-01 8:52 ` Varadarajan, Charulatha
2010-04-01 9:00 ` Felipe Balbi
2010-04-01 9:41 ` Tony Lindgren
2010-04-01 10:50 ` Varadarajan, Charulatha
2010-04-06 22:31 ` [PATCH 0/8 RFC] OMAP: GPIO: Split OMAP1 and OMAP2PLUS Kevin Hilman
2010-04-12 12:16 ` Varadarajan, Charulatha
2010-04-19 14:31 ` Kevin Hilman
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