Re: [PATCH] parisc: Remove lock code to serialize TLB operations in pacache.S

[John David Anglin <dave.anglin@bell.net>]

On 2019-04-17 5:01 p.m., Helge Deller wrote:
> On 17.04.19 22:58, Helge Deller wrote:
>> On 17.04.19 22:55, Sven Schnelle wrote:
>>> On Fri, Apr 12, 2019 at 07:12:04PM -0400, John David Anglin wrote:
>>>> TLB operations only need to be serialized on machines with the Merced (Stretch) bus.
>>>> The only machines in this category are L and N class, and they require a 64-bit PA 2.0
>>>> kernel.  On these machines, we use local TLB purges in the tmpalias routines.  We don't
>>>> need to serialize TLB purges on all other machines.  Thus, the lock/unlock code can be
>>>> removed when CONFIG_PA20 is not defined.  Further, when CONFIG_PA20 is not defined,
>>>> alternative patching converts the TLB purges to local purges when PA 2.0 hardware has
>>>> been detected.
>>>>
>>>> Signed-off-by: John David Anglin <dave.anglin@bell.net>
>>> I had this patch running on my C8000 and J5000 for a few days, and haven't
>>> encountered any issues.
>> Nah...
>> I do have one of the critical machines (rp5470), and I tried
>> to add the necessary code to detect and handle the TLB serialization.
>> Until now the patch sadly doesn't work yet (hangs at boot), it still needs more work.
>> You can find it in my git tree:
>> https://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git/commit/?h=tlb-flush-merced-bus&id=fc6044f83cb9828ec6ebecb23a46549d9ebc518f
> Please ignore my comments.
> Dave's patch is OK.
>
> I mixed it up with the Mikulas Patocka's patch: "use per-pagetable spinlock"
> https://patchwork.kernel.org/patch/10888249/

I think this hunk needs fixing to handle merced case:

diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 5796524a3137..3e11fdd9d3af 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -48,14 +48,9 @@
     .level 2.0
 #endif
 
-    .import        pa_tlb_lock,data
-    .macro  load_pa_tlb_lock reg
-#if __PA_LDCW_ALIGNMENT > 4
-    load32    PA(pa_tlb_lock) + __PA_LDCW_ALIGNMENT-1, \reg
-    depi    0,31,__PA_LDCW_ALIGN_ORDER, \reg
-#else
-    load32    PA(pa_tlb_lock), \reg
-#endif
+    .macro  load_process_pte_lock reg
+    mfctl        %cr25,\reg
+    addil        L%((PAGE_SIZE << PGD_ALLOC_ORDER) - PAGE_SIZE),\reg
     .endm
 
     /* space_to_prot macro creates a prot id from a space id */


-- 
John David Anglin  dave.anglin@bell.net