From: David Laight <David.Laight@ACULAB.COM>
To: 'Mason' <slash.tmp@free.fr>, Robin Murphy <robin.murphy@arm.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>, Rob Herring <robh@kernel.org>,
"Arnd Bergmann" <arnd@arndb.de>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
"Marc Zyngier" <marc.zyngier@arm.com>,
linux-pci <linux-pci@vger.kernel.org>,
Thibaud Cornic <thibaud_cornic@sigmadesigns.com>,
linux-usb <linux-usb@vger.kernel.org>,
Phuong Nguyen <phuong_nguyen@sigmadesigns.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: RE: Neophyte questions about PCIe
Date: Fri, 10 Mar 2017 15:14:59 +0000 [thread overview]
Message-ID: <063D6719AE5E284EB5DD2968C1650D6DCFE7C973@AcuExch.aculab.com> (raw)
In-Reply-To: <c4712e19-863c-16b8-6920-5ad7dd178929@free.fr>
From: Mason
> Sent: 10 March 2017 15:06
...
> My RC drops packets not targeting its BAR0.
I suspect the fpga/cpld logic supports RC and endpoint modes
and is using much the same names for the registers (and logic
implementation).
If your cpu support more than 1GB of memory but only part is
PCIe accessible you'll have to ensure that all the memory
definitions are set correctly and 'bounce buffers' used for
some operations.
David
next prev parent reply other threads:[~2017-03-10 15:15 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-07 22:45 Neophyte questions about PCIe Mason
2017-03-08 13:39 ` Mason
2017-03-08 13:54 ` David Laight
2017-03-08 14:17 ` Mason
2017-03-08 14:38 ` David Laight
2017-03-09 22:01 ` Jeremy Linton
2017-03-08 15:17 ` Bjorn Helgaas
2017-03-09 23:43 ` Mason
2017-03-10 13:15 ` Robin Murphy
2017-03-10 14:06 ` David Laight
2017-03-10 15:05 ` Mason
2017-03-10 15:14 ` David Laight [this message]
2017-03-10 15:33 ` Mason
2017-03-10 15:23 ` Robin Murphy
2017-03-10 15:35 ` David Laight
2017-03-10 16:00 ` Robin Murphy
2017-03-13 10:59 ` Mason
2017-03-13 11:56 ` Robin Murphy
2017-03-10 18:49 ` Bjorn Helgaas
2017-03-10 14:53 ` Mason
2017-03-10 16:45 ` Mason
2017-03-10 17:49 ` Mason
2017-03-11 10:57 ` Mason
2017-03-13 21:40 ` Bjorn Helgaas
2017-03-13 21:57 ` Mason
2017-03-13 22:46 ` Bjorn Helgaas
2017-03-14 10:23 ` David Laight
2017-03-14 12:05 ` Mason
2017-03-14 12:24 ` David Laight
2017-03-13 14:25 ` Mason
2017-03-14 14:00 ` Mason
2017-03-14 15:54 ` Mason
2017-03-14 21:46 ` Bjorn Helgaas
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