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From: Mason <slash.tmp@free.fr>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci <linux-pci@vger.kernel.org>,
	Thibaud Cornic <thibaud_cornic@sigmadesigns.com>,
	David Laight <david.laight@aculab.com>,
	Phuong Nguyen <phuong_nguyen@sigmadesigns.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: Neophyte questions about PCIe
Date: Mon, 13 Mar 2017 15:25:04 +0100	[thread overview]
Message-ID: <e811931b-919f-48a3-8cb8-cacbaf5efd68@free.fr> (raw)
In-Reply-To: <df517167-d692-38a8-9c8f-a1112c7f578d@free.fr>

On 10/03/2017 18:49, Mason wrote:

> # /usr/sbin/lspci -v
> 00:00.0 PCI bridge: Sigma Designs, Inc. Device 0024 (rev 01) (prog-if 00 [Normal decode])
>         Flags: bus master, fast devsel, latency 0
>         Memory at <ignored> (64-bit, non-prefetchable)
>         Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
>         I/O behind bridge: 00000000-00000fff
>         Memory behind bridge: 04000000-040fffff
>         Prefetchable memory behind bridge: 00000000-000fffff
>         Capabilities: [50] MSI: Enable+ Count=1/4 Maskable- 64bit+
>         Capabilities: [78] Power Management version 3
>         Capabilities: [80] Express Root Port (Slot-), MSI 03
>         Capabilities: [100] Virtual Channel
>         Capabilities: [800] Advanced Error Reporting
>         Kernel driver in use: pcieport
> 
> Still some weirdness here.
> I might be using too old a version: lspci version 3.2.1

Focusing on the unexpected reports of stuff "behind bridge".
The output from pciutils 3.5.4 is mostly identical.
Is this likely to cause issues down the road?

# /usr/sbin/lspci -v
00:00.0 PCI bridge: Sigma Designs, Inc. Device 0024 (rev 01) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0, IRQ 25
        Memory at <ignored> (64-bit, non-prefetchable)
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 00000000-00000fff [size=4K]
        Memory behind bridge: 04000000-040fffff [size=1M]
        Prefetchable memory behind bridge: 00000000-000fffff [size=1M]
        Capabilities: [50] MSI: Enable+ Count=1/4 Maskable- 64bit+
        Capabilities: [78] Power Management version 3
        Capabilities: [80] Express Root Port (Slot-), MSI 03
        Capabilities: [100] Virtual Channel
        Capabilities: [800] Advanced Error Reporting
        Kernel driver in use: pcieport

Regards.

  parent reply	other threads:[~2017-03-13 14:25 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-07 22:45 Neophyte questions about PCIe Mason
2017-03-08 13:39 ` Mason
2017-03-08 13:54 ` David Laight
2017-03-08 14:17   ` Mason
2017-03-08 14:38     ` David Laight
2017-03-09 22:01   ` Jeremy Linton
2017-03-08 15:17 ` Bjorn Helgaas
2017-03-09 23:43   ` Mason
2017-03-10 13:15     ` Robin Murphy
2017-03-10 14:06       ` David Laight
2017-03-10 15:05         ` Mason
2017-03-10 15:14           ` David Laight
2017-03-10 15:33             ` Mason
2017-03-10 15:23           ` Robin Murphy
2017-03-10 15:35             ` David Laight
2017-03-10 16:00               ` Robin Murphy
2017-03-13 10:59                 ` Mason
2017-03-13 11:56                   ` Robin Murphy
2017-03-10 18:49           ` Bjorn Helgaas
2017-03-10 14:53       ` Mason
2017-03-10 16:45     ` Mason
2017-03-10 17:49       ` Mason
2017-03-11 10:57         ` Mason
2017-03-13 21:40           ` Bjorn Helgaas
2017-03-13 21:57             ` Mason
2017-03-13 22:46               ` Bjorn Helgaas
2017-03-14 10:23               ` David Laight
2017-03-14 12:05                 ` Mason
2017-03-14 12:24                   ` David Laight
2017-03-13 14:25         ` Mason [this message]
2017-03-14 14:00         ` Mason
2017-03-14 15:54           ` Mason
2017-03-14 21:46             ` Bjorn Helgaas

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