linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Jiang Liu <liuj97@gmail.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
	Don Dutile <ddutile@redhat.com>, Jon Mason <mason@myri.com>,
	Andrew Gallatin <gallatin@myri.com>
Cc: Jiang Liu <jiang.liu@huawei.com>, Yinghai Lu <yinghai@kernel.org>,
	Taku Izumi <izumi.taku@jp.fujitsu.com>,
	"Rafael J . Wysocki" <rjw@sisk.pl>,
	Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>,
	Yijing Wang <wangyijing@huawei.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	Jiang Liu <liuj97@gmail.com>
Subject: [PATCH v3 21/32] PCI/myri10ge: use PCIe capabilities access functions to simplify implementation
Date: Wed,  1 Aug 2012 23:54:26 +0800	[thread overview]
Message-ID: <1343836477-7287-22-git-send-email-jiang.liu@huawei.com> (raw)
In-Reply-To: <1343836477-7287-1-git-send-email-jiang.liu@huawei.com>

From: Jiang Liu <jiang.liu@huawei.com>

Use PCIe capabilities access functions to simplify myri10ge driver's
implementation.

Signed-off-by: Jiang Liu <liuj97@gmail.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/net/ethernet/myricom/myri10ge/myri10ge.c |   39 ++++------------------
 1 file changed, 7 insertions(+), 32 deletions(-)

diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
index 90153fc..fe6c44d 100644
--- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
@@ -1078,24 +1078,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
 #ifdef CONFIG_MYRI10GE_DCA
 static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on)
 {
-	int ret, cap, err;
-	u16 ctl;
-
-	cap = pci_pcie_cap(pdev);
-	if (!cap)
-		return 0;
-
-	err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
-	if (err)
-		return 0;
-
-	ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4;
-	if (ret != on) {
-		ctl &= ~PCI_EXP_DEVCTL_RELAX_EN;
-		ctl |= (on << 4);
-		pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
-	}
-	return ret;
+	return pci_pcie_capability_change_word(pdev, PCI_EXP_DEVCTL,
+		       on << 4, PCI_EXP_DEVCTL_RELAX_EN);
 }
 
 static void
@@ -3192,18 +3176,13 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
 	struct device *dev = &mgp->pdev->dev;
 	int cap;
 	unsigned err_cap;
-	u16 val;
-	u8 ext_type;
 	int ret;
 
 	if (!myri10ge_ecrc_enable || !bridge)
 		return;
 
 	/* check that the bridge is a root port */
-	cap = pci_pcie_cap(bridge);
-	pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
-	ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
-	if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
+	if (pci_pcie_type(bridge) != PCI_EXP_TYPE_ROOT_PORT) {
 		if (myri10ge_ecrc_enable > 1) {
 			struct pci_dev *prev_bridge, *old_bridge = bridge;
 
@@ -3218,11 +3197,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
 						" to force ECRC\n");
 					return;
 				}
-				cap = pci_pcie_cap(bridge);
-				pci_read_config_word(bridge,
-						     cap + PCI_CAP_FLAGS, &val);
-				ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
-			} while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
+			} while (pci_pcie_type(bridge) !=
+				 PCI_EXP_TYPE_ROOT_PORT);
 
 			dev_info(dev,
 				 "Forcing ECRC on non-root port %s"
@@ -3335,11 +3311,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
 	int overridden = 0;
 
 	if (myri10ge_force_firmware == 0) {
-		int link_width, exp_cap;
+		int link_width;
 		u16 lnk;
 
-		exp_cap = pci_pcie_cap(mgp->pdev);
-		pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
+		pci_pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk);
 		link_width = (lnk >> 4) & 0x3f;
 
 		/* Check to see if Link is less than 8 or if the
-- 
1.7.9.5


  parent reply	other threads:[~2012-08-01 15:54 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-08-01 15:54 [PATCH v3 00/32] provide interfaces to access PCIe capabilities registers Jiang Liu
2012-08-01 15:54 ` [PATCH v3 01/32] PCI: add pcie_flags_reg into struct pci_dev to cache PCIe capabilities register Jiang Liu
2012-08-01 15:54 ` [PATCH v3 02/32] PCI: introduce pci_pcie_type(dev) to replace pci_dev->pcie_type Jiang Liu
2012-08-01 15:54 ` [PATCH v3 03/32] PCI: remove unused field pcie_type from struct pci_dev Jiang Liu
2012-08-01 15:54 ` [PATCH v3 04/32] PCI: add PCIe capabilities access functions to hide differences among PCIe specs Jiang Liu
2012-08-01 15:54 ` [PATCH v3 05/32] PCI/core: use PCIe capabilities access functions to simplify implementation Jiang Liu
2012-08-01 15:54 ` [PATCH v3 06/32] PCI/hotplug: " Jiang Liu
2012-08-02  1:30   ` Kaneshige, Kenji
2012-08-01 15:54 ` [PATCH v3 07/32] PCI/portdrv: " Jiang Liu
2012-08-02  1:33   ` Kaneshige, Kenji
2012-08-01 15:54 ` [PATCH v3 08/32] PCI/pciehp: " Jiang Liu
2012-08-02  1:37   ` Kaneshige, Kenji
2012-08-01 15:54 ` [PATCH v3 09/32] PCI/PME: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 10/32] PCI/AER: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 11/32] PCI/ASPM: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 12/32] PCI/ARM: " Jiang Liu
2012-08-01 17:20   ` Stephen Warren
2012-08-02  5:58     ` Thierry Reding
2012-08-03 18:05   ` Stephen Warren
2012-08-01 15:54 ` [PATCH v3 13/32] PCI/MIPS: " Jiang Liu
2012-08-13 21:40   ` David Daney
2012-08-01 15:54 ` [PATCH v3 14/32] PCI/tile: " Jiang Liu
2012-08-01 21:07   ` Chris Metcalf
2012-08-01 15:54 ` [PATCH v3 15/32] PCI/r8169: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 16/32] PCI/broadcom: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 17/32] PCI/igb: " Jiang Liu
2012-08-02 22:12   ` Jeff Kirsher
2012-08-01 15:54 ` [PATCH v3 18/32] PCI/vxge: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 19/32] PCI/mlx4: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 20/32] PCI/niu: " Jiang Liu
2012-08-01 15:54 ` Jiang Liu [this message]
2012-08-01 15:54 ` [PATCH v3 22/32] PCI/chelsio: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 23/32] PCI/atl1c: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 24/32] PCI/ath9k: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 25/32] PCI/iwl: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 26/32] PCI/mthca: " Jiang Liu
2012-08-02 21:46   ` Roland Dreier
2012-08-01 15:54 ` [PATCH v3 27/32] PCI/qib: " Jiang Liu
2012-08-01 17:30   ` Marciniszyn, Mike
2012-08-01 15:54 ` [PATCH v3 28/32] PCI/qla: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 29/32] PCI/radeon: " Jiang Liu
2012-08-01 16:04   ` Deucher, Alexander
2012-08-01 15:54 ` [PATCH v3 30/32] PCI/tsi721: " Jiang Liu
2012-08-09 14:16   ` Bounine, Alexandre
2012-08-01 15:54 ` [PATCH v3 31/32] PCI/et131x: " Jiang Liu
2012-08-01 15:54 ` [PATCH v3 32/32] PCI/rtl8192e: " Jiang Liu
2012-08-14  4:25 ` [PATCH v3 00/32] provide interfaces to access PCIe capabilities registers Bjorn Helgaas
2012-08-14 15:46   ` Jiang Liu
2012-08-20 15:26   ` Jiang Liu
2012-08-20 15:35     ` Bjorn Helgaas
2012-08-20 15:47       ` Jiang Liu
2012-08-20 16:10         ` Bjorn Helgaas
2012-08-20 22:13           ` Bjorn Helgaas
2012-08-21  4:40             ` Cui, Dexuan
2012-08-22 16:28               ` Bjorn Helgaas
2012-08-23  1:00                 ` Cui, Dexuan
2012-08-23  1:51                 ` Don Dutile
2012-08-21 15:59             ` Jiang Liu
2012-08-22 17:08               ` Bjorn Helgaas
2012-08-24 18:52     ` Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1343836477-7287-22-git-send-email-jiang.liu@huawei.com \
    --to=liuj97@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=ddutile@redhat.com \
    --cc=gallatin@myri.com \
    --cc=izumi.taku@jp.fujitsu.com \
    --cc=jiang.liu@huawei.com \
    --cc=kaneshige.kenji@jp.fujitsu.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=mason@myri.com \
    --cc=rjw@sisk.pl \
    --cc=wangyijing@huawei.com \
    --cc=yinghai@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).