From: Richard Zhu <richard.zhu@freescale.com>
To: <linux-pci@vger.kernel.org>
Cc: <shawn.guo@freescale.com>, <festevam@gmail.com>,
<l.stach@pengutronix.de>, <tharvey@gateworks.com>,
<m-karicheri2@ti.com>, Richard Zhu <r65037@freescale.com>,
Richard Zhu <richard.zhu@freescale.com>
Subject: [PATCH v8 6/9] ARM: imx6qdl: Enable pcie on imx6qdl sabreauto
Date: Mon, 20 Oct 2014 13:25:21 +0800 [thread overview]
Message-ID: <1413782724-30795-7-git-send-email-richard.zhu@freescale.com> (raw)
In-Reply-To: <1413782724-30795-1-git-send-email-richard.zhu@freescale.com>
From: Richard Zhu <r65037@freescale.com>
- enable pcie on imx6qdl sabreauto boards.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 009abd6..d6040a5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -410,6 +410,10 @@
};
};
+&pcie {
+ status = "okay";
+};
+
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
--
1.9.1
next prev parent reply other threads:[~2014-10-20 5:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-20 5:25 [PATCH v8]PCI: imx6: enable pcie on imx6sx sdb and imx6qdl sabreauto Richard Zhu
2014-10-20 5:25 ` [PATCH v8 1/9] PCI: designware: Refine setup_rc and add msi data restore Richard Zhu
2014-10-20 5:25 ` [PATCH v8 2/9] PCI: designware: Fix one potential assignment error of cfg start Richard Zhu
2014-10-21 10:27 ` Lucas Stach
2014-10-20 5:25 ` [PATCH v8 3/9] ARM: imx6sx: Add imx6sx pcie related gpr bits definitions Richard Zhu
2014-10-20 5:25 ` [PATCH v8 4/9] PCI: imx6: Wait the clocks to stabilize after ref_en Richard Zhu
2014-10-20 5:25 ` [PATCH v8 5/9] PCI: imx6: Add imx6sx pcie support Richard Zhu
2014-10-27 18:24 ` Murali Karicheri
2014-10-31 2:43 ` Richard.Zhu
2014-10-20 5:25 ` Richard Zhu [this message]
2014-10-20 5:25 ` [PATCH v8 7/9] ARM: imx6: Update dts and binding for imx6sx pcie Richard Zhu
2014-10-20 5:25 ` [PATCH v8 8/9] ARM: imx6sx: Add syscon into gpc dts Richard Zhu
2014-10-20 5:25 ` [PATCH v8 9/9] ARM: imx6sx: Enable pcie on imx6sx sdb board Richard Zhu
2014-10-21 8:18 ` [PATCH v8]PCI: imx6: enable pcie on imx6sx sdb and imx6qdl sabreauto Lucas Stach
2014-10-21 9:54 ` Hong-Xing.Zhu
2014-10-21 15:37 ` Bjorn Helgaas
2014-10-22 2:34 ` Hong-Xing.Zhu
2014-10-22 2:48 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1413782724-30795-7-git-send-email-richard.zhu@freescale.com \
--to=richard.zhu@freescale.com \
--cc=festevam@gmail.com \
--cc=l.stach@pengutronix.de \
--cc=linux-pci@vger.kernel.org \
--cc=m-karicheri2@ti.com \
--cc=r65037@freescale.com \
--cc=shawn.guo@freescale.com \
--cc=tharvey@gateworks.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).