From: Huang Rui <ray.huang@amd.com>
To: Felipe Balbi <balbi@ti.com>,
Alan Stern <stern@rowland.harvard.edu>,
"Bjorn Helgaas" <bhelgaas@google.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Paul Zimmerman <Paul.Zimmerman@synopsys.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
Jason Chang <jason.chang@amd.com>,
Vincent Wan <vincent.wan@amd.com>, Tony Li <tony.li@amd.com>,
<linux-usb@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Huang Rui <ray.huang@amd.com>
Subject: [PATCH v4 05/20] usb: dwc3: add lpm erratum support
Date: Thu, 30 Oct 2014 18:08:30 +0800 [thread overview]
Message-ID: <1414663725-2195-6-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1414663725-2195-1-git-send-email-ray.huang@amd.com>
When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Advanced
Configuration of coreConsultant, support of xHCI BESL Errata Dated
10/19/2011 is enabled in host mode. In device mode it adds the capability
to send NYET response threshold based on the BESL value received in the LPM
token, and the threshold is configurable for each SoC platform.
This patch adds an entry that soc platform is able to define the lpm
capacity with their own device tree or bus glue layer.
[ balbi@ti.com : added devicetree documentation, spelled threshold
completely, made sure threshold is only applied to
proper core revisions. ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++
drivers/usb/dwc3/core.c | 16 +++++++++++++++-
drivers/usb/dwc3/core.h | 26 +++++++++++++++++---------
drivers/usb/dwc3/gadget.c | 13 +++++++++++++
drivers/usb/dwc3/platform_data.h | 3 +++
5 files changed, 50 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 8ec2256..2b0c1f2 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -16,6 +16,8 @@ Optional properties:
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
- snps,disable_scramble_quirk: true when SW should disable data scrambling.
Only really useful for FPGA builds.
+ - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
+ - snps,lpm-nyet-threshold: LPM NYET threshold
This is usually a subnode to DWC3 glue to which it is connected.
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fae095f..2ac96e4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -654,6 +654,7 @@ static int dwc3_probe(struct platform_device *pdev)
struct device_node *node = dev->of_node;
struct resource *res;
struct dwc3 *dwc;
+ u8 lpm_nyet_threshold;
int ret;
@@ -709,16 +710,27 @@ static int dwc3_probe(struct platform_device *pdev)
*/
res->start -= DWC3_GLOBALS_REGS_START;
+ /* default to highest possible threshold */
+ lpm_nyet_threshold = 0xff;
+
if (node) {
dwc->maximum_speed = of_usb_get_maximum_speed(node);
+ dwc->has_lpm_erratum = of_property_read_bool(node,
+ "snps,has-lpm-erratum");
+ of_property_read_u8(node, "snps,lpm-nyet-threshold",
+ &lpm_nyet_threshold);
- dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
+ dwc->needs_fifo_resize = of_property_read_bool(node,
+ "tx-fifo-resize");
dwc->dr_mode = of_usb_get_dr_mode(node);
dwc->disable_scramble_quirk = of_property_read_bool(node,
"snps,disable_scramble_quirk");
} else if (pdata) {
dwc->maximum_speed = pdata->maximum_speed;
+ dwc->has_lpm_erratum = pdata->has_lpm_erratum;
+ if (pdata->lpm_nyet_threshold)
+ lpm_nyet_threshold = pdata->lpm_nyet_threshold;
dwc->needs_fifo_resize = pdata->tx_fifo_resize;
dwc->dr_mode = pdata->dr_mode;
@@ -730,6 +742,8 @@ static int dwc3_probe(struct platform_device *pdev)
if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
dwc->maximum_speed = USB_SPEED_SUPER;
+ dwc->lpm_nyet_threshold = lpm_nyet_threshold;
+
ret = dwc3_core_get_phy(dwc);
if (ret)
return ret;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 56bada6..34f1e08 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -246,16 +246,19 @@
#define DWC3_DCTL_TRGTULST_SS_INACT (DWC3_DCTL_TRGTULST(6))
/* These apply for core versions 1.94a and later */
-#define DWC3_DCTL_KEEP_CONNECT (1 << 19)
-#define DWC3_DCTL_L1_HIBER_EN (1 << 18)
-#define DWC3_DCTL_CRS (1 << 17)
-#define DWC3_DCTL_CSS (1 << 16)
+#define DWC3_DCTL_LPM_ERRATA_MASK DWC3_DCTL_LPM_ERRATA(0xf)
+#define DWC3_DCTL_LPM_ERRATA(n) ((n) << 20)
-#define DWC3_DCTL_INITU2ENA (1 << 12)
-#define DWC3_DCTL_ACCEPTU2ENA (1 << 11)
-#define DWC3_DCTL_INITU1ENA (1 << 10)
-#define DWC3_DCTL_ACCEPTU1ENA (1 << 9)
-#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1)
+#define DWC3_DCTL_KEEP_CONNECT (1 << 19)
+#define DWC3_DCTL_L1_HIBER_EN (1 << 18)
+#define DWC3_DCTL_CRS (1 << 17)
+#define DWC3_DCTL_CSS (1 << 16)
+
+#define DWC3_DCTL_INITU2ENA (1 << 12)
+#define DWC3_DCTL_ACCEPTU2ENA (1 << 11)
+#define DWC3_DCTL_INITU1ENA (1 << 10)
+#define DWC3_DCTL_ACCEPTU1ENA (1 << 9)
+#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1)
#define DWC3_DCTL_ULSTCHNGREQ_MASK (0x0f << 5)
#define DWC3_DCTL_ULSTCHNGREQ(n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK)
@@ -660,10 +663,13 @@ struct dwc3_scratchpad_array {
* @regset: debugfs pointer to regdump file
* @test_mode: true when we're entering a USB test mode
* @test_mode_nr: test feature selector
+ * @lpm_nyet_threshold: LPM NYET response threshold
* @delayed_status: true when gadget driver asks for delayed status
* @ep0_bounced: true when we used bounce buffer
* @ep0_expect_in: true when we expect a DATA IN transfer
* @has_hibernation: true when dwc3 was configured with Hibernation
+ * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
+ * there's now way for software to detect this in runtime.
* @is_selfpowered: true when we are selfpowered
* @is_fpga: true when we are using the FPGA board
* @needs_fifo_resize: not all users might want fifo resizing, flag it
@@ -764,11 +770,13 @@ struct dwc3 {
u8 test_mode;
u8 test_mode_nr;
+ u8 lpm_nyet_threshold;
unsigned delayed_status:1;
unsigned ep0_bounced:1;
unsigned ep0_expect_in:1;
unsigned has_hibernation:1;
+ unsigned has_lpm_erratum:1;
unsigned is_selfpowered:1;
unsigned is_fpga:1;
unsigned needs_fifo_resize:1;
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 7a64c2f..2c0d19a4 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2297,6 +2297,19 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
*/
reg |= DWC3_DCTL_HIRD_THRES(12);
+ /*
+ * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
+ * DCFG.LPMCap is set, core responses with an ACK and the
+ * BESL value in the LPM token is less than or equal to LPM
+ * NYET threshold.
+ */
+ WARN_ONCE(dwc->revision < DWC3_REVISION_240A
+ && dwc->has_lpm_erratum,
+ "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
+
+ if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
+ reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
+
dwc3_writel(dwc->regs, DWC3_DCTL, reg);
} else {
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index 9209d02..e128308 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -25,5 +25,8 @@ struct dwc3_platform_data {
enum usb_dr_mode dr_mode;
bool tx_fifo_resize;
+ u8 lpm_nyet_threshold;
+
unsigned disable_scramble_quirk:1;
+ unsigned has_lpm_erratum:1;
};
--
1.9.1
next prev parent reply other threads:[~2014-10-30 10:10 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 10:08 [PATCH v4 00/20] usb: dwc3: add support for AMD Nolan SoC Huang Rui
2014-10-30 10:08 ` [PATCH v4 01/20] usb: dwc3: enable hibernation if to be supported Huang Rui
2014-10-30 11:35 ` Arnd Bergmann
2014-10-30 11:36 ` Huang Rui
2014-10-30 14:08 ` Felipe Balbi
2014-10-30 14:14 ` Arnd Bergmann
2014-10-30 14:18 ` Felipe Balbi
2014-10-30 10:08 ` [PATCH v4 02/20] usb: dwc3: add a flag to check if it is FPGA board Huang Rui
2014-10-30 10:08 ` [PATCH v4 03/20] usb: dwc3: initialize platform data at pci glue layer Huang Rui
2014-10-30 10:08 ` [PATCH v4 04/20] usb: dwc3: add disable scramble quirk Huang Rui
2014-10-30 10:08 ` Huang Rui [this message]
2014-10-30 10:08 ` [PATCH v4 06/20] usb: dwc3: add U2Exit LFPS quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 07/20] usb: dwc3: add P3 in U2 SS Inactive quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 08/20] usb: dwc3: add request P1/P2/P3 quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 09/20] usb: dwc3: add delay " Huang Rui
2014-10-30 10:08 ` [PATCH v4 10/20] usb: dwc3: add delay phy power change quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 11/20] usb: dwc3: add LFPS filter quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 12/20] usb: dwc3: add rx_detect to polling LFPS quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 13/20] usb: dwc3: set SUSPHY bit for all cores Huang Rui
2014-10-30 10:08 ` [PATCH v4 14/20] usb: dwc3: add Tx de-emphasis quirk Huang Rui
2014-10-30 16:42 ` Felipe Balbi
2014-10-31 1:29 ` Huang Rui
2014-10-31 3:00 ` Felipe Balbi
2014-10-30 10:08 ` [PATCH v4 15/20] usb: dwc3: add disable usb3 suspend phy quirk Huang Rui
2014-10-30 10:08 ` [PATCH v4 16/20] usb: dwc3: add disable usb2 " Huang Rui
2014-10-30 16:39 ` Felipe Balbi
2014-10-31 1:34 ` Huang Rui
2014-10-30 10:08 ` [PATCH v4 17/20] PCI: Add support for AMD Nolan USB3 DRD Huang Rui
2014-10-30 10:08 ` [PATCH v4 18/20] PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD device Huang Rui
2014-10-30 10:08 ` [PATCH v4 19/20] usb: dwc3: add support for AMD Nolan platform Huang Rui
2014-10-30 16:38 ` Felipe Balbi
2014-10-31 1:35 ` Huang Rui
2014-10-30 10:08 ` [PATCH v4 20/20] usb: dwc3: make HIRD threshold configurable Huang Rui
2014-10-30 16:37 ` Felipe Balbi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1414663725-2195-6-git-send-email-ray.huang@amd.com \
--to=ray.huang@amd.com \
--cc=Paul.Zimmerman@synopsys.com \
--cc=balbi@ti.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=heikki.krogerus@linux.intel.com \
--cc=jason.chang@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=sergei.shtylyov@cogentembedded.com \
--cc=stern@rowland.harvard.edu \
--cc=tony.li@amd.com \
--cc=vincent.wan@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).