linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] pci: Store more data about VFs into the SRIOV struct
@ 2018-01-17 17:44 KarimAllah Ahmed
  2018-02-28 21:30 ` Bjorn Helgaas
  0 siblings, 1 reply; 3+ messages in thread
From: KarimAllah Ahmed @ 2018-01-17 17:44 UTC (permalink / raw)
  To: linux-pci; +Cc: KarimAllah Ahmed, Bjorn Helgaas, linux-kernel

... to avoid reading them from the config space of all the PCI VFs. This is
specially a useful optimization when bringing up thousands of VFs.

Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de>
---
 drivers/pci/iov.c   | 20 ++++++++++++++++++--
 drivers/pci/pci.h   |  6 +++++-
 drivers/pci/probe.c | 42 ++++++++++++++++++++++++++++++++----------
 3 files changed, 55 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 168328a..78e9595 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -129,7 +129,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
 	if (!dev->is_physfn)
 		return 0;
 
-	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
+	return dev->sriov->vf_barsz[resno - PCI_IOV_RESOURCES];
 }
 
 int batch_pci_iov_add_virtfn(struct pci_dev *dev, struct pci_bus **bus,
@@ -325,6 +325,20 @@ static void pci_iov_wq_fn(struct work_struct *work)
 	kfree(req);
 }
 
+static void pci_read_vf_config_common(struct pci_bus *bus,
+				      struct pci_dev *dev)
+{
+	int devfn = pci_iov_virtfn_devfn(dev, 0);
+
+	pci_bus_read_config_dword(bus, devfn, PCI_CLASS_REVISION,
+				  &dev->sriov->vf_class);
+	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_ID,
+				 &dev->sriov->vf_subsystem_device);
+	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_VENDOR_ID,
+				 &dev->sriov->vf_subsystem_vendor);
+	pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &dev->sriov->vf_hdr_type);
+}
+
 static struct workqueue_struct *pci_iov_wq;
 
 static int __init init_pci_iov_wq(void)
@@ -361,6 +375,8 @@ static int enable_vfs(struct pci_dev *dev, int nr_vfs)
 			goto add_bus_fail;
 	}
 
+	pci_read_vf_config_common(bus[0], dev);
+
 	while (remaining_vfs > 0) {
 		bool ret;
 		struct pci_iov_wq_item *req;
@@ -617,7 +633,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
 			rc = -EIO;
 			goto failed;
 		}
-		iov->barsz[i] = resource_size(res);
+		iov->vf_barsz[i] = resource_size(res);
 		res->end = res->start + resource_size(res) * total - 1;
 		dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
 			 i, res, i, total);
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index f6b58b3..3264c9e 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -271,7 +271,11 @@ struct pci_sriov {
 	u16 driver_max_VFs;	/* max num VFs driver supports */
 	struct pci_dev *dev;	/* lowest numbered PF */
 	struct pci_dev *self;	/* this PF */
-	resource_size_t barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
+	u8 vf_hdr_type;		/* VF header type */
+	u32 vf_class;		/* VF device */
+	u16 vf_subsystem_vendor;	/* VF subsystem vendor */
+	u16 vf_subsystem_device;	/* VF subsystem device */
+	resource_size_t vf_barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
 	bool drivers_autoprobe;	/* auto probing of VFs by driver */
 };
 
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 14e0ea1..65099d0 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -175,6 +175,7 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 		    struct resource *res, unsigned int pos)
 {
+	int bar = res - dev->resource;
 	u32 l = 0, sz = 0, mask;
 	u64 l64, sz64, mask64;
 	u16 orig_cmd;
@@ -194,9 +195,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 	res->name = pci_name(dev);
 
 	pci_read_config_dword(dev, pos, &l);
-	pci_write_config_dword(dev, pos, l | mask);
-	pci_read_config_dword(dev, pos, &sz);
-	pci_write_config_dword(dev, pos, l);
+	if (dev->is_virtfn) {
+		sz = dev->physfn->sriov->vf_barsz[bar] & 0xffffffff;
+	} else {
+		pci_write_config_dword(dev, pos, l | mask);
+		pci_read_config_dword(dev, pos, &sz);
+		pci_write_config_dword(dev, pos, l);
+	}
 
 	/*
 	 * All bits set in sz means the device isn't working properly.
@@ -236,9 +241,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 
 	if (res->flags & IORESOURCE_MEM_64) {
 		pci_read_config_dword(dev, pos + 4, &l);
-		pci_write_config_dword(dev, pos + 4, ~0);
-		pci_read_config_dword(dev, pos + 4, &sz);
-		pci_write_config_dword(dev, pos + 4, l);
+
+		if (dev->is_virtfn) {
+			sz = (dev->physfn->sriov->vf_barsz[bar] >> 32) & 0xffffffff;
+		} else {
+			pci_write_config_dword(dev, pos + 4, ~0);
+			pci_read_config_dword(dev, pos + 4, &sz);
+			pci_write_config_dword(dev, pos + 4, l);
+		}
 
 		l64 |= ((u64)l << 32);
 		sz64 |= ((u64)sz << 32);
@@ -327,6 +337,8 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
 	for (pos = 0; pos < howmany; pos++) {
 		struct resource *res = &dev->resource[pos];
 		reg = PCI_BASE_ADDRESS_0 + (pos << 2);
+		if (dev->is_virtfn && dev->physfn->sriov->vf_barsz[pos] == 0)
+			continue;
 		pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
 	}
 
@@ -1444,7 +1456,9 @@ int pci_setup_device(struct pci_dev *dev)
 	struct pci_bus_region region;
 	struct resource *res;
 
-	if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
+	if (dev->is_virtfn)
+		hdr_type = dev->physfn->sriov->vf_hdr_type;
+	else if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
 		return -EIO;
 
 	dev->sysdata = dev->bus->sysdata;
@@ -1464,7 +1478,10 @@ int pci_setup_device(struct pci_dev *dev)
 		     dev->bus->number, PCI_SLOT(dev->devfn),
 		     PCI_FUNC(dev->devfn));
 
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
+	if (dev->is_virtfn)
+		class = dev->physfn->sriov->vf_class;
+	else
+		pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
 	dev->revision = class & 0xff;
 	dev->class = class >> 8;		    /* upper 3 bytes */
 
@@ -1503,8 +1520,13 @@ int pci_setup_device(struct pci_dev *dev)
 			goto bad;
 		pci_read_irq(dev);
 		pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
-		pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
-		pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
+		if (dev->is_virtfn) {
+			dev->subsystem_vendor = dev->physfn->sriov->vf_subsystem_vendor;
+			dev->subsystem_device = dev->physfn->sriov->vf_subsystem_device;
+		} else {
+			pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
+			pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
+		}
 
 		/*
 		 * Do the ugly legacy mode stuff here rather than broken chip
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] pci: Store more data about VFs into the SRIOV struct
  2018-01-17 17:44 [PATCH] pci: Store more data about VFs into the SRIOV struct KarimAllah Ahmed
@ 2018-02-28 21:30 ` Bjorn Helgaas
  2018-02-28 21:33   ` Raslan, KarimAllah
  0 siblings, 1 reply; 3+ messages in thread
From: Bjorn Helgaas @ 2018-02-28 21:30 UTC (permalink / raw)
  To: KarimAllah Ahmed; +Cc: linux-pci, Bjorn Helgaas, linux-kernel

On Wed, Jan 17, 2018 at 06:44:23PM +0100, KarimAllah Ahmed wrote:
> ... to avoid reading them from the config space of all the PCI VFs. This is
> specially a useful optimization when bringing up thousands of VFs.
> 
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de>

What does this patch apply to?  It doesn't apply to v4.16-rc1 (my
"master" branch).  I don't see anything in the history of
drivers/pci/iov.c about pci_iov_wq_fn().

> ---
>  drivers/pci/iov.c   | 20 ++++++++++++++++++--
>  drivers/pci/pci.h   |  6 +++++-
>  drivers/pci/probe.c | 42 ++++++++++++++++++++++++++++++++----------
>  3 files changed, 55 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
> index 168328a..78e9595 100644
> --- a/drivers/pci/iov.c
> +++ b/drivers/pci/iov.c
> @@ -129,7 +129,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
>  	if (!dev->is_physfn)
>  		return 0;
>  
> -	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
> +	return dev->sriov->vf_barsz[resno - PCI_IOV_RESOURCES];
>  }
>  
>  int batch_pci_iov_add_virtfn(struct pci_dev *dev, struct pci_bus **bus,
> @@ -325,6 +325,20 @@ static void pci_iov_wq_fn(struct work_struct *work)
>  	kfree(req);
>  }
>  
> +static void pci_read_vf_config_common(struct pci_bus *bus,
> +				      struct pci_dev *dev)
> +{
> +	int devfn = pci_iov_virtfn_devfn(dev, 0);
> +
> +	pci_bus_read_config_dword(bus, devfn, PCI_CLASS_REVISION,
> +				  &dev->sriov->vf_class);
> +	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_ID,
> +				 &dev->sriov->vf_subsystem_device);
> +	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_VENDOR_ID,
> +				 &dev->sriov->vf_subsystem_vendor);
> +	pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &dev->sriov->vf_hdr_type);
> +}
> +
>  static struct workqueue_struct *pci_iov_wq;
>  
>  static int __init init_pci_iov_wq(void)
> @@ -361,6 +375,8 @@ static int enable_vfs(struct pci_dev *dev, int nr_vfs)
>  			goto add_bus_fail;
>  	}
>  
> +	pci_read_vf_config_common(bus[0], dev);
> +
>  	while (remaining_vfs > 0) {
>  		bool ret;
>  		struct pci_iov_wq_item *req;
> @@ -617,7 +633,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
>  			rc = -EIO;
>  			goto failed;
>  		}
> -		iov->barsz[i] = resource_size(res);
> +		iov->vf_barsz[i] = resource_size(res);
>  		res->end = res->start + resource_size(res) * total - 1;
>  		dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
>  			 i, res, i, total);
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index f6b58b3..3264c9e 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -271,7 +271,11 @@ struct pci_sriov {
>  	u16 driver_max_VFs;	/* max num VFs driver supports */
>  	struct pci_dev *dev;	/* lowest numbered PF */
>  	struct pci_dev *self;	/* this PF */
> -	resource_size_t barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
> +	u8 vf_hdr_type;		/* VF header type */
> +	u32 vf_class;		/* VF device */
> +	u16 vf_subsystem_vendor;	/* VF subsystem vendor */
> +	u16 vf_subsystem_device;	/* VF subsystem device */
> +	resource_size_t vf_barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
>  	bool drivers_autoprobe;	/* auto probing of VFs by driver */
>  };
>  
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 14e0ea1..65099d0 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -175,6 +175,7 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
>  int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  		    struct resource *res, unsigned int pos)
>  {
> +	int bar = res - dev->resource;
>  	u32 l = 0, sz = 0, mask;
>  	u64 l64, sz64, mask64;
>  	u16 orig_cmd;
> @@ -194,9 +195,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  	res->name = pci_name(dev);
>  
>  	pci_read_config_dword(dev, pos, &l);
> -	pci_write_config_dword(dev, pos, l | mask);
> -	pci_read_config_dword(dev, pos, &sz);
> -	pci_write_config_dword(dev, pos, l);
> +	if (dev->is_virtfn) {
> +		sz = dev->physfn->sriov->vf_barsz[bar] & 0xffffffff;
> +	} else {
> +		pci_write_config_dword(dev, pos, l | mask);
> +		pci_read_config_dword(dev, pos, &sz);
> +		pci_write_config_dword(dev, pos, l);
> +	}
>  
>  	/*
>  	 * All bits set in sz means the device isn't working properly.
> @@ -236,9 +241,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
>  
>  	if (res->flags & IORESOURCE_MEM_64) {
>  		pci_read_config_dword(dev, pos + 4, &l);
> -		pci_write_config_dword(dev, pos + 4, ~0);
> -		pci_read_config_dword(dev, pos + 4, &sz);
> -		pci_write_config_dword(dev, pos + 4, l);
> +
> +		if (dev->is_virtfn) {
> +			sz = (dev->physfn->sriov->vf_barsz[bar] >> 32) & 0xffffffff;
> +		} else {
> +			pci_write_config_dword(dev, pos + 4, ~0);
> +			pci_read_config_dword(dev, pos + 4, &sz);
> +			pci_write_config_dword(dev, pos + 4, l);
> +		}
>  
>  		l64 |= ((u64)l << 32);
>  		sz64 |= ((u64)sz << 32);
> @@ -327,6 +337,8 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
>  	for (pos = 0; pos < howmany; pos++) {
>  		struct resource *res = &dev->resource[pos];
>  		reg = PCI_BASE_ADDRESS_0 + (pos << 2);
> +		if (dev->is_virtfn && dev->physfn->sriov->vf_barsz[pos] == 0)
> +			continue;
>  		pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
>  	}
>  
> @@ -1444,7 +1456,9 @@ int pci_setup_device(struct pci_dev *dev)
>  	struct pci_bus_region region;
>  	struct resource *res;
>  
> -	if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
> +	if (dev->is_virtfn)
> +		hdr_type = dev->physfn->sriov->vf_hdr_type;
> +	else if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
>  		return -EIO;
>  
>  	dev->sysdata = dev->bus->sysdata;
> @@ -1464,7 +1478,10 @@ int pci_setup_device(struct pci_dev *dev)
>  		     dev->bus->number, PCI_SLOT(dev->devfn),
>  		     PCI_FUNC(dev->devfn));
>  
> -	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
> +	if (dev->is_virtfn)
> +		class = dev->physfn->sriov->vf_class;
> +	else
> +		pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
>  	dev->revision = class & 0xff;
>  	dev->class = class >> 8;		    /* upper 3 bytes */
>  
> @@ -1503,8 +1520,13 @@ int pci_setup_device(struct pci_dev *dev)
>  			goto bad;
>  		pci_read_irq(dev);
>  		pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
> -		pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
> -		pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
> +		if (dev->is_virtfn) {
> +			dev->subsystem_vendor = dev->physfn->sriov->vf_subsystem_vendor;
> +			dev->subsystem_device = dev->physfn->sriov->vf_subsystem_device;
> +		} else {
> +			pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
> +			pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
> +		}
>  
>  		/*
>  		 * Do the ugly legacy mode stuff here rather than broken chip
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] pci: Store more data about VFs into the SRIOV struct
  2018-02-28 21:30 ` Bjorn Helgaas
@ 2018-02-28 21:33   ` Raslan, KarimAllah
  0 siblings, 0 replies; 3+ messages in thread
From: Raslan, KarimAllah @ 2018-02-28 21:33 UTC (permalink / raw)
  To: helgaas; +Cc: linux-kernel, linux-pci, bhelgaas

T24gV2VkLCAyMDE4LTAyLTI4IGF0IDE1OjMwIC0wNjAwLCBCam9ybiBIZWxnYWFzIHdyb3RlOg0K
PiBPbiBXZWQsIEphbiAxNywgMjAxOCBhdCAwNjo0NDoyM1BNICswMTAwLCBLYXJpbUFsbGFoIEFo
bWVkIHdyb3RlOg0KPiA+IA0KPiA+IC4uLiB0byBhdm9pZCByZWFkaW5nIHRoZW0gZnJvbSB0aGUg
Y29uZmlnIHNwYWNlIG9mIGFsbCB0aGUgUENJIFZGcy4gVGhpcyBpcw0KPiA+IHNwZWNpYWxseSBh
IHVzZWZ1bCBvcHRpbWl6YXRpb24gd2hlbiBicmluZ2luZyB1cCB0aG91c2FuZHMgb2YgVkZzLg0K
PiA+IA0KPiA+IENjOiBCam9ybiBIZWxnYWFzIDxiaGVsZ2Fhc0Bnb29nbGUuY29tPg0KPiA+IENj
OiBsaW51eC1wY2lAdmdlci5rZXJuZWwub3JnDQo+ID4gQ2M6IGxpbnV4LWtlcm5lbEB2Z2VyLmtl
cm5lbC5vcmcNCj4gPiBTaWduZWQtb2ZmLWJ5OiBLYXJpbUFsbGFoIEFobWVkIDxrYXJhaG1lZEBh
bWF6b24uZGU+DQo+IA0KPiBXaGF0IGRvZXMgdGhpcyBwYXRjaCBhcHBseSB0bz8gIEl0IGRvZXNu
J3QgYXBwbHkgdG8gdjQuMTYtcmMxIChteQ0KPiAibWFzdGVyIiBicmFuY2gpLiAgSSBkb24ndCBz
ZWUgYW55dGhpbmcgaW4gdGhlIGhpc3Rvcnkgb2YNCj4gZHJpdmVycy9wY2kvaW92LmMgYWJvdXQg
cGNpX2lvdl93cV9mbigpLg0KDQpBaCwgcmlnaHQhIEkgaGFkIGEgZmV3IHBhdGNoZXMgaW4gbXkg
YnJhbmNoIGFuZCBJIGRlY2lkZWQgdG8gb25seSBwb3N0DQp0aGlzIG9uZSBmb3Igbm93LiBUaGUg
cGNpX2lvdl93cV9mbiB3YXMgcGFydCBvZiBvbmUgb2YgdGhlbS4NCg0KV2lsbCBzaHVmZmxlIHRo
ZSBwYXRjaGVzLCByZWJhc2UgYW5kIHJlcG9zdC4NCg0KVGhhbmtzLg0KDQo+IA0KPiA+IA0KPiA+
IC0tLQ0KPiA+ICBkcml2ZXJzL3BjaS9pb3YuYyAgIHwgMjAgKysrKysrKysrKysrKysrKysrLS0N
Cj4gPiAgZHJpdmVycy9wY2kvcGNpLmggICB8ICA2ICsrKysrLQ0KPiA+ICBkcml2ZXJzL3BjaS9w
cm9iZS5jIHwgNDIgKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKystLS0tLS0tLS0tDQo+
ID4gIDMgZmlsZXMgY2hhbmdlZCwgNTUgaW5zZXJ0aW9ucygrKSwgMTMgZGVsZXRpb25zKC0pDQo+
ID4gDQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvcGNpL2lvdi5jIGIvZHJpdmVycy9wY2kvaW92
LmMNCj4gPiBpbmRleCAxNjgzMjhhLi43OGU5NTk1IDEwMDY0NA0KPiA+IC0tLSBhL2RyaXZlcnMv
cGNpL2lvdi5jDQo+ID4gKysrIGIvZHJpdmVycy9wY2kvaW92LmMNCj4gPiBAQCAtMTI5LDcgKzEy
OSw3IEBAIHJlc291cmNlX3NpemVfdCBwY2lfaW92X3Jlc291cmNlX3NpemUoc3RydWN0IHBjaV9k
ZXYgKmRldiwgaW50IHJlc25vKQ0KPiA+ICAJaWYgKCFkZXYtPmlzX3BoeXNmbikNCj4gPiAgCQly
ZXR1cm4gMDsNCj4gPiAgDQo+ID4gLQlyZXR1cm4gZGV2LT5zcmlvdi0+YmFyc3pbcmVzbm8gLSBQ
Q0lfSU9WX1JFU09VUkNFU107DQo+ID4gKwlyZXR1cm4gZGV2LT5zcmlvdi0+dmZfYmFyc3pbcmVz
bm8gLSBQQ0lfSU9WX1JFU09VUkNFU107DQo+ID4gIH0NCj4gPiAgDQo+ID4gIGludCBiYXRjaF9w
Y2lfaW92X2FkZF92aXJ0Zm4oc3RydWN0IHBjaV9kZXYgKmRldiwgc3RydWN0IHBjaV9idXMgKipi
dXMsDQo+ID4gQEAgLTMyNSw2ICszMjUsMjAgQEAgc3RhdGljIHZvaWQgcGNpX2lvdl93cV9mbihz
dHJ1Y3Qgd29ya19zdHJ1Y3QgKndvcmspDQo+ID4gIAlrZnJlZShyZXEpOw0KPiA+ICB9DQo+ID4g
IA0KPiA+ICtzdGF0aWMgdm9pZCBwY2lfcmVhZF92Zl9jb25maWdfY29tbW9uKHN0cnVjdCBwY2lf
YnVzICpidXMsDQo+ID4gKwkJCQkgICAgICBzdHJ1Y3QgcGNpX2RldiAqZGV2KQ0KPiA+ICt7DQo+
ID4gKwlpbnQgZGV2Zm4gPSBwY2lfaW92X3ZpcnRmbl9kZXZmbihkZXYsIDApOw0KPiA+ICsNCj4g
PiArCXBjaV9idXNfcmVhZF9jb25maWdfZHdvcmQoYnVzLCBkZXZmbiwgUENJX0NMQVNTX1JFVklT
SU9OLA0KPiA+ICsJCQkJICAmZGV2LT5zcmlvdi0+dmZfY2xhc3MpOw0KPiA+ICsJcGNpX2J1c19y
ZWFkX2NvbmZpZ193b3JkKGJ1cywgZGV2Zm4sIFBDSV9TVUJTWVNURU1fSUQsDQo+ID4gKwkJCQkg
JmRldi0+c3Jpb3YtPnZmX3N1YnN5c3RlbV9kZXZpY2UpOw0KPiA+ICsJcGNpX2J1c19yZWFkX2Nv
bmZpZ193b3JkKGJ1cywgZGV2Zm4sIFBDSV9TVUJTWVNURU1fVkVORE9SX0lELA0KPiA+ICsJCQkJ
ICZkZXYtPnNyaW92LT52Zl9zdWJzeXN0ZW1fdmVuZG9yKTsNCj4gPiArCXBjaV9idXNfcmVhZF9j
b25maWdfYnl0ZShidXMsIGRldmZuLCBQQ0lfSEVBREVSX1RZUEUsICZkZXYtPnNyaW92LT52Zl9o
ZHJfdHlwZSk7DQo+ID4gK30NCj4gPiArDQo+ID4gIHN0YXRpYyBzdHJ1Y3Qgd29ya3F1ZXVlX3N0
cnVjdCAqcGNpX2lvdl93cTsNCj4gPiAgDQo+ID4gIHN0YXRpYyBpbnQgX19pbml0IGluaXRfcGNp
X2lvdl93cSh2b2lkKQ0KPiA+IEBAIC0zNjEsNiArMzc1LDggQEAgc3RhdGljIGludCBlbmFibGVf
dmZzKHN0cnVjdCBwY2lfZGV2ICpkZXYsIGludCBucl92ZnMpDQo+ID4gIAkJCWdvdG8gYWRkX2J1
c19mYWlsOw0KPiA+ICAJfQ0KPiA+ICANCj4gPiArCXBjaV9yZWFkX3ZmX2NvbmZpZ19jb21tb24o
YnVzWzBdLCBkZXYpOw0KPiA+ICsNCj4gPiAgCXdoaWxlIChyZW1haW5pbmdfdmZzID4gMCkgew0K
PiA+ICAJCWJvb2wgcmV0Ow0KPiA+ICAJCXN0cnVjdCBwY2lfaW92X3dxX2l0ZW0gKnJlcTsNCj4g
PiBAQCAtNjE3LDcgKzYzMyw3IEBAIHN0YXRpYyBpbnQgc3Jpb3ZfaW5pdChzdHJ1Y3QgcGNpX2Rl
diAqZGV2LCBpbnQgcG9zKQ0KPiA+ICAJCQlyYyA9IC1FSU87DQo+ID4gIAkJCWdvdG8gZmFpbGVk
Ow0KPiA+ICAJCX0NCj4gPiAtCQlpb3YtPmJhcnN6W2ldID0gcmVzb3VyY2Vfc2l6ZShyZXMpOw0K
PiA+ICsJCWlvdi0+dmZfYmFyc3pbaV0gPSByZXNvdXJjZV9zaXplKHJlcyk7DQo+ID4gIAkJcmVz
LT5lbmQgPSByZXMtPnN0YXJ0ICsgcmVzb3VyY2Vfc2l6ZShyZXMpICogdG90YWwgLSAxOw0KPiA+
ICAJCWRldl9pbmZvKCZkZXYtPmRldiwgIlZGKG4pIEJBUiVkIHNwYWNlOiAlcFIgKGNvbnRhaW5z
IEJBUiVkIGZvciAlZCBWRnMpXG4iLA0KPiA+ICAJCQkgaSwgcmVzLCBpLCB0b3RhbCk7DQo+ID4g
ZGlmZiAtLWdpdCBhL2RyaXZlcnMvcGNpL3BjaS5oIGIvZHJpdmVycy9wY2kvcGNpLmgNCj4gPiBp
bmRleCBmNmI1OGIzLi4zMjY0YzllIDEwMDY0NA0KPiA+IC0tLSBhL2RyaXZlcnMvcGNpL3BjaS5o
DQo+ID4gKysrIGIvZHJpdmVycy9wY2kvcGNpLmgNCj4gPiBAQCAtMjcxLDcgKzI3MSwxMSBAQCBz
dHJ1Y3QgcGNpX3NyaW92IHsNCj4gPiAgCXUxNiBkcml2ZXJfbWF4X1ZGczsJLyogbWF4IG51bSBW
RnMgZHJpdmVyIHN1cHBvcnRzICovDQo+ID4gIAlzdHJ1Y3QgcGNpX2RldiAqZGV2OwkvKiBsb3dl
c3QgbnVtYmVyZWQgUEYgKi8NCj4gPiAgCXN0cnVjdCBwY2lfZGV2ICpzZWxmOwkvKiB0aGlzIFBG
ICovDQo+ID4gLQlyZXNvdXJjZV9zaXplX3QgYmFyc3pbUENJX1NSSU9WX05VTV9CQVJTXTsJLyog
VkYgQkFSIHNpemUgKi8NCj4gPiArCXU4IHZmX2hkcl90eXBlOwkJLyogVkYgaGVhZGVyIHR5cGUg
Ki8NCj4gPiArCXUzMiB2Zl9jbGFzczsJCS8qIFZGIGRldmljZSAqLw0KPiA+ICsJdTE2IHZmX3N1
YnN5c3RlbV92ZW5kb3I7CS8qIFZGIHN1YnN5c3RlbSB2ZW5kb3IgKi8NCj4gPiArCXUxNiB2Zl9z
dWJzeXN0ZW1fZGV2aWNlOwkvKiBWRiBzdWJzeXN0ZW0gZGV2aWNlICovDQo+ID4gKwlyZXNvdXJj
ZV9zaXplX3QgdmZfYmFyc3pbUENJX1NSSU9WX05VTV9CQVJTXTsJLyogVkYgQkFSIHNpemUgKi8N
Cj4gPiAgCWJvb2wgZHJpdmVyc19hdXRvcHJvYmU7CS8qIGF1dG8gcHJvYmluZyBvZiBWRnMgYnkg
ZHJpdmVyICovDQo+ID4gIH07DQo+ID4gIA0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9w
cm9iZS5jIGIvZHJpdmVycy9wY2kvcHJvYmUuYw0KPiA+IGluZGV4IDE0ZTBlYTEuLjY1MDk5ZDAg
MTAwNjQ0DQo+ID4gLS0tIGEvZHJpdmVycy9wY2kvcHJvYmUuYw0KPiA+ICsrKyBiL2RyaXZlcnMv
cGNpL3Byb2JlLmMNCj4gPiBAQCAtMTc1LDYgKzE3NSw3IEBAIHN0YXRpYyBpbmxpbmUgdW5zaWdu
ZWQgbG9uZyBkZWNvZGVfYmFyKHN0cnVjdCBwY2lfZGV2ICpkZXYsIHUzMiBiYXIpDQo+ID4gIGlu
dCBfX3BjaV9yZWFkX2Jhc2Uoc3RydWN0IHBjaV9kZXYgKmRldiwgZW51bSBwY2lfYmFyX3R5cGUg
dHlwZSwNCj4gPiAgCQkgICAgc3RydWN0IHJlc291cmNlICpyZXMsIHVuc2lnbmVkIGludCBwb3Mp
DQo+ID4gIHsNCj4gPiArCWludCBiYXIgPSByZXMgLSBkZXYtPnJlc291cmNlOw0KPiA+ICAJdTMy
IGwgPSAwLCBzeiA9IDAsIG1hc2s7DQo+ID4gIAl1NjQgbDY0LCBzejY0LCBtYXNrNjQ7DQo+ID4g
IAl1MTYgb3JpZ19jbWQ7DQo+ID4gQEAgLTE5NCw5ICsxOTUsMTMgQEAgaW50IF9fcGNpX3JlYWRf
YmFzZShzdHJ1Y3QgcGNpX2RldiAqZGV2LCBlbnVtIHBjaV9iYXJfdHlwZSB0eXBlLA0KPiA+ICAJ
cmVzLT5uYW1lID0gcGNpX25hbWUoZGV2KTsNCj4gPiAgDQo+ID4gIAlwY2lfcmVhZF9jb25maWdf
ZHdvcmQoZGV2LCBwb3MsICZsKTsNCj4gPiAtCXBjaV93cml0ZV9jb25maWdfZHdvcmQoZGV2LCBw
b3MsIGwgfCBtYXNrKTsNCj4gPiAtCXBjaV9yZWFkX2NvbmZpZ19kd29yZChkZXYsIHBvcywgJnN6
KTsNCj4gPiAtCXBjaV93cml0ZV9jb25maWdfZHdvcmQoZGV2LCBwb3MsIGwpOw0KPiA+ICsJaWYg
KGRldi0+aXNfdmlydGZuKSB7DQo+ID4gKwkJc3ogPSBkZXYtPnBoeXNmbi0+c3Jpb3YtPnZmX2Jh
cnN6W2Jhcl0gJiAweGZmZmZmZmZmOw0KPiA+ICsJfSBlbHNlIHsNCj4gPiArCQlwY2lfd3JpdGVf
Y29uZmlnX2R3b3JkKGRldiwgcG9zLCBsIHwgbWFzayk7DQo+ID4gKwkJcGNpX3JlYWRfY29uZmln
X2R3b3JkKGRldiwgcG9zLCAmc3opOw0KPiA+ICsJCXBjaV93cml0ZV9jb25maWdfZHdvcmQoZGV2
LCBwb3MsIGwpOw0KPiA+ICsJfQ0KPiA+ICANCj4gPiAgCS8qDQo+ID4gIAkgKiBBbGwgYml0cyBz
ZXQgaW4gc3ogbWVhbnMgdGhlIGRldmljZSBpc24ndCB3b3JraW5nIHByb3Blcmx5Lg0KPiA+IEBA
IC0yMzYsOSArMjQxLDE0IEBAIGludCBfX3BjaV9yZWFkX2Jhc2Uoc3RydWN0IHBjaV9kZXYgKmRl
diwgZW51bSBwY2lfYmFyX3R5cGUgdHlwZSwNCj4gPiAgDQo+ID4gIAlpZiAocmVzLT5mbGFncyAm
IElPUkVTT1VSQ0VfTUVNXzY0KSB7DQo+ID4gIAkJcGNpX3JlYWRfY29uZmlnX2R3b3JkKGRldiwg
cG9zICsgNCwgJmwpOw0KPiA+IC0JCXBjaV93cml0ZV9jb25maWdfZHdvcmQoZGV2LCBwb3MgKyA0
LCB+MCk7DQo+ID4gLQkJcGNpX3JlYWRfY29uZmlnX2R3b3JkKGRldiwgcG9zICsgNCwgJnN6KTsN
Cj4gPiAtCQlwY2lfd3JpdGVfY29uZmlnX2R3b3JkKGRldiwgcG9zICsgNCwgbCk7DQo+ID4gKw0K
PiA+ICsJCWlmIChkZXYtPmlzX3ZpcnRmbikgew0KPiA+ICsJCQlzeiA9IChkZXYtPnBoeXNmbi0+
c3Jpb3YtPnZmX2JhcnN6W2Jhcl0gPj4gMzIpICYgMHhmZmZmZmZmZjsNCj4gPiArCQl9IGVsc2Ug
ew0KPiA+ICsJCQlwY2lfd3JpdGVfY29uZmlnX2R3b3JkKGRldiwgcG9zICsgNCwgfjApOw0KPiA+
ICsJCQlwY2lfcmVhZF9jb25maWdfZHdvcmQoZGV2LCBwb3MgKyA0LCAmc3opOw0KPiA+ICsJCQlw
Y2lfd3JpdGVfY29uZmlnX2R3b3JkKGRldiwgcG9zICsgNCwgbCk7DQo+ID4gKwkJfQ0KPiA+ICAN
Cj4gPiAgCQlsNjQgfD0gKCh1NjQpbCA8PCAzMik7DQo+ID4gIAkJc3o2NCB8PSAoKHU2NClzeiA8
PCAzMik7DQo+ID4gQEAgLTMyNyw2ICszMzcsOCBAQCBzdGF0aWMgdm9pZCBwY2lfcmVhZF9iYXNl
cyhzdHJ1Y3QgcGNpX2RldiAqZGV2LCB1bnNpZ25lZCBpbnQgaG93bWFueSwgaW50IHJvbSkNCj4g
PiAgCWZvciAocG9zID0gMDsgcG9zIDwgaG93bWFueTsgcG9zKyspIHsNCj4gPiAgCQlzdHJ1Y3Qg
cmVzb3VyY2UgKnJlcyA9ICZkZXYtPnJlc291cmNlW3Bvc107DQo+ID4gIAkJcmVnID0gUENJX0JB
U0VfQUREUkVTU18wICsgKHBvcyA8PCAyKTsNCj4gPiArCQlpZiAoZGV2LT5pc192aXJ0Zm4gJiYg
ZGV2LT5waHlzZm4tPnNyaW92LT52Zl9iYXJzeltwb3NdID09IDApDQo+ID4gKwkJCWNvbnRpbnVl
Ow0KPiA+ICAJCXBvcyArPSBfX3BjaV9yZWFkX2Jhc2UoZGV2LCBwY2lfYmFyX3Vua25vd24sIHJl
cywgcmVnKTsNCj4gPiAgCX0NCj4gPiAgDQo+ID4gQEAgLTE0NDQsNyArMTQ1Niw5IEBAIGludCBw
Y2lfc2V0dXBfZGV2aWNlKHN0cnVjdCBwY2lfZGV2ICpkZXYpDQo+ID4gIAlzdHJ1Y3QgcGNpX2J1
c19yZWdpb24gcmVnaW9uOw0KPiA+ICAJc3RydWN0IHJlc291cmNlICpyZXM7DQo+ID4gIA0KPiA+
IC0JaWYgKHBjaV9yZWFkX2NvbmZpZ19ieXRlKGRldiwgUENJX0hFQURFUl9UWVBFLCAmaGRyX3R5
cGUpKQ0KPiA+ICsJaWYgKGRldi0+aXNfdmlydGZuKQ0KPiA+ICsJCWhkcl90eXBlID0gZGV2LT5w
aHlzZm4tPnNyaW92LT52Zl9oZHJfdHlwZTsNCj4gPiArCWVsc2UgaWYgKHBjaV9yZWFkX2NvbmZp
Z19ieXRlKGRldiwgUENJX0hFQURFUl9UWVBFLCAmaGRyX3R5cGUpKQ0KPiA+ICAJCXJldHVybiAt
RUlPOw0KPiA+ICANCj4gPiAgCWRldi0+c3lzZGF0YSA9IGRldi0+YnVzLT5zeXNkYXRhOw0KPiA+
IEBAIC0xNDY0LDcgKzE0NzgsMTAgQEAgaW50IHBjaV9zZXR1cF9kZXZpY2Uoc3RydWN0IHBjaV9k
ZXYgKmRldikNCj4gPiAgCQkgICAgIGRldi0+YnVzLT5udW1iZXIsIFBDSV9TTE9UKGRldi0+ZGV2
Zm4pLA0KPiA+ICAJCSAgICAgUENJX0ZVTkMoZGV2LT5kZXZmbikpOw0KPiA+ICANCj4gPiAtCXBj
aV9yZWFkX2NvbmZpZ19kd29yZChkZXYsIFBDSV9DTEFTU19SRVZJU0lPTiwgJmNsYXNzKTsNCj4g
PiArCWlmIChkZXYtPmlzX3ZpcnRmbikNCj4gPiArCQljbGFzcyA9IGRldi0+cGh5c2ZuLT5zcmlv
di0+dmZfY2xhc3M7DQo+ID4gKwllbHNlDQo+ID4gKwkJcGNpX3JlYWRfY29uZmlnX2R3b3JkKGRl
diwgUENJX0NMQVNTX1JFVklTSU9OLCAmY2xhc3MpOw0KPiA+ICAJZGV2LT5yZXZpc2lvbiA9IGNs
YXNzICYgMHhmZjsNCj4gPiAgCWRldi0+Y2xhc3MgPSBjbGFzcyA+PiA4OwkJICAgIC8qIHVwcGVy
IDMgYnl0ZXMgKi8NCj4gPiAgDQo+ID4gQEAgLTE1MDMsOCArMTUyMCwxMyBAQCBpbnQgcGNpX3Nl
dHVwX2RldmljZShzdHJ1Y3QgcGNpX2RldiAqZGV2KQ0KPiA+ICAJCQlnb3RvIGJhZDsNCj4gPiAg
CQlwY2lfcmVhZF9pcnEoZGV2KTsNCj4gPiAgCQlwY2lfcmVhZF9iYXNlcyhkZXYsIDYsIFBDSV9S
T01fQUREUkVTUyk7DQo+ID4gLQkJcGNpX3JlYWRfY29uZmlnX3dvcmQoZGV2LCBQQ0lfU1VCU1lT
VEVNX1ZFTkRPUl9JRCwgJmRldi0+c3Vic3lzdGVtX3ZlbmRvcik7DQo+ID4gLQkJcGNpX3JlYWRf
Y29uZmlnX3dvcmQoZGV2LCBQQ0lfU1VCU1lTVEVNX0lELCAmZGV2LT5zdWJzeXN0ZW1fZGV2aWNl
KTsNCj4gPiArCQlpZiAoZGV2LT5pc192aXJ0Zm4pIHsNCj4gPiArCQkJZGV2LT5zdWJzeXN0ZW1f
dmVuZG9yID0gZGV2LT5waHlzZm4tPnNyaW92LT52Zl9zdWJzeXN0ZW1fdmVuZG9yOw0KPiA+ICsJ
CQlkZXYtPnN1YnN5c3RlbV9kZXZpY2UgPSBkZXYtPnBoeXNmbi0+c3Jpb3YtPnZmX3N1YnN5c3Rl
bV9kZXZpY2U7DQo+ID4gKwkJfSBlbHNlIHsNCj4gPiArCQkJcGNpX3JlYWRfY29uZmlnX3dvcmQo
ZGV2LCBQQ0lfU1VCU1lTVEVNX1ZFTkRPUl9JRCwgJmRldi0+c3Vic3lzdGVtX3ZlbmRvcik7DQo+
ID4gKwkJCXBjaV9yZWFkX2NvbmZpZ193b3JkKGRldiwgUENJX1NVQlNZU1RFTV9JRCwgJmRldi0+
c3Vic3lzdGVtX2RldmljZSk7DQo+ID4gKwkJfQ0KPiA+ICANCj4gPiAgCQkvKg0KPiA+ICAJCSAq
IERvIHRoZSB1Z2x5IGxlZ2FjeSBtb2RlIHN0dWZmIGhlcmUgcmF0aGVyIHRoYW4gYnJva2VuIGNo
aXANCj4gPiAtLSANCj4gPiAyLjcuNA0KPiA+IA0KPiAKQW1hem9uIERldmVsb3BtZW50IENlbnRl
ciBHZXJtYW55IEdtYkgKQmVybGluIC0gRHJlc2RlbiAtIEFhY2hlbgptYWluIG9mZmljZTogS3Jh
dXNlbnN0ci4gMzgsIDEwMTE3IEJlcmxpbgpHZXNjaGFlZnRzZnVlaHJlcjogRHIuIFJhbGYgSGVy
YnJpY2gsIENocmlzdGlhbiBTY2hsYWVnZXIKVXN0LUlEOiBERTI4OTIzNzg3OQpFaW5nZXRyYWdl
biBhbSBBbXRzZ2VyaWNodCBDaGFybG90dGVuYnVyZyBIUkIgMTQ5MTczIEIK

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-02-28 21:33 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-17 17:44 [PATCH] pci: Store more data about VFs into the SRIOV struct KarimAllah Ahmed
2018-02-28 21:30 ` Bjorn Helgaas
2018-02-28 21:33   ` Raslan, KarimAllah

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).