From: Yicong Yang <yangyicong@hisilicon.com>
To: <helgaas@kernel.org>, <linux-pci@vger.kernel.org>
Cc: <f.fangjian@huawei.com>, <huangdaode@huawei.com>
Subject: [PATCH v4 04/10] PCI: Add comments for link speed info arrays
Date: Mon, 17 Feb 2020 19:12:58 +0800 [thread overview]
Message-ID: <1581937984-40353-5-git-send-email-yangyicong@hisilicon.com> (raw)
In-Reply-To: <1581937984-40353-1-git-send-email-yangyicong@hisilicon.com>
Add comments for pcix_bus_speed[] and pcie_link_speed[] arrays.
Indicating the capabilities which the information from.
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
drivers/pci/probe.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 6ce47d8..b97f969 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -640,6 +640,10 @@ void pci_free_host_bridge(struct pci_host_bridge *bridge)
}
EXPORT_SYMBOL(pci_free_host_bridge);
+/*
+ * these indices represent secondary bus mode and
+ * frequency from PCI_X_SSTATUS_FREQ
+ */
static const unsigned char pcix_bus_speed[] = {
PCI_SPEED_UNKNOWN, /* 0 */
PCI_SPEED_66MHz_PCIX, /* 1 */
@@ -659,6 +663,10 @@ static const unsigned char pcix_bus_speed[] = {
PCI_SPEED_133MHz_PCIX_533 /* F */
};
+/*
+ * these indices represent PCIe link speed from
+ * PCI_EXP_LNKCAP, PCI_EXP_LNKSTA, PCI_EXP_LNKCAP2
+ */
const unsigned char pcie_link_speed[] = {
PCI_SPEED_UNKNOWN, /* 0 */
PCIE_SPEED_2_5GT, /* 1 */
--
2.8.1
next prev parent reply other threads:[~2020-02-17 11:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-17 11:12 [PATCH v4 00/10] Improve link speed presentation process Yicong Yang
2020-02-17 11:12 ` [PATCH v4 01/10] PCI: add 32 GT/s decoding in some macros Yicong Yang
2020-02-17 11:12 ` [PATCH v4 02/10] PCI: Make pci_bus_speed_strings[] public Yicong Yang
2020-02-17 11:12 ` [PATCH v4 03/10] PCI: Remove PCIe suffix in pci_bus_speed_strings[] Yicong Yang
2020-02-17 11:12 ` Yicong Yang [this message]
2020-02-17 11:12 ` [PATCH v4 05/10] PCI: brcmstb: Use pcie_link_speed[] to decode link speed Yicong Yang
2020-02-17 11:13 ` [PATCH v4 06/10] PCI: Refactor and rename PCIE_SPEED2STR macro Yicong Yang
2020-02-17 11:13 ` [PATCH v4 07/10] PCI: Refactor bus_speed_read() with PCI_SPEED2STR macro Yicong Yang
2020-02-17 11:13 ` [PATCH v4 08/10] PCI: Add PCIe suffix when display PCIe slot bus speed Yicong Yang
2020-02-17 11:13 ` [PATCH v4 09/10] PCI: Add PCIE_LNKCAP2_SLS2SPEED macro Yicong Yang
2020-02-17 11:13 ` [PATCH v4 10/10] PCI: Reduce redundancy in current_link_speed_show() Yicong Yang
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