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* [PATCH 1/2] PCI: Add Loongson vendor ID
@ 2020-03-10 12:50 Tiezhu Yang
  2020-03-10 12:50 ` [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller Tiezhu Yang
  0 siblings, 1 reply; 3+ messages in thread
From: Tiezhu Yang @ 2020-03-10 12:50 UTC (permalink / raw)
  To: Bjorn Helgaas, Jens Axboe
  Cc: linux-pci, linux-ide, linux-kernel, Jiaxun Yang, Xuefeng Li

Add the Loongson vendor ID to pci_ids.h to be used by the controller
driver in the future.

The Loongson vendor ID can be found at the following link:
https://git.kernel.org/pub/scm/utils/pciutils/pciutils.git/tree/pci.ids

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 include/linux/pci_ids.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 352c0d7..977e668 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -148,6 +148,8 @@
 
 /* Vendors and devices.  Sort key: vendor first, device next. */
 
+#define PCI_VENDOR_ID_LOONGSON		0x0014
+
 #define PCI_VENDOR_ID_TTTECH		0x0357
 #define PCI_DEVICE_ID_TTTECH_MC322	0x000a
 
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller
  2020-03-10 12:50 [PATCH 1/2] PCI: Add Loongson vendor ID Tiezhu Yang
@ 2020-03-10 12:50 ` Tiezhu Yang
  2020-03-12 13:44   ` Jens Axboe
  0 siblings, 1 reply; 3+ messages in thread
From: Tiezhu Yang @ 2020-03-10 12:50 UTC (permalink / raw)
  To: Bjorn Helgaas, Jens Axboe
  Cc: linux-pci, linux-ide, linux-kernel, Jiaxun Yang, Xuefeng Li

Loongson 7A1000 SATA controller uses BAR0 as the base address register.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 drivers/ata/ahci.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 11ea1af..33d051a 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -40,6 +40,7 @@
 enum {
 	AHCI_PCI_BAR_STA2X11	= 0,
 	AHCI_PCI_BAR_CAVIUM	= 0,
+	AHCI_PCI_BAR_LOONGSON	= 0,
 	AHCI_PCI_BAR_ENMOTUS	= 2,
 	AHCI_PCI_BAR_CAVIUM_GEN5	= 4,
 	AHCI_PCI_BAR_STANDARD	= 5,
@@ -589,6 +590,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
 	/* Enmotus */
 	{ PCI_DEVICE(0x1c44, 0x8000), board_ahci },
 
+	/* Loongson */
+	{ PCI_VDEVICE(LOONGSON, 0x7a08), board_ahci },
+
 	/* Generic, PCI class code for AHCI */
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
 	  PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
@@ -1680,6 +1684,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM;
 		if (pdev->device == 0xa084)
 			ahci_pci_bar = AHCI_PCI_BAR_CAVIUM_GEN5;
+	} else if (pdev->vendor == PCI_VENDOR_ID_LOONGSON) {
+		if (pdev->device == 0x7a08)
+			ahci_pci_bar = AHCI_PCI_BAR_LOONGSON;
 	}
 
 	/* acquire resources */
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller
  2020-03-10 12:50 ` [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller Tiezhu Yang
@ 2020-03-12 13:44   ` Jens Axboe
  0 siblings, 0 replies; 3+ messages in thread
From: Jens Axboe @ 2020-03-12 13:44 UTC (permalink / raw)
  To: Tiezhu Yang, Bjorn Helgaas
  Cc: linux-pci, linux-ide, linux-kernel, Jiaxun Yang, Xuefeng Li

On 3/10/20 6:50 AM, Tiezhu Yang wrote:
> Loongson 7A1000 SATA controller uses BAR0 as the base address register.

Applied with the pci vendor addition for 5.7, thanks.

-- 
Jens Axboe


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-03-12 13:44 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-03-10 12:50 [PATCH 1/2] PCI: Add Loongson vendor ID Tiezhu Yang
2020-03-10 12:50 ` [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller Tiezhu Yang
2020-03-12 13:44   ` Jens Axboe

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