* [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU [not found] <CGME20201218153422epcas5p42f09cbf8e40b3d68e3c037256e54d97c@epcas5p4.samsung.com> @ 2020-12-18 15:34 ` Shradha Todi 2020-12-23 20:38 ` Bjorn Helgaas 0 siblings, 1 reply; 3+ messages in thread From: Shradha Todi @ 2020-12-18 15:34 UTC (permalink / raw) To: linux-kernel, linux-pci Cc: jingoohan1, gustavo.pimentel, lorenzo.pieralisi, robh, bhelgaas, pankaj.dubey, Shradha Todi Since outbound iATU permits size to be greater than 4GB for which the support is also available, allow EP function to send u64 size instead of truncating to u32. Signed-off-by: Shradha Todi <shradha.t@samsung.com> --- drivers/pci/controller/dwc/pcie-designware.c | 2 +- drivers/pci/controller/dwc/pcie-designware.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 7eba3b2..6298212 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size) + u64 size) { __dw_pcie_prog_outbound_atu(pci, func_no, index, type, cpu_addr, pci_addr, size); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 28b72fb..bb33f28 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, u64 size); void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size); + u64 size); int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, int bar, u64 cpu_addr, enum dw_pcie_as_type as_type); -- 2.7.4 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU 2020-12-18 15:34 ` [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU Shradha Todi @ 2020-12-23 20:38 ` Bjorn Helgaas 2020-12-24 5:53 ` Shradha Todi 0 siblings, 1 reply; 3+ messages in thread From: Bjorn Helgaas @ 2020-12-23 20:38 UTC (permalink / raw) To: Shradha Todi Cc: linux-kernel, linux-pci, jingoohan1, gustavo.pimentel, lorenzo.pieralisi, robh, bhelgaas, pankaj.dubey On Fri, Dec 18, 2020 at 09:04:08PM +0530, Shradha Todi wrote: > Since outbound iATU permits size to be greater than > 4GB for which the support is also available, allow > EP function to send u64 size instead of truncating > to u32. Please wrap your commit messages so they use more of an 80-column window. I use "set textwidth=75" for vim to account for git log indenting by 4 characters. I know 80 isn't a magic width, but it's the convention in drivers/pci. This also affects other patches from you, e.g., "PCI: dwc: Add upper limit address for outbound iATU". > Signed-off-by: Shradha Todi <shradha.t@samsung.com> > --- > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 7eba3b2..6298212 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size) > + u64 size) > { > __dw_pcie_prog_outbound_atu(pci, func_no, index, type, > cpu_addr, pci_addr, size); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 28b72fb..bb33f28 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, > u64 size); > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size); > + u64 size); > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int bar, u64 cpu_addr, > enum dw_pcie_as_type as_type); > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU 2020-12-23 20:38 ` Bjorn Helgaas @ 2020-12-24 5:53 ` Shradha Todi 0 siblings, 0 replies; 3+ messages in thread From: Shradha Todi @ 2020-12-24 5:53 UTC (permalink / raw) To: 'Bjorn Helgaas' Cc: linux-kernel, linux-pci, jingoohan1, gustavo.pimentel, lorenzo.pieralisi, robh, bhelgaas, pankaj.dubey > From: Bjorn Helgaas <helgaas@kernel.org> > Subject: Re: [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU > > On Fri, Dec 18, 2020 at 09:04:08PM +0530, Shradha Todi wrote: > > Since outbound iATU permits size to be greater than 4GB for which the > > support is also available, allow EP function to send u64 size instead > > of truncating to u32. > > Please wrap your commit messages so they use more of an 80-column window. > I use "set textwidth=75" for vim to account for git log indenting by 4 characters. > > I know 80 isn't a magic width, but it's the convention in drivers/pci. > > This also affects other patches from you, e.g., "PCI: dwc: Add upper limit > address for outbound iATU". > Thanks for the review and suggestion. I will take care of this for all my patches in next version. > > Signed-off-by: Shradha Todi <shradha.t@samsung.com> > > --- > > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > > b/drivers/pci/controller/dwc/pcie-designware.c > > index 7eba3b2..6298212 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > @@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie > > *pci, int index, int type, > > > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > > int type, u64 cpu_addr, u64 pci_addr, > > - u32 size) > > + u64 size) > > { > > __dw_pcie_prog_outbound_atu(pci, func_no, index, type, > > cpu_addr, pci_addr, size); > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > > b/drivers/pci/controller/dwc/pcie-designware.h > > index 28b72fb..bb33f28 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > @@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > int index, > > u64 size); > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > > int type, u64 cpu_addr, u64 pci_addr, > > - u32 size); > > + u64 size); > > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, > > int bar, u64 cpu_addr, > > enum dw_pcie_as_type as_type); > > -- > > 2.7.4 > > ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-12-24 6:04 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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[not found] <CGME20201218153422epcas5p42f09cbf8e40b3d68e3c037256e54d97c@epcas5p4.samsung.com>
2020-12-18 15:34 ` [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU Shradha Todi
2020-12-23 20:38 ` Bjorn Helgaas
2020-12-24 5:53 ` Shradha Todi
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