From: Niklas Cassel <niklas.cassel@axis.com>
To: Niklas Cassel <niklass@axis.com>,
Jesper Nilsson <jespern@axis.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-arm-kernel@axis.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 10/18] PCI: dwc: artpec6: Remove unused defines
Date: Mon, 20 Nov 2017 14:32:13 +0100 [thread overview]
Message-ID: <20171120133222.27771-11-niklas.cassel@axis.com> (raw)
In-Reply-To: <20171120133222.27771-1-niklas.cassel@axis.com>
Commit b015b37e6693 ("PCI: artpec6: Stop enabling writes to
DBI read-only registers") removed the only write using these
defines, but it did not remove the defines.
Remove the defines since they are now unused.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
drivers/pci/dwc/pcie-artpec6.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pci/dwc/pcie-artpec6.c b/drivers/pci/dwc/pcie-artpec6.c
index 6653619db6a1..4b8ef266dc2f 100644
--- a/drivers/pci/dwc/pcie-artpec6.c
+++ b/drivers/pci/dwc/pcie-artpec6.c
@@ -37,9 +37,6 @@ struct artpec6_pcie {
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
-#define MISC_CONTROL_1_OFF (PL_OFFSET + 0x1bc)
-#define DBI_RO_WR_EN 1
-
/* ARTPEC-6 specific registers */
#define PCIECFG 0x18
#define PCIECFG_DBG_OEN (1 << 24)
--
2.14.2
next prev parent reply other threads:[~2017-11-20 13:33 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-20 13:32 [PATCH v5 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 01/18] PCI: dwc: Use the DMA-API to get the MSI address Niklas Cassel
2017-11-30 15:28 ` Lorenzo Pieralisi
2017-12-13 13:59 ` Niklas Cassel
2017-12-13 14:31 ` Lorenzo Pieralisi
2017-12-13 17:21 ` Joao Pinto
2017-12-14 12:16 ` Gustavo Pimentel
2017-12-14 12:22 ` Lorenzo Pieralisi
2017-12-14 12:38 ` Gustavo Pimentel
2017-12-18 15:57 ` Lorenzo Pieralisi
2017-12-18 16:11 ` Gustavo Pimentel
[not found] ` <95866c7e-5177-69d6-ac64-1ba7f8b3e36d@synopsys.com>
2017-12-19 14:10 ` Lorenzo Pieralisi
2017-12-19 23:55 ` Niklas Cassel
2017-12-19 10:19 ` Lorenzo Pieralisi
2017-12-19 22:13 ` Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 06/18] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code Niklas Cassel
2017-11-20 13:32 ` Niklas Cassel [this message]
2017-11-20 13:32 ` [PATCH v5 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 13/18] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 14/18] PCI: dwc: artpec6: " Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-12-18 18:10 ` Lorenzo Pieralisi
2017-12-18 21:15 ` Niklas Cassel
2017-12-19 10:48 ` Lorenzo Pieralisi
2017-11-20 13:32 ` [PATCH v5 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-11-20 13:32 ` [PATCH v5 18/18] PCI: dwc: artpec6: " Niklas Cassel
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