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* [PATCH] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity
@ 2017-11-29  0:53 Stephen Boyd
  2017-11-29 23:48 ` Jingoo Han
  2017-12-11 10:19 ` Lorenzo Pieralisi
  0 siblings, 2 replies; 4+ messages in thread
From: Stephen Boyd @ 2017-11-29  0:53 UTC (permalink / raw)
  To: Jingoo Han, Joao Pinto; +Cc: linux-kernel, Bjorn Helgaas, linux-pci

We have macros for getting the upper or lower 32 bits of a
number. Use them here to shave a couple lines off the code.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 drivers/pci/dwc/pcie-designware-host.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 157621175147..ae5abfddf8de 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp)
 	msi_target = virt_to_phys((void *)pp->msi_data);
 
 	/* program the msi_data */
-	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
-			    (u32)(msi_target & 0xffffffff));
-	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
-			    (u32)(msi_target >> 32 & 0xffffffff));
+	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target));
+	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target));
 }
 
 static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-12-19 20:16 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-11-29  0:53 [PATCH] PCI: dwc: Use {upper,lower}_32_bits() macros for clarity Stephen Boyd
2017-11-29 23:48 ` Jingoo Han
2017-12-11 10:19 ` Lorenzo Pieralisi
2017-12-19 20:16   ` Stephen Boyd

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