From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-pci@vger.kernel.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Chris Healy <cphealy@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>,
Leonard Crestez <leonard.crestez@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 13/21] PCI: imx6: Simplify bit operations in PHY functions
Date: Thu, 20 Dec 2018 23:27:08 -0800 [thread overview]
Message-ID: <20181221072716.29017-14-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20181221072716.29017-1-andrew.smirnov@gmail.com>
Simplify the code by incorporating left shifts into constant
defnitions as well as using FIELD_PREP/GENMASK. No functional change
intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2737526158fa..40d348bb9a2b 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -84,11 +84,11 @@ struct imx6_pcie {
#define PL_OFFSET 0x700
#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
-#define PCIE_PHY_CTRL_DATA_LOC 0
-#define PCIE_PHY_CTRL_CAP_ADR_LOC 16
-#define PCIE_PHY_CTRL_CAP_DAT_LOC 17
-#define PCIE_PHY_CTRL_WR_LOC 18
-#define PCIE_PHY_CTRL_RD_LOC 19
+#define PCIE_PHY_CTRL_DATA(x) FIELD_PREP(GENMASK(15, 0), (x))
+#define PCIE_PHY_CTRL_CAP_ADR BIT(16)
+#define PCIE_PHY_CTRL_CAP_DAT BIT(17)
+#define PCIE_PHY_CTRL_WR BIT(18)
+#define PCIE_PHY_CTRL_RD BIT(19)
#define PCIE_PHY_STAT (PL_OFFSET + 0x110)
#define PCIE_PHY_STAT_ACK_LOC 16
@@ -135,17 +135,17 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
u32 val;
int ret;
- val = addr << PCIE_PHY_CTRL_DATA_LOC;
+ val = PCIE_PHY_CTRL_DATA(addr);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
- val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC);
+ val |= PCIE_PHY_CTRL_CAP_ADR;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
if (ret)
return ret;
- val = addr << PCIE_PHY_CTRL_DATA_LOC;
+ val = PCIE_PHY_CTRL_DATA(addr);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
return pcie_phy_poll_ack(imx6_pcie, 0);
@@ -163,7 +163,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
return ret;
/* assert Read signal */
- phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC;
+ phy_ctl = PCIE_PHY_CTRL_RD;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -191,11 +191,11 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
if (ret)
return ret;
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* capture data */
- var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC);
+ var |= PCIE_PHY_CTRL_CAP_DAT;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -203,7 +203,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* deassert cap data */
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack de-assertion */
@@ -212,7 +212,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* assert wr signal */
- var = 0x1 << PCIE_PHY_CTRL_WR_LOC;
+ var = PCIE_PHY_CTRL_WR;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack */
@@ -221,7 +221,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* deassert wr signal */
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack de-assertion */
--
2.19.1
next prev parent reply other threads:[~2018-12-21 7:29 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 7:26 [PATCH 00/21] i.MX6, DesignWare PCI improvements Andrey Smirnov
2018-12-21 7:26 ` [PATCH 01/21] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2018-12-21 7:26 ` [PATCH 02/21] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2018-12-21 7:26 ` [PATCH 03/21] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2018-12-21 7:26 ` [PATCH 04/21] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
2018-12-21 7:27 ` [PATCH 05/21] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2018-12-21 7:27 ` [PATCH 06/21] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
2018-12-21 7:27 ` [PATCH 07/21] PCI: designware: Make use of IS_ALIGNED() Andrey Smirnov
2019-01-02 9:33 ` Gustavo Pimentel
2019-01-04 18:37 ` Joe Perches
2019-01-04 18:52 ` Andrey Smirnov
2018-12-21 7:27 ` [PATCH 08/21] PCI: designware: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
2019-01-02 10:21 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 09/21] PCI: imx6: Drop imx6_pcie_link_up() Andrey Smirnov
2018-12-21 18:55 ` Trent Piepho
2018-12-22 0:39 ` Andrey Smirnov
2018-12-21 7:27 ` [PATCH 10/21] PCI: designware: imx6: Share PHY debug register definitions Andrey Smirnov
2018-12-21 7:27 ` [PATCH 11/21] PCI: designware: Make use of BIT() in constant definitions Andrey Smirnov
2018-12-26 15:14 ` Gustavo Pimentel
2019-01-02 18:28 ` Andrey Smirnov
2019-01-02 18:31 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 12/21] PCI: imx6: " Andrey Smirnov
2018-12-21 7:27 ` Andrey Smirnov [this message]
2018-12-21 7:27 ` [PATCH 14/21] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 15/21] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2018-12-21 7:27 ` [PATCH 16/21] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
2018-12-21 7:27 ` [PATCH 17/21] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 18/21] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 19/21] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 20/21] PCI: designware: Make use of GENMASK/FIELD_PREP Andrey Smirnov
2018-12-26 15:07 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 21/21] PCI: designware: Remove superfluous shifting in definitions Andrey Smirnov
2018-12-26 14:49 ` Gustavo Pimentel
2018-12-26 15:26 ` [PATCH 00/21] i.MX6, DesignWare PCI improvements Gustavo Pimentel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181221072716.29017-14-andrew.smirnov@gmail.com \
--to=andrew.smirnov@gmail.com \
--cc=aisheng.dong@nxp.com \
--cc=bhelgaas@google.com \
--cc=cphealy@gmail.com \
--cc=fabio.estevam@nxp.com \
--cc=hongxing.zhu@nxp.com \
--cc=l.stach@pengutronix.de \
--cc=leonard.crestez@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).