From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 6/9] PCI: dwc: Add support to use non default msi_irq_chip
Date: Fri, 8 Feb 2019 10:22:22 +0000 [thread overview]
Message-ID: <20190208102222.GB13009@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <ff55a1e9-0998-685f-2d2c-e6cf522b0988@ti.com>
On Fri, Feb 08, 2019 at 10:16:59AM +0530, Kishon Vijay Abraham I wrote:
> Hi Lorenzo,
>
> On 07/02/19 10:18 PM, Lorenzo Pieralisi wrote:
> > On Thu, Feb 07, 2019 at 04:39:21PM +0530, Kishon Vijay Abraham I wrote:
> >> Platforms using Designware IP uses dw_pci_msi_bottom_irq_chip for
> >> configuring the MSI controller logic within the Designware IP. However
> >> certain platforms like Keystone (K2G) which uses Desingware IP has
> >> it's own MSI controller logic. For handling such platforms,
> >> the irqchip ops uses msi_irq_ack, msi_set_irq, msi_clear_irq callback
> >> functions.
> >>
> >> Add support to use different msi_irq_chip with default as
> >> dw_pci_msi_bottom_irq_chip. This is in preparation to get rid off
> >> msi_irq_ack, msi_set_irq, msi_clear_irq and other Keystone specific
> >> dw_pcie_host_ops. This will also help to get rid of get_msi_addr and
> >> get_msi_data ops.
> >>
> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >> ---
> >> drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++-
> >> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> >> 2 files changed, 5 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> >> index 721d60a5d9e4..042de09b0451 100644
> >> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> >> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> >> @@ -245,7 +245,7 @@ static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
> >>
> >> for (i = 0; i < nr_irqs; i++)
> >> irq_domain_set_info(domain, virq + i, bit + i,
> >> - &dw_pci_msi_bottom_irq_chip,
> >> + pp->msi_irq_chip,
> >> pp, handle_edge_irq,
> >> NULL, NULL);
> >>
> >> @@ -277,6 +277,9 @@ int dw_pcie_allocate_domains(struct pcie_port *pp)
> >> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> >> struct fwnode_handle *fwnode = of_node_to_fwnode(pci->dev->of_node);
> >>
> >> + if (!pp->msi_irq_chip)
> >> + pp->msi_irq_chip = &dw_pci_msi_bottom_irq_chip;
> >
> > I think it is better to initialize pp->msi_irq_chip outside
> > dw_pcie_allocate_domains(), it makes things clearer.
> >
> > In:
> >
> > dw_pcie_host_init() for dwc
> >
> > or
> >
> > msi_host_init() for platforms with that hook implemented.
> >
> > Is there any gotcha I am missing ?
>
> I added here only to avoid breaking "git bisect". Next patch adds
> ks_pcie_msi_irq_chip in msi_host_init of keystone. However till then it has to
> use dw_pci_msi_bottom_irq_chip. Adding anywhere else in dw_pcie_host_init would
> mean msi_irq_chip is uninitialized for keystone.
>
> Maybe I can add that in the commit log and move it to dw_pcie_host_init?
I do not think you need to mention that in the commit log but move the
initialization of pp->msi_irq_chip in dw_pcie_host_init() in the next
patch, yes.
It is correct to keep bisectability, I should have read ahead.
Lorenzo
next prev parent reply other threads:[~2019-02-08 10:22 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-07 11:09 [PATCH v2 0/9] PCI: DWC/Keystone: MSI configuration cleanup Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 1/9] PCI: keystone: Cleanup interrupt related macros Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 2/9] PCI: keystone: Modify legacy_irq_handler to check the IRQ_STATUS of INTA/B/C/D Kishon Vijay Abraham I
2019-02-07 16:15 ` Lorenzo Pieralisi
2019-02-08 4:32 ` Kishon Vijay Abraham I
2019-02-07 20:52 ` Bjorn Helgaas
2019-02-08 11:09 ` Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 3/9] PCI: keystone: Add separate functions for configuring MSI and legacy interrupt Kishon Vijay Abraham I
2019-02-07 15:44 ` Lorenzo Pieralisi
2019-02-08 4:33 ` Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 4/9] PCI: keystone: Use hwirq to get the IRQ number offset Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 5/9] PCI: keystone: Cleanup ks_pcie_msi_irq_handler and ks_pcie_legacy_irq_handler Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 6/9] PCI: dwc: Add support to use non default msi_irq_chip Kishon Vijay Abraham I
2019-02-07 16:48 ` Lorenzo Pieralisi
2019-02-08 4:46 ` Kishon Vijay Abraham I
2019-02-08 10:22 ` Lorenzo Pieralisi [this message]
2019-02-07 20:56 ` Bjorn Helgaas
2019-02-07 11:09 ` [PATCH v2 7/9] PCI: keystone: Use Keystone specific msi_irq_chip Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 8/9] PCI: dwc: Remove Keystone specific dw_pcie_host_ops Kishon Vijay Abraham I
2019-02-07 18:45 ` Trent Piepho
2019-02-07 21:26 ` Bjorn Helgaas
2019-02-08 5:13 ` Kishon Vijay Abraham I
2019-02-08 14:05 ` Bjorn Helgaas
2019-02-07 11:09 ` [PATCH v2 9/9] PCI: dwc: Do not write to MSI control registers if the platform doesn't use it Kishon Vijay Abraham I
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