linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Murali Karicheri <m-karicheri2@ti.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	<linux-pci@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 8/9] PCI: dwc: Remove Keystone specific dw_pcie_host_ops
Date: Fri, 8 Feb 2019 10:43:40 +0530	[thread overview]
Message-ID: <2b839b2f-d792-069b-b45f-4a455335f016@ti.com> (raw)
In-Reply-To: <20190207212622.GO7268@google.com>

Hi,

On 08/02/19 2:56 AM, Bjorn Helgaas wrote:
> On Thu, Feb 07, 2019 at 04:39:23PM +0530, Kishon Vijay Abraham I wrote:
>> Now that Keystone started using it's own msi_irq_chip, remove
>> Keystone specific callback function defined in dw_pcie_host_ops.
> 
> s/it's/its/
> s/callback function/callback functions/

okay.
> 
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>> ---
>>  .../pci/controller/dwc/pcie-designware-host.c | 45 ++++++-------------
>>  drivers/pci/controller/dwc/pcie-designware.h  |  5 ---
>>  2 files changed, 14 insertions(+), 36 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
>> index 042de09b0451..9492b05e8ff0 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>> @@ -126,18 +126,12 @@ static void dw_pci_setup_msi_msg(struct irq_data *data, struct msi_msg *msg)
>>  	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>>  	u64 msi_target;
>>  
>> -	if (pp->ops->get_msi_addr)
>> -		msi_target = pp->ops->get_msi_addr(pp);
>> -	else
>> -		msi_target = (u64)pp->msi_data;
>> +	msi_target = (u64)pp->msi_data;
>>  
>>  	msg->address_lo = lower_32_bits(msi_target);
>>  	msg->address_hi = upper_32_bits(msi_target);
>>  
>> -	if (pp->ops->get_msi_data)
>> -		msg->data = pp->ops->get_msi_data(pp, data->hwirq);
>> -	else
>> -		msg->data = data->hwirq;
>> +	msg->data = data->hwirq;
>>  
>>  	dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n",
>>  		(int)data->hwirq, msg->address_hi, msg->address_lo);
>> @@ -157,17 +151,13 @@ static void dw_pci_bottom_mask(struct irq_data *data)
>>  
>>  	raw_spin_lock_irqsave(&pp->lock, flags);
>>  
>> -	if (pp->ops->msi_clear_irq) {
>> -		pp->ops->msi_clear_irq(pp, data->hwirq);
>> -	} else {
>> -		ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
>> -		res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
>> -		bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>> +	ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
>> +	res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
>> +	bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>>  
>> -		pp->irq_status[ctrl] &= ~(1 << bit);
>> -		dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
>> -				    ~pp->irq_status[ctrl]);
>> -	}
>> +	pp->irq_status[ctrl] &= ~(1 << bit);
>> +	dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
>> +			    ~pp->irq_status[ctrl]);
>>  
>>  	raw_spin_unlock_irqrestore(&pp->lock, flags);
>>  }
>> @@ -180,17 +170,13 @@ static void dw_pci_bottom_unmask(struct irq_data *data)
>>  
>>  	raw_spin_lock_irqsave(&pp->lock, flags);
>>  
>> -	if (pp->ops->msi_set_irq) {
>> -		pp->ops->msi_set_irq(pp, data->hwirq);
>> -	} else {
>> -		ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
>> -		res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
>> -		bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>> +	ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
>> +	res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
>> +	bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>>  
>> -		pp->irq_status[ctrl] |= 1 << bit;
>> -		dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
>> -				    ~pp->irq_status[ctrl]);
>> -	}
>> +	pp->irq_status[ctrl] |= 1 << bit;
>> +	dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
>> +			    ~pp->irq_status[ctrl]);
>>  
>>  	raw_spin_unlock_irqrestore(&pp->lock, flags);
>>  }
>> @@ -209,9 +195,6 @@ static void dw_pci_bottom_ack(struct irq_data *d)
>>  
>>  	dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit);
>>  
>> -	if (pp->ops->msi_irq_ack)
>> -		pp->ops->msi_irq_ack(d->hwirq, pp);
>> -
>>  	raw_spin_unlock_irqrestore(&pp->lock, flags);
>>  }
>>  
>> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
>> index 95e0c3c93f48..ea4b215b605d 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware.h
>> +++ b/drivers/pci/controller/dwc/pcie-designware.h
>> @@ -142,14 +142,9 @@ struct dw_pcie_host_ops {
>>  	int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
>>  			     unsigned int devfn, int where, int size, u32 val);
>>  	int (*host_init)(struct pcie_port *pp);
>> -	void (*msi_set_irq)(struct pcie_port *pp, int irq);
>> -	void (*msi_clear_irq)(struct pcie_port *pp, int irq);
>> -	phys_addr_t (*get_msi_addr)(struct pcie_port *pp);
>> -	u32 (*get_msi_data)(struct pcie_port *pp, int pos);
> 
> I don't see the whole series on linux-pci (I only see patches 2, 6, 8, 9),

I do see all the patches here
https://patchwork.kernel.org/project/linux-pci/list/. Maybe it arrived little late?
> but I expected to somewhere see the removal of assignments to these
> pointers.  It would be easier to review if the removal of assignments and
> the removal of the function pointers from the structure were in the same
> patch, but maybe that's not really feasible.

The removal of the assignments are in 7th patch of the series (PCI: keystone:
Use Keystone specific msi_irq_chip). It's feasible but just wanted to keep the
keystone changes and DesignWare changes in separate patches.

Thanks
Kishon

  reply	other threads:[~2019-02-08  5:14 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-07 11:09 [PATCH v2 0/9] PCI: DWC/Keystone: MSI configuration cleanup Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 1/9] PCI: keystone: Cleanup interrupt related macros Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 2/9] PCI: keystone: Modify legacy_irq_handler to check the IRQ_STATUS of INTA/B/C/D Kishon Vijay Abraham I
2019-02-07 16:15   ` Lorenzo Pieralisi
2019-02-08  4:32     ` Kishon Vijay Abraham I
2019-02-07 20:52   ` Bjorn Helgaas
2019-02-08 11:09     ` Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 3/9] PCI: keystone: Add separate functions for configuring MSI and legacy interrupt Kishon Vijay Abraham I
2019-02-07 15:44   ` Lorenzo Pieralisi
2019-02-08  4:33     ` Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 4/9] PCI: keystone: Use hwirq to get the IRQ number offset Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 5/9] PCI: keystone: Cleanup ks_pcie_msi_irq_handler and ks_pcie_legacy_irq_handler Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 6/9] PCI: dwc: Add support to use non default msi_irq_chip Kishon Vijay Abraham I
2019-02-07 16:48   ` Lorenzo Pieralisi
2019-02-08  4:46     ` Kishon Vijay Abraham I
2019-02-08 10:22       ` Lorenzo Pieralisi
2019-02-07 20:56   ` Bjorn Helgaas
2019-02-07 11:09 ` [PATCH v2 7/9] PCI: keystone: Use Keystone specific msi_irq_chip Kishon Vijay Abraham I
2019-02-07 11:09 ` [PATCH v2 8/9] PCI: dwc: Remove Keystone specific dw_pcie_host_ops Kishon Vijay Abraham I
2019-02-07 18:45   ` Trent Piepho
2019-02-07 21:26   ` Bjorn Helgaas
2019-02-08  5:13     ` Kishon Vijay Abraham I [this message]
2019-02-08 14:05       ` Bjorn Helgaas
2019-02-07 11:09 ` [PATCH v2 9/9] PCI: dwc: Do not write to MSI control registers if the platform doesn't use it Kishon Vijay Abraham I

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2b839b2f-d792-069b-b45f-4a455335f016@ti.com \
    --to=kishon@ti.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=helgaas@kernel.org \
    --cc=jingoohan1@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=m-karicheri2@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).