[PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Thomas Petazzoni]

Hello,

This set of two patches aim at fixing some regression reported by two
users (Luis and Leigh), that were introduced by the conversion of the
pci-mvebu driver to the common PCI bridge emulation code shared
between pci-aardvark and pci-mvebu.

Due to this conversion, some registers of the PCI configuration that
used to be read-only are now read-write, making the Linux PCI core
believe that some features are implemented by the PCI bridge. Namely
in the case of pci-mvebu, the prefetchable memory base/limit registers
were read-only, while they are now read-write. Due to this, the Linux
PCI core now believes it can configure a prefetchable memory area, but
this is not supported by pci-mvebu, which does not have the logic to
create the appropriate MBUs windows.

This set of two commits allow PCI controller code to tell the PCI
bridge emulation logic about their capabilities. Because we envision
that other capabilities than prefetchable memory support might need to
be communicated from the PCI controller code to the PCI bridge
emulation code in the future, we introduce a "flags" argument, even if
for now only one flag is supported.

Lorenzo, let me know what you think about this approach. I am open to
suggestions if the proposed approach is not satisfying.

Both patches have been confirmed by Luis and Leigh to fix the
regression, but I'll let them give a formal Tested-by.

Best regards,

Thomas Petazzoni

Thomas Petazzoni (2):
  PCI: pci-bridge-emul: Create per-bridge copy of register behavior
  PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags

 drivers/pci/controller/pci-aardvark.c |  2 +-
 drivers/pci/controller/pci-mvebu.c    |  2 +-
 drivers/pci/pci-bridge-emul.c         | 86 ++++++++++++++++++---------
 drivers/pci/pci-bridge-emul.h         | 13 +++-
 4 files changed, 73 insertions(+), 30 deletions(-)

-- 
2.20.1

[PATCH 1/2] PCI: pci-bridge-emul: Create per-bridge copy of register behavior

[Thomas Petazzoni]

The behavior of the different registers of the PCI-to-PCI bridge is
currently encoded in two global arrays, shared by all instances of
PCI-to-PCI bridge emulation.

However, we will need to tweak the behavior on a per-bridge basis, to
accommodate for different capabilities of the platforms where this
code is used. In preparation for this, this commit creates a
per-bridge copy of the register behavior arrays, so that they can
later be tweaked on a per-bridge basis.

Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
 drivers/pci/pci-bridge-emul.c | 80 +++++++++++++++++++++++------------
 drivers/pci/pci-bridge-emul.h |  8 +++-
 2 files changed, 60 insertions(+), 28 deletions(-)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 129738362d90..dd8d8060317e 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -24,29 +24,6 @@
 #define PCI_CAP_PCIE_START	PCI_BRIDGE_CONF_END
 #define PCI_CAP_PCIE_END	(PCI_CAP_PCIE_START + PCI_EXP_SLTSTA2 + 2)
 
-/*
- * Initialize a pci_bridge_emul structure to represent a fake PCI
- * bridge configuration space. The caller needs to have initialized
- * the PCI configuration space with whatever values make sense
- * (typically at least vendor, device, revision), the ->ops pointer,
- * and optionally ->data and ->has_pcie.
- */
-void pci_bridge_emul_init(struct pci_bridge_emul *bridge)
-{
-	bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
-	bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
-	bridge->conf.cache_line_size = 0x10;
-	bridge->conf.status = PCI_STATUS_CAP_LIST;
-
-	if (bridge->has_pcie) {
-		bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
-		bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
-		/* Set PCIe v2, root port, slot support */
-		bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
-			PCI_EXP_FLAGS_SLOT;
-	}
-}
-
 struct pci_bridge_reg_behavior {
 	/* Read-only bits */
 	u32 ro;
@@ -283,6 +260,55 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
 	},
 };
 
+/*
+ * Initialize a pci_bridge_emul structure to represent a fake PCI
+ * bridge configuration space. The caller needs to have initialized
+ * the PCI configuration space with whatever values make sense
+ * (typically at least vendor, device, revision), the ->ops pointer,
+ * and optionally ->data and ->has_pcie.
+ */
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
+{
+	bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
+	bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
+	bridge->conf.cache_line_size = 0x10;
+	bridge->conf.status = PCI_STATUS_CAP_LIST;
+	bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
+					    sizeof(pci_regs_behavior),
+					    GFP_KERNEL);
+	if (!bridge->pci_regs_behavior)
+		return -ENOMEM;
+
+	if (bridge->has_pcie) {
+		bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
+		bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
+		/* Set PCIe v2, root port, slot support */
+		bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
+			PCI_EXP_FLAGS_SLOT;
+		bridge->pcie_cap_regs_behavior =
+			kmemdup(pcie_cap_regs_behavior,
+				sizeof(pcie_cap_regs_behavior),
+				GFP_KERNEL);
+		if (!bridge->pcie_cap_regs_behavior) {
+			kfree(bridge->pci_regs_behavior);
+			return -ENOMEM;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Cleanup a pci_bridge_emul structure that was previously initilized
+ * using pci_bridge_emul_init().
+ */
+void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge)
+{
+	if (bridge->has_pcie)
+		kfree(bridge->pcie_cap_regs_behavior);
+	kfree(bridge->pci_regs_behavior);
+}
+
 /*
  * Should be called by the PCI controller driver when reading the PCI
  * configuration space of the fake bridge. It will call back the
@@ -312,11 +338,11 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
 		reg -= PCI_CAP_PCIE_START;
 		read_op = bridge->ops->read_pcie;
 		cfgspace = (u32 *) &bridge->pcie_conf;
-		behavior = pcie_cap_regs_behavior;
+		behavior = bridge->pcie_cap_regs_behavior;
 	} else {
 		read_op = bridge->ops->read_base;
 		cfgspace = (u32 *) &bridge->conf;
-		behavior = pci_regs_behavior;
+		behavior = bridge->pci_regs_behavior;
 	}
 
 	if (read_op)
@@ -383,11 +409,11 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
 		reg -= PCI_CAP_PCIE_START;
 		write_op = bridge->ops->write_pcie;
 		cfgspace = (u32 *) &bridge->pcie_conf;
-		behavior = pcie_cap_regs_behavior;
+		behavior = bridge->pcie_cap_regs_behavior;
 	} else {
 		write_op = bridge->ops->write_base;
 		cfgspace = (u32 *) &bridge->conf;
-		behavior = pci_regs_behavior;
+		behavior = bridge->pci_regs_behavior;
 	}
 
 	/* Keep all bits, except the RW bits */
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index 9d510ccf738b..f04637bb3222 100644
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -107,15 +107,21 @@ struct pci_bridge_emul_ops {
 			   u32 old, u32 new, u32 mask);
 };
 
+struct pci_bridge_reg_behavior;
+
 struct pci_bridge_emul {
 	struct pci_bridge_emul_conf conf;
 	struct pci_bridge_emul_pcie_conf pcie_conf;
 	struct pci_bridge_emul_ops *ops;
+	struct pci_bridge_reg_behavior *pci_regs_behavior;
+	struct pci_bridge_reg_behavior *pcie_cap_regs_behavior;
 	void *data;
 	bool has_pcie;
 };
 
-void pci_bridge_emul_init(struct pci_bridge_emul *bridge);
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge);
+void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
+
 int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
 			      int size, u32 *value);
 int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
-- 
2.20.1

[PATCH 2/2] PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags

[Thomas Petazzoni]

Depending on the capabilities of the PCI controller/platform, the
PCI-to-PCI bridge emulation behavior might need to be different. For
example, on platforms that use the pci-mvebu code, we currently don't
support prefetchable memory BARs, so the corresponding fields in the
PCI-to-PCI bridge configuration space should be read-only.

To implement this, this commit extends pci_bridge_emul_init() to take
a "flags" argument, with currently one flag supported:
PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR, that will make the prefetchable
memory base and limit registers read-only.

The pci-mvebu and pci-aardvark drivers are updated accordingly.

Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
 drivers/pci/controller/pci-aardvark.c | 2 +-
 drivers/pci/controller/pci-mvebu.c    | 2 +-
 drivers/pci/pci-bridge-emul.c         | 8 +++++++-
 drivers/pci/pci-bridge-emul.h         | 7 ++++++-
 4 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 750081c1cb48..6eecae447af3 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -499,7 +499,7 @@ static void advk_sw_pci_bridge_init(struct advk_pcie *pcie)
 	bridge->data = pcie;
 	bridge->ops = &advk_pci_bridge_emul_ops;
 
-	pci_bridge_emul_init(bridge);
+	pci_bridge_emul_init(bridge, 0);
 
 }
 
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index fa0fc46edb0c..d3a0419e42f2 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -583,7 +583,7 @@ static void mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
 	bridge->data = port;
 	bridge->ops = &mvebu_pci_bridge_emul_ops;
 
-	pci_bridge_emul_init(bridge);
+	pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR);
 }
 
 static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index dd8d8060317e..83fb077d0b41 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -267,7 +267,8 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
  * (typically at least vendor, device, revision), the ->ops pointer,
  * and optionally ->data and ->has_pcie.
  */
-int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
+			 unsigned int flags)
 {
 	bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
 	bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
@@ -295,6 +296,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
 		}
 	}
 
+	if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
+		bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
+		bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h
index f04637bb3222..e65b1b79899d 100644
--- a/drivers/pci/pci-bridge-emul.h
+++ b/drivers/pci/pci-bridge-emul.h
@@ -119,7 +119,12 @@ struct pci_bridge_emul {
 	bool has_pcie;
 };
 
-int pci_bridge_emul_init(struct pci_bridge_emul *bridge);
+enum {
+	PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0),
+};
+
+int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
+			 unsigned int flags);
 void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
 
 int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
-- 
2.20.1

Re: [PATCH 1/2] PCI: pci-bridge-emul: Create per-bridge copy of register behavior

[Luís Mendes]

Tested patch against Vanilla kernels 4.20.11 and 5.0-rc7. It is
working properly on both kernels.

Tested-by: Luis Mendes <luis.p.mendes@gmail.com>

On Wed, Feb 20, 2019 at 9:48 AM Thomas Petazzoni
<thomas.petazzoni@bootlin.com> wrote:
>
> The behavior of the different registers of the PCI-to-PCI bridge is
> currently encoded in two global arrays, shared by all instances of
> PCI-to-PCI bridge emulation.
>
> However, we will need to tweak the behavior on a per-bridge basis, to
> accommodate for different capabilities of the platforms where this
> code is used. In preparation for this, this commit creates a
> per-bridge copy of the register behavior arrays, so that they can
> later be tweaked on a per-bridge basis.
>
> Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
> Reported-by: Leigh Brown <leigh@solinno.co.uk>
> Cc: Luís Mendes <luis.p.mendes@gmail.com>
> Cc: Leigh Brown <leigh@solinno.co.uk>
> Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>

Re: [PATCH 2/2] PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags

[Luís Mendes]

Tested patch against Vanilla kernels 4.20.11 and 5.0-rc7. It is
working properly on both kernels.

Tested-by: Luis Mendes <luis.p.mendes@gmail.com>

On Wed, Feb 20, 2019 at 9:48 AM Thomas Petazzoni
<thomas.petazzoni@bootlin.com> wrote:
>
> Depending on the capabilities of the PCI controller/platform, the
> PCI-to-PCI bridge emulation behavior might need to be different. For
> example, on platforms that use the pci-mvebu code, we currently don't
> support prefetchable memory BARs, so the corresponding fields in the
> PCI-to-PCI bridge configuration space should be read-only.
>
> To implement this, this commit extends pci_bridge_emul_init() to take
> a "flags" argument, with currently one flag supported:
> PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR, that will make the prefetchable
> memory base and limit registers read-only.
>
> The pci-mvebu and pci-aardvark drivers are updated accordingly.
>
> Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
> Reported-by: Leigh Brown <leigh@solinno.co.uk>
> Cc: Luís Mendes <luis.p.mendes@gmail.com>
> Cc: Leigh Brown <leigh@solinno.co.uk>
> Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> ---
>  drivers/pci/controller/pci-aardvark.c | 2 +-
>  drivers/pci/controller/pci-mvebu.c    | 2 +-
>  drivers/pci/pci-bridge-emul.c         | 8 +++++++-
>  drivers/pci/pci-bridge-emul.h         | 7 ++++++-
>  4 files changed, 15 insertions(+), 4 deletions(-)
>

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Bjorn Helgaas]

On Wed, Feb 20, 2019 at 10:48:39AM +0100, Thomas Petazzoni wrote:
> Hello,
> 
> This set of two patches aim at fixing some regression reported by two
> users (Luis and Leigh), that were introduced by the conversion of the
> pci-mvebu driver to the common PCI bridge emulation code shared
> between pci-aardvark and pci-mvebu.
> 
> Due to this conversion, some registers of the PCI configuration that
> used to be read-only are now read-write, making the Linux PCI core
> believe that some features are implemented by the PCI bridge. Namely
> in the case of pci-mvebu, the prefetchable memory base/limit registers
> were read-only, while they are now read-write. Due to this, the Linux
> PCI core now believes it can configure a prefetchable memory area, but
> this is not supported by pci-mvebu, which does not have the logic to
> create the appropriate MBUs windows.
> 
> This set of two commits allow PCI controller code to tell the PCI
> bridge emulation logic about their capabilities. Because we envision
> that other capabilities than prefetchable memory support might need to
> be communicated from the PCI controller code to the PCI bridge
> emulation code in the future, we introduce a "flags" argument, even if
> for now only one flag is supported.
> 
> Lorenzo, let me know what you think about this approach. I am open to
> suggestions if the proposed approach is not satisfying.
> 
> Both patches have been confirmed by Luis and Leigh to fix the
> regression, but I'll let them give a formal Tested-by.
> 
> Best regards,
> 
> Thomas Petazzoni
> 
> Thomas Petazzoni (2):
>   PCI: pci-bridge-emul: Create per-bridge copy of register behavior
>   PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
> 
>  drivers/pci/controller/pci-aardvark.c |  2 +-
>  drivers/pci/controller/pci-mvebu.c    |  2 +-
>  drivers/pci/pci-bridge-emul.c         | 86 ++++++++++++++++++---------
>  drivers/pci/pci-bridge-emul.h         | 13 +++-
>  4 files changed, 73 insertions(+), 30 deletions(-)

Lorenzo, I assume you'll take both of these, so for both patches,

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

Maybe we should add a stable tag (v4.20+)?

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Leigh Brown]

On 2019-02-20 09:48, Thomas Petazzoni wrote:
> Hello,
> 
> This set of two patches aim at fixing some regression reported by two
> users (Luis and Leigh), that were introduced by the conversion of the
> pci-mvebu driver to the common PCI bridge emulation code shared
> between pci-aardvark and pci-mvebu.
> 
> Due to this conversion, some registers of the PCI configuration that
> used to be read-only are now read-write, making the Linux PCI core
> believe that some features are implemented by the PCI bridge. Namely
> in the case of pci-mvebu, the prefetchable memory base/limit registers
> were read-only, while they are now read-write. Due to this, the Linux
> PCI core now believes it can configure a prefetchable memory area, but
> this is not supported by pci-mvebu, which does not have the logic to
> create the appropriate MBUs windows.
> 
> This set of two commits allow PCI controller code to tell the PCI
> bridge emulation logic about their capabilities. Because we envision
> that other capabilities than prefetchable memory support might need to
> be communicated from the PCI controller code to the PCI bridge
> emulation code in the future, we introduce a "flags" argument, even if
> for now only one flag is supported.
> 
> Lorenzo, let me know what you think about this approach. I am open to
> suggestions if the proposed approach is not satisfying.
> 
> Both patches have been confirmed by Luis and Leigh to fix the
> regression, but I'll let them give a formal Tested-by.
> 
> Best regards,
> 
> Thomas Petazzoni
> 
> Thomas Petazzoni (2):
>   PCI: pci-bridge-emul: Create per-bridge copy of register behavior
>   PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
> 
>  drivers/pci/controller/pci-aardvark.c |  2 +-
>  drivers/pci/controller/pci-mvebu.c    |  2 +-
>  drivers/pci/pci-bridge-emul.c         | 86 ++++++++++++++++++---------
>  drivers/pci/pci-bridge-emul.h         | 13 +++-
>  4 files changed, 73 insertions(+), 30 deletions(-)

Tested on WRT1900ACS router against 4.20.7 and 5.0.0-rc.

Tested-by: Leigh Brown <leigh@solinno.co.uk>

Regards,

Leigh.

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Leigh Brown]

On 2019-02-21 23:23, Bjorn Helgaas wrote:
> On Wed, Feb 20, 2019 at 10:48:39AM +0100, Thomas Petazzoni wrote:
>> Hello,
>> 
>> This set of two patches aim at fixing some regression reported by two
>> users (Luis and Leigh), that were introduced by the conversion of the
>> pci-mvebu driver to the common PCI bridge emulation code shared
>> between pci-aardvark and pci-mvebu.
>> 
>> Due to this conversion, some registers of the PCI configuration that
>> used to be read-only are now read-write, making the Linux PCI core
>> believe that some features are implemented by the PCI bridge. Namely
>> in the case of pci-mvebu, the prefetchable memory base/limit registers
>> were read-only, while they are now read-write. Due to this, the Linux
>> PCI core now believes it can configure a prefetchable memory area, but
>> this is not supported by pci-mvebu, which does not have the logic to
>> create the appropriate MBUs windows.
>> 
>> This set of two commits allow PCI controller code to tell the PCI
>> bridge emulation logic about their capabilities. Because we envision
>> that other capabilities than prefetchable memory support might need to
>> be communicated from the PCI controller code to the PCI bridge
>> emulation code in the future, we introduce a "flags" argument, even if
>> for now only one flag is supported.
>> 
>> Lorenzo, let me know what you think about this approach. I am open to
>> suggestions if the proposed approach is not satisfying.
>> 
>> Both patches have been confirmed by Luis and Leigh to fix the
>> regression, but I'll let them give a formal Tested-by.
>> 
>> Best regards,
>> 
>> Thomas Petazzoni
>> 
>> Thomas Petazzoni (2):
>>   PCI: pci-bridge-emul: Create per-bridge copy of register behavior
>>   PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
>> 
>>  drivers/pci/controller/pci-aardvark.c |  2 +-
>>  drivers/pci/controller/pci-mvebu.c    |  2 +-
>>  drivers/pci/pci-bridge-emul.c         | 86 
>> ++++++++++++++++++---------
>>  drivers/pci/pci-bridge-emul.h         | 13 +++-
>>  4 files changed, 73 insertions(+), 30 deletions(-)
> 
> Lorenzo, I assume you'll take both of these, so for both patches,
> 
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> 
> Maybe we should add a stable tag (v4.20+)?

That would be great, as it would get that kernel version working again.

Regards,

Leigh.

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Thomas Petazzoni]

Hello Bjorn,

On Thu, 21 Feb 2019 17:23:17 -0600
Bjorn Helgaas <helgaas@kernel.org> wrote:

> Lorenzo, I assume you'll take both of these, so for both patches,
> 
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>

Thanks!

> Maybe we should add a stable tag (v4.20+)?

Both patches have a Fixes: tag, so they should be automatically be
backported to the applicable stable kernels. From
Documentation/process/submitting-patches.rst.

  A Fixes: tag indicates that the patch fixes an issue in a previous
  commit. It is used to make it easy to determine where a bug
  originated, which can help review a bug fix. This tag also assists
  the stable kernel team in determining which stable kernel versions
  should receive your fix. This is the preferred method for indicating
  a bug fixed by the patch. See :ref:`describe_changes` for more
  details.

Isn't that sufficient ?

Thanks,

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Lorenzo Pieralisi]

On Fri, Feb 22, 2019 at 09:35:54AM +0100, Thomas Petazzoni wrote:
> Hello Bjorn,
> 
> On Thu, 21 Feb 2019 17:23:17 -0600
> Bjorn Helgaas <helgaas@kernel.org> wrote:
> 
> > Lorenzo, I assume you'll take both of these, so for both patches,
> > 
> > Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> 
> Thanks!
> 
> > Maybe we should add a stable tag (v4.20+)?
> 
> Both patches have a Fixes: tag, so they should be automatically be
> backported to the applicable stable kernels. From
> Documentation/process/submitting-patches.rst.
> 
>   A Fixes: tag indicates that the patch fixes an issue in a previous
>   commit. It is used to make it easy to determine where a bug
>   originated, which can help review a bug fix. This tag also assists
>   the stable kernel team in determining which stable kernel versions
>   should receive your fix. This is the preferred method for indicating
>   a bug fixed by the patch. See :ref:`describe_changes` for more
>   details.
> 
> Isn't that sufficient ?

Adding a CC: stable won't hurt so that it is certain it will get
stable kernels attention, that's what I will do.

Thanks,
Lorenzo

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Lorenzo Pieralisi]

On Wed, Feb 20, 2019 at 10:48:39AM +0100, Thomas Petazzoni wrote:
> Hello,
> 
> This set of two patches aim at fixing some regression reported by two
> users (Luis and Leigh), that were introduced by the conversion of the
> pci-mvebu driver to the common PCI bridge emulation code shared
> between pci-aardvark and pci-mvebu.
> 
> Due to this conversion, some registers of the PCI configuration that
> used to be read-only are now read-write, making the Linux PCI core
> believe that some features are implemented by the PCI bridge. Namely
> in the case of pci-mvebu, the prefetchable memory base/limit registers
> were read-only, while they are now read-write. Due to this, the Linux
> PCI core now believes it can configure a prefetchable memory area, but
> this is not supported by pci-mvebu, which does not have the logic to
> create the appropriate MBUs windows.
> 
> This set of two commits allow PCI controller code to tell the PCI
> bridge emulation logic about their capabilities. Because we envision
> that other capabilities than prefetchable memory support might need to
> be communicated from the PCI controller code to the PCI bridge
> emulation code in the future, we introduce a "flags" argument, even if
> for now only one flag is supported.
> 
> Lorenzo, let me know what you think about this approach. I am open to
> suggestions if the proposed approach is not satisfying.
> 
> Both patches have been confirmed by Luis and Leigh to fix the
> regression, but I'll let them give a formal Tested-by.
> 
> Best regards,
> 
> Thomas Petazzoni
> 
> Thomas Petazzoni (2):
>   PCI: pci-bridge-emul: Create per-bridge copy of register behavior
>   PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags
> 
>  drivers/pci/controller/pci-aardvark.c |  2 +-
>  drivers/pci/controller/pci-mvebu.c    |  2 +-
>  drivers/pci/pci-bridge-emul.c         | 86 ++++++++++++++++++---------
>  drivers/pci/pci-bridge-emul.h         | 13 +++-
>  4 files changed, 73 insertions(+), 30 deletions(-)

I have applied the series to pci/misc for v5.1, thanks.

Lorenzo

Re: [PATCH 0/2] PCI: fix pci-mvebu after conversion to common bridge emul code

[Thomas Petazzoni]

Hello Lorenzo,

On Fri, 22 Feb 2019 11:05:12 +0000
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> wrote:

> > Isn't that sufficient ?  
> 
> Adding a CC: stable won't hurt so that it is certain it will get
> stable kernels attention, that's what I will do.

Ah, yes, indeed. Sorry for forgetting about these, and thanks for
applying with those Cc: stable added!

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com