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* [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel
@ 2019-03-22 16:17 Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Arnd Bergmann
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Arnd Bergmann @ 2019-03-22 16:17 UTC (permalink / raw)
  To: stable
  Cc: Arnd Bergmann, Jingoo Han, Joao Pinto, Lorenzo Pieralisi,
	Bjorn Helgaas, Kishon Vijay Abraham I, Sebastian Reichel,
	Alessandro Zummo, Alexandre Belloni, Vinayak Holikatti,
	James E.J. Bottomley, Martin K. Petersen, Thierry Reding,
	Lee Jones, Daniel Thompson, Bartlomiej Zolnierkiewicz,
	Ingo Molnar, Peter Zijlstra, linux-pci, linux-kernel, linux-pm,
	linux-rtc, linux-scsi, linux-pwm, linux-fbdev

I took a scripted approach to look at some product kernels for patches
backported into vendor kernels. This is a set of (mostly) bugfixes I found
in Spreadtrum's linux-4.14 kernel that are missing in v4.14.107:

83dc7e3dea76 scsi: ufs: fix wrong command type of UTRD for UFSHCI v2.1
099a95f3591a PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits
1cab826b30c6 PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable
b330104fa76d PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent()
36d46cdb43ef rtc: Fix overflow when converting time64_t to rtc_time
1b5d43cfb697 sched/cpufreq/schedutil: Fix error path mutex unlock
5fb5caee92ba pwm-backlight: Enable/disable the PWM before/after LCD enable toggle.
f25a646fbe20 power: supply: charger-manager: Fix incorrect return value

Only a small number of patches here, the vendor tree is fairly close to
mainline. All commits apply cleanly through git-cherry-pick.

Baolin Wang (2):
  rtc: Fix overflow when converting time64_t to rtc_time
  power: supply: charger-manager: Fix incorrect return value

Enric Balletbo i Serra (1):
  pwm-backlight: Enable/disable the PWM before/after LCD enable toggle.

Jules Maselbas (1):
  sched/cpufreq/schedutil: Fix error path mutex unlock

Kishon Vijay Abraham I (1):
  PCI: endpoint: Use EPC's device in
    dma_alloc_coherent()/dma_free_coherent()

Niklas Cassel (2):
  PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits
  PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be
    writable

kehuanlin (1):
  scsi: ufs: fix wrong command type of UTRD for UFSHCI v2.1

 drivers/pci/dwc/pcie-designware-ep.c   | 12 +++++++++++-
 drivers/pci/dwc/pcie-designware.h      |  1 +
 drivers/pci/endpoint/pci-epc-core.c    | 10 ----------
 drivers/pci/endpoint/pci-epf-core.c    |  4 ++--
 drivers/power/supply/charger-manager.c |  3 +--
 drivers/rtc/rtc-lib.c                  |  6 ++----
 drivers/scsi/ufs/ufshcd.c              | 14 ++++++++------
 drivers/video/backlight/pwm_bl.c       |  9 +++++----
 kernel/sched/cpufreq_schedutil.c       |  3 +--
 9 files changed, 31 insertions(+), 31 deletions(-)


Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Vinayak Holikatti <vinholikatti@gmail.com>
Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>
Cc: "Martin K. Petersen" <martin.petersen@oracle.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-pci@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-rtc@vger.kernel.org
Cc: linux-scsi@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org

-- 
2.20.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits
  2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
@ 2019-03-22 16:17 ` Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Arnd Bergmann
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2019-03-22 16:17 UTC (permalink / raw)
  To: stable, Jingoo Han, Joao Pinto, Lorenzo Pieralisi, Bjorn Helgaas
  Cc: Niklas Cassel, Gustavo Pimentel, Joao Pinto, Arnd Bergmann,
	Greg Kroah-Hartman, Kishon Vijay Abraham I, Sasha Levin,
	Jisheng Zhang, linux-pci, linux-kernel

From: Niklas Cassel <niklas.cassel@axis.com>

Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control
register, thus overwriting the PCI_MSI_FLAGS_64BIT bit.
By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI
on systems where the RC has set a 64 bit MSI address.
Fix dw_pcie_ep_set_msi() so that it only sets MMC bits.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
(cherry picked from commit 099a95f3591ade29da52131895a3ba9f92a0e82c)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/pci/dwc/pcie-designware-ep.c | 4 +++-
 drivers/pci/dwc/pcie-designware.h    | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index 7c621877a939..df317d390317 100644
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -214,7 +214,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
 	struct dw_pcie_ep *ep = epc_get_drvdata(epc);
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
 
-	val = (encode_int << MSI_CAP_MMC_SHIFT);
+	val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL);
+	val &= ~MSI_CAP_MMC_MASK;
+	val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK;
 	dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val);
 
 	return 0;
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
index 3551dd607b90..5af29d125c7e 100644
--- a/drivers/pci/dwc/pcie-designware.h
+++ b/drivers/pci/dwc/pcie-designware.h
@@ -99,6 +99,7 @@
 
 #define MSI_MESSAGE_CONTROL		0x52
 #define MSI_CAP_MMC_SHIFT		1
+#define MSI_CAP_MMC_MASK		(7 << MSI_CAP_MMC_SHIFT)
 #define MSI_CAP_MME_SHIFT		4
 #define MSI_CAP_MSI_EN_MASK		0x1
 #define MSI_CAP_MME_MASK		(7 << MSI_CAP_MME_SHIFT)
-- 
2.20.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable
  2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Arnd Bergmann
@ 2019-03-22 16:17 ` Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() Arnd Bergmann
  2019-03-26  2:26 ` [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Greg KH
  3 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2019-03-22 16:17 UTC (permalink / raw)
  To: stable, Jingoo Han, Joao Pinto, Lorenzo Pieralisi, Bjorn Helgaas
  Cc: Niklas Cassel, Gustavo Pimentel, Joao Pinto, Arnd Bergmann,
	Sasha Levin, Kishon Vijay Abraham I, linux-pci, linux-kernel

From: Niklas Cassel <niklas.cassel@axis.com>

Certain registers that pcie-designware-ep tries to write to are read-only
registers. However, these registers can become read/write if we first
enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after
writing these registers.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
(cherry picked from commit 1cab826b30c6275d479a6ab1dea1067e15dbec62)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/pci/dwc/pcie-designware-ep.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index df317d390317..abcbf0770358 100644
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -35,8 +35,10 @@ static void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar)
 	u32 reg;
 
 	reg = PCI_BASE_ADDRESS_0 + (4 * bar);
+	dw_pcie_dbi_ro_wr_en(pci);
 	dw_pcie_writel_dbi2(pci, reg, 0x0);
 	dw_pcie_writel_dbi(pci, reg, 0x0);
+	dw_pcie_dbi_ro_wr_dis(pci);
 }
 
 static int dw_pcie_ep_write_header(struct pci_epc *epc,
@@ -45,6 +47,7 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc,
 	struct dw_pcie_ep *ep = epc_get_drvdata(epc);
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
 
+	dw_pcie_dbi_ro_wr_en(pci);
 	dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, hdr->vendorid);
 	dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, hdr->deviceid);
 	dw_pcie_writeb_dbi(pci, PCI_REVISION_ID, hdr->revid);
@@ -58,6 +61,7 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc,
 	dw_pcie_writew_dbi(pci, PCI_SUBSYSTEM_ID, hdr->subsys_id);
 	dw_pcie_writeb_dbi(pci, PCI_INTERRUPT_PIN,
 			   hdr->interrupt_pin);
+	dw_pcie_dbi_ro_wr_dis(pci);
 
 	return 0;
 }
@@ -142,8 +146,10 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, enum pci_barno bar,
 	if (ret)
 		return ret;
 
+	dw_pcie_dbi_ro_wr_en(pci);
 	dw_pcie_writel_dbi2(pci, reg, size - 1);
 	dw_pcie_writel_dbi(pci, reg, flags);
+	dw_pcie_dbi_ro_wr_dis(pci);
 
 	return 0;
 }
@@ -217,7 +223,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
 	val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL);
 	val &= ~MSI_CAP_MMC_MASK;
 	val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK;
+	dw_pcie_dbi_ro_wr_en(pci);
 	dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val);
+	dw_pcie_dbi_ro_wr_dis(pci);
 
 	return 0;
 }
-- 
2.20.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent()
  2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Arnd Bergmann
  2019-03-22 16:17 ` [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Arnd Bergmann
@ 2019-03-22 16:17 ` Arnd Bergmann
  2019-03-26  2:26 ` [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Greg KH
  3 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2019-03-22 16:17 UTC (permalink / raw)
  To: stable, Kishon Vijay Abraham I, Lorenzo Pieralisi, Bjorn Helgaas
  Cc: Robin Murphy, Rob Herring, Christoph Hellwig, Cyrille Pitchen,
	Niklas Cassel, Arnd Bergmann, linux-pci, linux-kernel

From: Kishon Vijay Abraham I <kishon@ti.com>

After commit 723288836628 ("of: restrict DMA configuration"),
of_dma_configure() doesn't configure the coherent_dma_mask/dma_mask
of endpoint function device (since it doesn't have a DT node associated
with and hence no dma-ranges property), resulting in
dma_alloc_coherent() (used in pci_epf_alloc_space()) to fail.

Fix it by making dma_alloc_coherent() use EPC's device for allocating
memory address.

Link: http://lkml.kernel.org/r/64d63468-d28f-8fcd-a6f3-cf2a6401c8cb@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
[lorenzo.pieralisi@arm.com: tweaked commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Christoph Hellwig <hch@lst.de>
Tested-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
Tested-by: Niklas Cassel <niklas.cassel@axis.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
(cherry picked from commit b330104fa76df3eae6e199a23791fed5d35f06b4)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/pci/endpoint/pci-epc-core.c | 10 ----------
 drivers/pci/endpoint/pci-epf-core.c |  4 ++--
 2 files changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 42c2a1156325..cd7d4788b94d 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -18,7 +18,6 @@
  */
 
 #include <linux/device.h>
-#include <linux/dma-mapping.h>
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
@@ -371,7 +370,6 @@ EXPORT_SYMBOL_GPL(pci_epc_write_header);
 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
 {
 	unsigned long flags;
-	struct device *dev = epc->dev.parent;
 
 	if (epf->epc)
 		return -EBUSY;
@@ -383,12 +381,6 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
 		return -EINVAL;
 
 	epf->epc = epc;
-	if (dev->of_node) {
-		of_dma_configure(&epf->dev, dev->of_node);
-	} else {
-		dma_set_coherent_mask(&epf->dev, epc->dev.coherent_dma_mask);
-		epf->dev.dma_mask = epc->dev.dma_mask;
-	}
 
 	spin_lock_irqsave(&epc->lock, flags);
 	list_add_tail(&epf->list, &epc->pci_epf);
@@ -503,9 +495,7 @@ __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
 	INIT_LIST_HEAD(&epc->pci_epf);
 
 	device_initialize(&epc->dev);
-	dma_set_coherent_mask(&epc->dev, dev->coherent_dma_mask);
 	epc->dev.class = pci_epc_class;
-	epc->dev.dma_mask = dev->dma_mask;
 	epc->dev.parent = dev;
 	epc->ops = ops;
 
diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c
index ae1611a62808..95ccc4b8a0a2 100644
--- a/drivers/pci/endpoint/pci-epf-core.c
+++ b/drivers/pci/endpoint/pci-epf-core.c
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(pci_epf_bind);
  */
 void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar)
 {
-	struct device *dev = &epf->dev;
+	struct device *dev = epf->epc->dev.parent;
 
 	if (!addr)
 		return;
@@ -122,7 +122,7 @@ EXPORT_SYMBOL_GPL(pci_epf_free_space);
 void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar)
 {
 	void *space;
-	struct device *dev = &epf->dev;
+	struct device *dev = epf->epc->dev.parent;
 	dma_addr_t phys_addr;
 
 	if (size < 128)
-- 
2.20.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel
  2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
                   ` (2 preceding siblings ...)
  2019-03-22 16:17 ` [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() Arnd Bergmann
@ 2019-03-26  2:26 ` Greg KH
  3 siblings, 0 replies; 5+ messages in thread
From: Greg KH @ 2019-03-26  2:26 UTC (permalink / raw)
  To: Arnd Bergmann
  Cc: stable, Jingoo Han, Joao Pinto, Lorenzo Pieralisi, Bjorn Helgaas,
	Kishon Vijay Abraham I, Sebastian Reichel, Alessandro Zummo,
	Alexandre Belloni, Vinayak Holikatti, James E.J. Bottomley,
	Martin K. Petersen, Thierry Reding, Lee Jones, Daniel Thompson,
	Bartlomiej Zolnierkiewicz, Ingo Molnar, Peter Zijlstra,
	linux-pci, linux-kernel, linux-pm, linux-rtc, linux-scsi,
	linux-pwm, linux-fbdev

On Fri, Mar 22, 2019 at 05:17:15PM +0100, Arnd Bergmann wrote:
> I took a scripted approach to look at some product kernels for patches
> backported into vendor kernels. This is a set of (mostly) bugfixes I found
> in Spreadtrum's linux-4.14 kernel that are missing in v4.14.107:
> 
> 83dc7e3dea76 scsi: ufs: fix wrong command type of UTRD for UFSHCI v2.1
> 099a95f3591a PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits
> 1cab826b30c6 PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable
> b330104fa76d PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent()
> 36d46cdb43ef rtc: Fix overflow when converting time64_t to rtc_time
> 1b5d43cfb697 sched/cpufreq/schedutil: Fix error path mutex unlock
> 5fb5caee92ba pwm-backlight: Enable/disable the PWM before/after LCD enable toggle.
> f25a646fbe20 power: supply: charger-manager: Fix incorrect return value
> 
> Only a small number of patches here, the vendor tree is fairly close to
> mainline. All commits apply cleanly through git-cherry-pick.

Thanks for these, now queued up to 4.14.y and a few other branches that
needed them.

greg k-h

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-03-26  2:27 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() Arnd Bergmann
2019-03-26  2:26 ` [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Greg KH

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