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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: bhelgaas@google.com, thierry.reding@gmail.com,
	robh+dt@kernel.org, mark.rutland@arm.com, jonathanh@nvidia.com,
	vidyas@nvidia.com, linux-tegra@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V5 20/27] PCI: tegra: Use legacy IRQ for port service drivers
Date: Tue, 18 Jun 2019 14:35:55 +0100	[thread overview]
Message-ID: <20190618133555.GB9002@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <8a8746f8-3e0f-c724-761e-8bc47b2cc3b6@nvidia.com>

On Tue, Jun 18, 2019 at 11:17:49AM +0530, Manikanta Maddireddy wrote:
> 
> 
> On 17-Jun-19 11:09 PM, Manikanta Maddireddy wrote:
> > Tegra signals PCIe services like AER, PME, etc. over legacy IRQ line.
> > By default, service drivers register interrupt routine over MSI IRQ line.
> > Use pcie_pme_disable_msi() function to disable MSI for service drivers.
> >
> > PME and AER interrupts registered to MSI without this change,
> > cat /proc/interrupts | grep -i pci
> > 36: 21 0 0 0 0 0 GICv2 104 Level       PCIE
> > 37: 35 0 0 0 0 0 GICv2 105 Level       Tegra PCIe MSI
> > 76: 0  0 0 0 0 0 Tegra PCIe MSI 0 Edge PCIe PME, aerdrv, PCIe BW notif
> >
> > PME and AER interrupts registered to legacy IRQ with this change,
> > cat /proc/interrupts | grep -i pci
> > 36: 33 0 0 0 0 0 GICv2 104 Level      PCIE, PCIe PME, aerdrv, PCIe BW notif
> > 37: 52 0 0 0 0 0 GICv2 105 Level      Tegra PCIe MSI
> >
> > Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> > Acked-by: Thierry Reding <treding@nvidia.com>
> > ---
> > V5: No change
> >
> > V4: No change
> >
> > V3: Corrected typo in commit log
> >
> > V2: No change
> >
> >  drivers/pci/controller/pci-tegra.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> > index 73d5a8841405..9429c0c6a1f3 100644
> > --- a/drivers/pci/controller/pci-tegra.c
> > +++ b/drivers/pci/controller/pci-tegra.c
> > @@ -41,6 +41,7 @@
> >  #include <soc/tegra/pmc.h>
> >  
> >  #include "../pci.h"
> > +#include "../pcie/portdrv.h"
> >  
> >  #define INT_PCI_MSI_NR (8 * 32)
> >  
> > @@ -2725,6 +2726,9 @@ static int tegra_pcie_probe(struct platform_device *pdev)
> >  		goto put_resources;
> >  	}
> >  
> > +	/* Switch to legacy IRQ for PCIe services like AER, PME*/
> > +	pcie_pme_disable_msi();
> > +
> >  	pm_runtime_enable(pcie->dev);
> >  	err = pm_runtime_get_sync(pcie->dev);
> >  	if (err) {
> 
> Hi Lorenzo,
> 
> I forgot to address Bjorn's comment here, I will correct this in V6.
> Let me know if I can publish it today or you want me to wait until
> you look into other patches.

It should be fine to post v6 but please pay attention next time, it has
been a while since this patch should have been updated.

Lorenzo

  reply	other threads:[~2019-06-18 13:36 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-17 17:39 [PATCH V5 00/27] Enable Tegra PCIe root port features Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 01/27] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 02/27] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 03/27] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 04/27] PCI: tegra: Mask AFI_INTR in runtime suspend Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 05/27] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 06/27] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 07/27] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 08/27] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 10/27] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 11/27] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 12/27] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 13/27] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 14/27] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 15/27] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 16/27] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 17/27] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 18/27] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 19/27] PCI: tegra: Change PRSNT_SENSE IRQ log to debug Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 20/27] PCI: tegra: Use legacy IRQ for port service drivers Manikanta Maddireddy
2019-06-18  5:47   ` Manikanta Maddireddy
2019-06-18 13:35     ` Lorenzo Pieralisi [this message]
2019-06-17 17:39 ` [PATCH V5 21/27] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 22/27] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 23/27] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 24/27] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 25/27] PCI: Add DT binding for "reset-gpios" property Manikanta Maddireddy
2019-06-17 17:39 ` [PATCH V5 26/27] PCI: tegra: Add support for GPIO based PERST# Manikanta Maddireddy
2019-06-18 10:51   ` Thierry Reding
2019-06-17 17:39 ` [PATCH V5 27/27] PCI: tegra: Change link retry log level to debug Manikanta Maddireddy

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