From: Xiaowei Bao <xiaowei.bao@nxp.com> To: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Cc: Xiaowei Bao <xiaowei.bao@nxp.com> Subject: [PATCH 04/10] dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a and ls2088a Date: Thu, 15 Aug 2019 16:37:10 +0800 Message-ID: <20190815083716.4715-4-xiaowei.bao@nxp.com> (raw) In-Reply-To: <20190815083716.4715-1-xiaowei.bao@nxp.com> Add compatible strings for ls1088a and ls2088a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- Documentation/devicetree/bindings/pci/layerscape-pci.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index e20ceaa..16f592e 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -22,7 +22,10 @@ Required properties: "fsl,ls1043a-pcie" "fsl,ls1012a-pcie" EP mode: - "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls-pcie-ep" + "fsl,ls1046a-pcie-ep" + "fsl,ls1088a-pcie-ep" + "fsl,ls2088a-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- 2.9.5
next prev parent reply index Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-15 8:37 [PATCH 01/10] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao 2019-08-15 8:37 ` [PATCH 02/10] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao 2019-08-15 11:53 ` Andrew Murray 2019-08-16 2:58 ` Xiaowei Bao 2019-08-16 10:20 ` Andrew Murray 2019-08-16 11:01 ` Xiaowei Bao 2019-08-16 10:49 ` Kishon Vijay Abraham I 2019-08-16 11:14 ` Xiaowei Bao 2019-08-15 8:37 ` [PATCH 03/10] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao 2019-08-15 8:37 ` Xiaowei Bao [this message] 2019-08-15 8:37 ` [PATCH 05/10] PCI: layerscape: Modify the way of getting capability with different PEX Xiaowei Bao 2019-08-15 12:51 ` Andrew Murray 2019-08-16 3:00 ` Xiaowei Bao 2019-08-16 10:25 ` Andrew Murray 2019-08-16 11:03 ` Xiaowei Bao 2019-08-15 8:37 ` [PATCH 06/10] PCI: layerscape: Modify the MSIX to the doorbell way Xiaowei Bao 2019-08-15 8:37 ` [PATCH 07/10] PCI: layerscape: Fix some format issue of the code Xiaowei Bao 2019-08-15 8:37 ` [PATCH 08/10] dt-bindings: PCI: Add the pf-offset property Xiaowei Bao 2019-08-27 16:26 ` Rob Herring 2019-08-15 8:37 ` [PATCH 09/10] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao 2019-08-15 8:37 ` [PATCH 10/10] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao 2019-08-15 11:31 ` [PATCH 01/10] PCI: designware-ep: Add multiple PFs support for DWC Andrew Murray 2019-08-16 2:55 ` Xiaowei Bao 2019-08-16 9:44 ` Andrew Murray 2019-08-16 11:00 ` Xiaowei Bao 2019-08-16 12:35 ` Andrew Murray 2019-08-16 15:11 ` Xiaowei Bao
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