* [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB
@ 2019-08-20 4:39 Srinath Mannam
2019-08-20 15:31 ` Scott Branden
2019-09-05 22:26 ` Bjorn Helgaas
0 siblings, 2 replies; 5+ messages in thread
From: Srinath Mannam @ 2019-08-20 4:39 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: bcm-kernel-feedback-list, linux-pci, linux-kernel, Abhinav Ratna,
Srinath Mannam
From: Abhinav Ratna <abhinav.ratna@broadcom.com>
IPROC PAXB RC doesn't support ACS capabilities and control registers.
Add quirk to have separate IOMMU groups for all EPs and functions connected
to root port, by masking RR/CR/SV/UF bits.
Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
---
drivers/pci/quirks.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 0f16acc..f9584c0 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
return acs_flags ? 0 : 1;
}
+static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
+{
+ /*
+ * IPROC PAXB RC doesn't support ACS capabilities and control registers.
+ * Add quirk to to have separate IOMMU groups for all EPs and functions
+ * connected to root port, by masking RR/CR/SV/UF bits.
+ */
+
+ u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
+ int ret = acs_flags & ~flags ? 0 : 1;
+
+ return ret;
+}
+
+
static const struct pci_dev_acs_enabled {
u16 vendor;
u16 device;
@@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
+ { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
{ 0 }
};
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB
2019-08-20 4:39 [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB Srinath Mannam
@ 2019-08-20 15:31 ` Scott Branden
2019-09-05 22:26 ` Bjorn Helgaas
1 sibling, 0 replies; 5+ messages in thread
From: Scott Branden @ 2019-08-20 15:31 UTC (permalink / raw)
To: Srinath Mannam, Bjorn Helgaas
Cc: bcm-kernel-feedback-list, linux-pci, linux-kernel, Abhinav Ratna
Looks good.
On 2019-08-19 9:39 p.m., Srinath Mannam wrote:
> From: Abhinav Ratna <abhinav.ratna@broadcom.com>
>
> IPROC PAXB RC doesn't support ACS capabilities and control registers.
> Add quirk to have separate IOMMU groups for all EPs and functions connected
> to root port, by masking RR/CR/SV/UF bits.
>
> Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
> ---
> drivers/pci/quirks.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 0f16acc..f9584c0 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> return acs_flags ? 0 : 1;
> }
>
> +static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> + /*
> + * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> + * Add quirk to to have separate IOMMU groups for all EPs and functions
> + * connected to root port, by masking RR/CR/SV/UF bits.
> + */
> +
> + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> + int ret = acs_flags & ~flags ? 0 : 1;
> +
> + return ret;
> +}
> +
> +
> static const struct pci_dev_acs_enabled {
> u16 vendor;
> u16 device;
> @@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> { 0 }
> };
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB
2019-08-20 4:39 [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB Srinath Mannam
2019-08-20 15:31 ` Scott Branden
@ 2019-09-05 22:26 ` Bjorn Helgaas
2019-09-05 22:41 ` Alex Williamson
2019-09-06 13:50 ` Srinath Mannam
1 sibling, 2 replies; 5+ messages in thread
From: Bjorn Helgaas @ 2019-09-05 22:26 UTC (permalink / raw)
To: Srinath Mannam
Cc: bcm-kernel-feedback-list, linux-pci, linux-kernel, Abhinav Ratna,
Alex Williamson
[+cc Alex]
On Tue, Aug 20, 2019 at 10:09:45AM +0530, Srinath Mannam wrote:
> From: Abhinav Ratna <abhinav.ratna@broadcom.com>
>
> IPROC PAXB RC doesn't support ACS capabilities and control registers.
> Add quirk to have separate IOMMU groups for all EPs and functions connected
> to root port, by masking RR/CR/SV/UF bits.
>
> Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
I tentatively applied this to pci/misc with Scott's ack for v5.4.
I tweaked the patch itself to follow the style of similar quirks
(interdiff is below, plus a diff of the commit log). Please make sure
I didn't break it.
I also went out on a limb and reworded the comment to give what I
*think* is the justification for this patch, as opposed to merely a
description of the code. I'm making a lot of assumptions there, so
please confirm that they're correct, or supply alternate justification
if they're not.
> ---
> drivers/pci/quirks.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 0f16acc..f9584c0 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> return acs_flags ? 0 : 1;
> }
>
> +static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> + /*
> + * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> + * Add quirk to to have separate IOMMU groups for all EPs and functions
> + * connected to root port, by masking RR/CR/SV/UF bits.
> + */
> +
> + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> + int ret = acs_flags & ~flags ? 0 : 1;
> +
> + return ret;
> +}
> +
> +
> static const struct pci_dev_acs_enabled {
> u16 vendor;
> u16 device;
> @@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> + { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> { 0 }
> };
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 77c0330ac922..2edbce35e8c5 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4466,21 +4466,19 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
return acs_flags ? 0 : 1;
}
-static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
+static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
{
/*
- * IPROC PAXB RC doesn't support ACS capabilities and control registers.
- * Add quirk to to have separate IOMMU groups for all EPs and functions
- * connected to root port, by masking RR/CR/SV/UF bits.
+ * iProc PAXB Root Ports don't advertise an ACS capability, but
+ * they do not allow peer-to-peer transactions between Root Ports.
+ * Allow each Root Port to be in a separate IOMMU group by masking
+ * SV/RR/CR/UF bits.
*/
+ acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
- u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
- int ret = acs_flags & ~flags ? 0 : 1;
-
- return ret;
+ return acs_flags ? 0 : 1;
}
-
static const struct pci_dev_acs_enabled {
u16 vendor;
u16 device;
@@ -4574,7 +4572,7 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
{ PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
- { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
+ { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
{ 0 }
};
@@ -1,49 +1,49 @@
-commit b50ae502eff0
+commit 46b2c32df7a4
Author: Abhinav Ratna <abhinav.ratna@broadcom.com>
Date: Tue Aug 20 10:09:45 2019 +0530
- PCI: Add PCIE ACS quirk for IPROC PAXB
+ PCI: Add ACS quirk for iProc PAXB
- IPROC PAXB RC doesn't support ACS capabilities and control registers.
- Add quirk to have separate IOMMU groups for all EPs and functions connected
- to root port, by masking RR/CR/SV/UF bits.
+ iProc PAXB Root Ports don't advertise an ACS capability, but they do not
+ allow peer-to-peer transactions between Root Ports. Add an ACS quirk so
+ each Root Port can be in a separate IOMMU group.
+ [bhelgaas: commit log, comment, use common implementation style]
Link: https://lore.kernel.org/r/1566275985-25670-1-git-send-email-srinath.mannam@broadcom.com
Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+ Acked-by: Scott Branden <scott.branden@broadcom.com>
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB
2019-09-05 22:26 ` Bjorn Helgaas
@ 2019-09-05 22:41 ` Alex Williamson
2019-09-06 13:50 ` Srinath Mannam
1 sibling, 0 replies; 5+ messages in thread
From: Alex Williamson @ 2019-09-05 22:41 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Srinath Mannam, bcm-kernel-feedback-list, linux-pci,
linux-kernel, Abhinav Ratna
On Thu, 5 Sep 2019 17:26:49 -0500
Bjorn Helgaas <helgaas@kernel.org> wrote:
> [+cc Alex]
>
> On Tue, Aug 20, 2019 at 10:09:45AM +0530, Srinath Mannam wrote:
> > From: Abhinav Ratna <abhinav.ratna@broadcom.com>
> >
> > IPROC PAXB RC doesn't support ACS capabilities and control registers.
> > Add quirk to have separate IOMMU groups for all EPs and functions connected
> > to root port, by masking RR/CR/SV/UF bits.
> >
> > Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> > Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
>
> I tentatively applied this to pci/misc with Scott's ack for v5.4.
>
> I tweaked the patch itself to follow the style of similar quirks
> (interdiff is below, plus a diff of the commit log). Please make sure
> I didn't break it.
>
> I also went out on a limb and reworded the comment to give what I
> *think* is the justification for this patch, as opposed to merely a
> description of the code. I'm making a lot of assumptions there, so
> please confirm that they're correct, or supply alternate justification
> if they're not.
Agreed, this really needs to be the vendor vouching for ACS equivalent
functionality, not simply splitting IOMMU groups because it's
inconvenient. Thanks,
Alex
>
> > ---
> > drivers/pci/quirks.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index 0f16acc..f9584c0 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> > return acs_flags ? 0 : 1;
> > }
> >
> > +static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> > +{
> > + /*
> > + * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> > + * Add quirk to to have separate IOMMU groups for all EPs and functions
> > + * connected to root port, by masking RR/CR/SV/UF bits.
> > + */
> > +
> > + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> > + int ret = acs_flags & ~flags ? 0 : 1;
> > +
> > + return ret;
> > +}
> > +
> > +
> > static const struct pci_dev_acs_enabled {
> > u16 vendor;
> > u16 device;
> > @@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
> > { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> > + { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> > { 0 }
> > };
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 77c0330ac922..2edbce35e8c5 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4466,21 +4466,19 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> return acs_flags ? 0 : 1;
> }
>
> -static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> +static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
> {
> /*
> - * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> - * Add quirk to to have separate IOMMU groups for all EPs and functions
> - * connected to root port, by masking RR/CR/SV/UF bits.
> + * iProc PAXB Root Ports don't advertise an ACS capability, but
> + * they do not allow peer-to-peer transactions between Root Ports.
> + * Allow each Root Port to be in a separate IOMMU group by masking
> + * SV/RR/CR/UF bits.
> */
> + acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
>
> - u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> - int ret = acs_flags & ~flags ? 0 : 1;
> -
> - return ret;
> + return acs_flags ? 0 : 1;
> }
>
> -
> static const struct pci_dev_acs_enabled {
> u16 vendor;
> u16 device;
> @@ -4574,7 +4572,7 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> - { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> + { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
> { 0 }
> };
>
>
>
>
> @@ -1,49 +1,49 @@
> -commit b50ae502eff0
> +commit 46b2c32df7a4
> Author: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Date: Tue Aug 20 10:09:45 2019 +0530
>
> - PCI: Add PCIE ACS quirk for IPROC PAXB
> + PCI: Add ACS quirk for iProc PAXB
>
> - IPROC PAXB RC doesn't support ACS capabilities and control registers.
> - Add quirk to have separate IOMMU groups for all EPs and functions connected
> - to root port, by masking RR/CR/SV/UF bits.
> + iProc PAXB Root Ports don't advertise an ACS capability, but they do not
> + allow peer-to-peer transactions between Root Ports. Add an ACS quirk so
> + each Root Port can be in a separate IOMMU group.
>
> + [bhelgaas: commit log, comment, use common implementation style]
> Link: https://lore.kernel.org/r/1566275985-25670-1-git-send-email-srinath.mannam@broadcom.com
> Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> + Acked-by: Scott Branden <scott.branden@broadcom.com>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB
2019-09-05 22:26 ` Bjorn Helgaas
2019-09-05 22:41 ` Alex Williamson
@ 2019-09-06 13:50 ` Srinath Mannam
1 sibling, 0 replies; 5+ messages in thread
From: Srinath Mannam @ 2019-09-06 13:50 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: BCM Kernel Feedback, linux-pci, Linux Kernel Mailing List,
Abhinav Ratna, Alex Williamson
Hi Bjorn,
Thank you for the improvements. With the changes, comments and commit
message exactly describes the purpose.
I tested the code changes and works fine.
Thanks again,
Srinath
On Fri, Sep 6, 2019 at 3:56 AM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> [+cc Alex]
>
> On Tue, Aug 20, 2019 at 10:09:45AM +0530, Srinath Mannam wrote:
> > From: Abhinav Ratna <abhinav.ratna@broadcom.com>
> >
> > IPROC PAXB RC doesn't support ACS capabilities and control registers.
> > Add quirk to have separate IOMMU groups for all EPs and functions connected
> > to root port, by masking RR/CR/SV/UF bits.
> >
> > Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> > Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
>
> I tentatively applied this to pci/misc with Scott's ack for v5.4.
>
> I tweaked the patch itself to follow the style of similar quirks
> (interdiff is below, plus a diff of the commit log). Please make sure
> I didn't break it.
>
> I also went out on a limb and reworded the comment to give what I
> *think* is the justification for this patch, as opposed to merely a
> description of the code. I'm making a lot of assumptions there, so
> please confirm that they're correct, or supply alternate justification
> if they're not.
>
> > ---
> > drivers/pci/quirks.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index 0f16acc..f9584c0 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -4466,6 +4466,21 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> > return acs_flags ? 0 : 1;
> > }
> >
> > +static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> > +{
> > + /*
> > + * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> > + * Add quirk to to have separate IOMMU groups for all EPs and functions
> > + * connected to root port, by masking RR/CR/SV/UF bits.
> > + */
> > +
> > + u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> > + int ret = acs_flags & ~flags ? 0 : 1;
> > +
> > + return ret;
> > +}
> > +
> > +
> > static const struct pci_dev_acs_enabled {
> > u16 vendor;
> > u16 device;
> > @@ -4559,6 +4574,7 @@ static const struct pci_dev_acs_enabled {
> > { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> > { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> > + { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> > { 0 }
> > };
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 77c0330ac922..2edbce35e8c5 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4466,21 +4466,19 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
> return acs_flags ? 0 : 1;
> }
>
> -static int pcie_quirk_brcm_bridge_acs(struct pci_dev *dev, u16 acs_flags)
> +static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
> {
> /*
> - * IPROC PAXB RC doesn't support ACS capabilities and control registers.
> - * Add quirk to to have separate IOMMU groups for all EPs and functions
> - * connected to root port, by masking RR/CR/SV/UF bits.
> + * iProc PAXB Root Ports don't advertise an ACS capability, but
> + * they do not allow peer-to-peer transactions between Root Ports.
> + * Allow each Root Port to be in a separate IOMMU group by masking
> + * SV/RR/CR/UF bits.
> */
> + acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
>
> - u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
> - int ret = acs_flags & ~flags ? 0 : 1;
> -
> - return ret;
> + return acs_flags ? 0 : 1;
> }
>
> -
> static const struct pci_dev_acs_enabled {
> u16 vendor;
> u16 device;
> @@ -4574,7 +4572,7 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
> { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
> - { PCI_VENDOR_ID_BROADCOM, 0xD714, pcie_quirk_brcm_bridge_acs },
> + { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
> { 0 }
> };
>
>
>
>
> @@ -1,49 +1,49 @@
> -commit b50ae502eff0
> +commit 46b2c32df7a4
> Author: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Date: Tue Aug 20 10:09:45 2019 +0530
>
> - PCI: Add PCIE ACS quirk for IPROC PAXB
> + PCI: Add ACS quirk for iProc PAXB
>
> - IPROC PAXB RC doesn't support ACS capabilities and control registers.
> - Add quirk to have separate IOMMU groups for all EPs and functions connected
> - to root port, by masking RR/CR/SV/UF bits.
> + iProc PAXB Root Ports don't advertise an ACS capability, but they do not
> + allow peer-to-peer transactions between Root Ports. Add an ACS quirk so
> + each Root Port can be in a separate IOMMU group.
>
> + [bhelgaas: commit log, comment, use common implementation style]
> Link: https://lore.kernel.org/r/1566275985-25670-1-git-send-email-srinath.mannam@broadcom.com
> Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
> Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> + Acked-by: Scott Branden <scott.branden@broadcom.com>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-09-06 13:50 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-20 4:39 [PATCH] PCI: Add PCIE ACS quirk for IPROC PAXB Srinath Mannam
2019-08-20 15:31 ` Scott Branden
2019-09-05 22:26 ` Bjorn Helgaas
2019-09-05 22:41 ` Alex Williamson
2019-09-06 13:50 ` Srinath Mannam
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).