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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Sriram Palanisamy <gpalan@codeaurora.org>,
	Ansuel Smith <ansuelsmth@gmail.com>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 12/12] pcie: qcom: Set PCIE MRRS and MPS to 256B
Date: Fri, 20 Mar 2020 19:34:54 +0100	[thread overview]
Message-ID: <20200320183455.21311-12-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20200320183455.21311-1-ansuelsmth@gmail.com>

From: Sriram Palanisamy <gpalan@codeaurora.org>

Set Max Read Request Size and Max Payload Size to 256 bytes,
per chip team recommendation.

Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 37 ++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 03130a3206b4..ad437c6f49a0 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -125,6 +125,14 @@
 
 #define PCIE20_LNK_CONTROL2_LINK_STATUS2        0xA0
 
+#define __set(v, a, b)	(((v) << (b)) & GENMASK(a, b))
+#define __mask(a, b)	(((1 << ((a) + 1)) - 1) & ~((1 << (b)) - 1))
+#define PCIE20_DEV_CAS			0x78
+#define PCIE20_MRRS_MASK		__mask(14, 12)
+#define PCIE20_MRRS(x)			__set(x, 14, 12)
+#define PCIE20_MPS_MASK			__mask(7, 5)
+#define PCIE20_MPS(x)			__set(x, 7, 5)
+
 #define DEVICE_TYPE_RC				0x4
 
 #define QCOM_PCIE_2_1_0_MAX_SUPPLY	3
@@ -1595,6 +1603,35 @@ static int qcom_pcie_probe(struct platform_device *pdev)
 	return ret;
 }
 
+static void qcom_pcie_fixup_final(struct pci_dev *pcidev)
+{
+	int cap, err;
+	u16 ctl, reg_val;
+
+	cap = pci_pcie_cap(pcidev);
+	if (!cap)
+		return;
+
+	err = pci_read_config_word(pcidev, cap + PCI_EXP_DEVCTL, &ctl);
+
+	if (err)
+		return;
+
+	reg_val = ctl;
+
+	if (((reg_val & PCIE20_MRRS_MASK) >> 12) > 1)
+		reg_val = (reg_val & ~(PCIE20_MRRS_MASK)) | PCIE20_MRRS(0x1);
+
+	if (((ctl & PCIE20_MPS_MASK) >> 5) > 1)
+		reg_val = (reg_val & ~(PCIE20_MPS_MASK)) | PCIE20_MPS(0x1);
+
+	err = pci_write_config_word(pcidev, cap + PCI_EXP_DEVCTL, reg_val);
+
+	if (err)
+		dev_err(&pcidev->dev, "pcie config write failed %d\n", err);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, qcom_pcie_fixup_final);
+
 static const struct of_device_id qcom_pcie_match[] = {
 	{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
 	{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
-- 
2.25.1


  parent reply	other threads:[~2020-03-20 18:35 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-20 18:34 [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Ansuel Smith
2020-03-20 18:34 ` [PATCH 02/12] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-03-31 17:30   ` Rob Herring
2020-03-20 18:34 ` [PATCH 03/12] pcie: qcom: change duplicate pci reset to phy reset Ansuel Smith
2020-03-20 18:34 ` [PATCH 04/12] pcie: qcom: Fixed pcie_phy_clk branch issue Ansuel Smith
2020-03-20 18:34 ` [PATCH 05/12] pcie: qcom: add missing reset for ipq806x Ansuel Smith
2020-03-20 18:51   ` Bjorn Helgaas
2020-03-23  6:06   ` Philipp Zabel
2020-03-20 18:34 ` [PATCH 06/12] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-03-31 17:31   ` Rob Herring
2020-03-20 18:34 ` [PATCH 07/12] pcie: qcom: add tx term offset support Ansuel Smith
2020-03-20 19:22   ` Bjorn Helgaas
2020-04-01 20:40   ` Bjorn Andersson
2020-04-01 21:55     ` R: " ansuelsmth
2020-04-01 23:52       ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie Ansuel Smith
2020-03-31 17:32   ` Rob Herring
2020-04-01 12:09     ` R: " ansuelsmth
2020-04-01 20:41   ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 09/12] pcie: qcom: Programming the PCIE iATU for IPQ806x Ansuel Smith
2020-03-20 19:26   ` Bjorn Helgaas
2020-04-01 13:21   ` Stanimir Varbanov
2020-03-20 18:34 ` [PATCH 10/12] pcie: qcom: add Force GEN1 support Ansuel Smith
2020-03-20 19:37   ` Bjorn Helgaas
2020-03-20 18:34 ` [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for qcom,pcie Ansuel Smith
2020-03-31 17:33   ` Rob Herring
2020-04-01 12:09     ` R: " ansuelsmth
2020-04-01 13:17   ` Stanimir Varbanov
2020-03-20 18:34 ` Ansuel Smith [this message]
2020-03-20 19:46   ` [PATCH 12/12] pcie: qcom: Set PCIE MRRS and MPS to 256B Bjorn Helgaas
2020-03-20 18:47 ` [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Bjorn Helgaas
2020-04-01 13:01 ` Stanimir Varbanov

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