From: Bjorn Helgaas <helgaas@kernel.org>
To: Dave Jiang <dave.jiang@intel.com>
Cc: vkoul@kernel.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com, gregkh@linuxfoundation.org,
arnd@arndb.de, linux-kernel@vger.kernel.org, x86@kernel.org,
dmaengine@vger.kernel.org, dan.j.williams@intel.com,
ashok.raj@intel.com, fenghua.yu@intel.com,
linux-pci@vger.kernel.org, tony.luck@intel.com,
jing.lin@intel.com, sanjay.k.kumar@intel.com
Subject: Re: [PATCH 2/6] device/pci: add cmdmem cap to pci_dev
Date: Tue, 31 Mar 2020 11:03:09 -0500 [thread overview]
Message-ID: <20200331160309.GA194762@google.com> (raw)
In-Reply-To: <158560362090.6059.1762280705382158736.stgit@djiang5-desk3.ch.intel.com>
On Mon, Mar 30, 2020 at 02:27:00PM -0700, Dave Jiang wrote:
> Since the current accelerator devices do not have standard PCIe capability
> enumeration for accepting ENQCMDS yet, for now an attribute of pdev->cmdmem has
> been added to struct pci_dev. Currently a PCI quirk must be used for the
> devices that have such cap until the PCI cap is standardized. Add a helper
> function to provide the check if a device supports the cmdmem capability.
>
> Such capability is expected to be added to PCIe device cap enumeration in
> the future.
This needs some sort of thumbnail description of what "synchronous
write notification" and "cmdmem" mean.
Do you have a pointer to a PCI-SIG ECR or similar?
Your window size seems to be 85 or so. It would be easier if you used
80 and wrapped the commit log to fit in 75 columns so it looks decent
when "git log" indents it by 4.
next prev parent reply other threads:[~2020-03-31 16:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 21:26 [PATCH 0/6] Add shared workqueue support for idxd driver Dave Jiang
2020-03-30 21:26 ` [PATCH 1/6] x86/asm: add iosubmit_cmds512_sync() based on enqcmds Dave Jiang
2020-03-30 21:27 ` [PATCH 2/6] device/pci: add cmdmem cap to pci_dev Dave Jiang
2020-03-31 10:04 ` Greg KH
2020-03-31 17:07 ` Dave Jiang
2020-03-31 17:24 ` Greg KH
2020-03-31 17:38 ` Dave Jiang
2020-03-31 16:03 ` Bjorn Helgaas [this message]
2020-03-31 21:44 ` Dave Jiang
2020-03-30 21:27 ` [PATCH 3/6] pci: add PCI quirk cmdmem fixup for Intel DSA device Dave Jiang
2020-03-31 15:59 ` Bjorn Helgaas
2020-03-31 18:02 ` Dave Jiang
2020-04-01 7:18 ` Christoph Hellwig
2020-04-02 2:20 ` Dan Williams
2020-04-02 7:39 ` Christoph Hellwig
2020-03-30 21:27 ` [PATCH 4/6] device: add cmdmem support for MMIO address Dave Jiang
2020-04-01 7:19 ` Christoph Hellwig
2020-03-30 21:27 ` [PATCH 5/6] dmaengine: idxd: add shared workqueue support Dave Jiang
2020-03-30 21:27 ` [PATCH 6/6] dmaengine: idxd: add ABI documentation for shared wq Dave Jiang
[not found] <d798a7eb-ceb0-d81e-5422-f9e41058a098@intel.com>
2020-03-31 22:00 ` [PATCH 2/6] device/pci: add cmdmem cap to pci_dev Bjorn Helgaas
2020-03-31 22:34 ` Thomas Gleixner
2020-04-01 16:37 ` Dave Jiang
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