From: Chuanjia Liu <chuanjia.liu@mediatek.com> To: Rob Herring <robh+dt@kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>, Matthias Brugger <matthias.bgg@gmail.com>, <linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <yong.wu@mediatek.com>, Frank Wunderlich <frank-w@public-files.de>, Ryder Lee <ryder.lee@mediatek.com>, <chuanjia.liu@mediatek.com> Subject: [PATCH v7 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base and irq Date: Thu, 29 Oct 2020 16:15:11 +0800 Message-ID: <20201029081513.10562-3-chuanjia.liu@mediatek.com> (raw) In-Reply-To: <20201029081513.10562-1-chuanjia.liu@mediatek.com> Add new method to get shared pcie-cfg base and pcie irq for new dts format. Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com> --- drivers/pci/controller/pcie-mediatek.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index cf4c18f0c25a..5b915eb0cf1e 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -14,6 +14,7 @@ #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/kernel.h> +#include <linux/mfd/syscon.h> #include <linux/msi.h> #include <linux/module.h> #include <linux/of_address.h> @@ -23,6 +24,7 @@ #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/regmap.h> #include <linux/reset.h> #include "../pci.h" @@ -205,6 +207,7 @@ struct mtk_pcie_port { * struct mtk_pcie - PCIe host information * @dev: pointer to PCIe device * @base: IO mapped register base + * @cfg: IO mapped register map for PCIe config * @free_ck: free-run reference clock * @mem: non-prefetchable memory resource * @ports: pointer to PCIe port information @@ -213,6 +216,7 @@ struct mtk_pcie_port { struct mtk_pcie { struct device *dev; void __iomem *base; + struct regmap *cfg; struct clk *free_ck; struct list_head ports; @@ -648,7 +652,11 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, return err; } - port->irq = platform_get_irq(pdev, port->slot); + if (of_find_property(dev->of_node, "interrupt-names", NULL)) + port->irq = platform_get_irq_byname(pdev, "pcie_irq"); + else + port->irq = platform_get_irq(pdev, port->slot); + if (port->irq < 0) return port->irq; @@ -680,6 +688,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) val |= PCIE_CSR_LTSSM_EN(port->slot) | PCIE_CSR_ASPM_L1_EN(port->slot); writel(val, pcie->base + PCIE_SYS_CFG_V2); + } else if (pcie->cfg) { + val = PCIE_CSR_LTSSM_EN(port->slot) | + PCIE_CSR_ASPM_L1_EN(port->slot); + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val); } /* Assert all reset signals */ @@ -983,6 +995,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) struct device *dev = pcie->dev; struct platform_device *pdev = to_platform_device(dev); struct resource *regs; + struct device_node *cfg_node; int err; /* get shared registers, which are optional */ @@ -995,6 +1008,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) } } + cfg_node = of_find_compatible_node(NULL, NULL, + "mediatek,generic-pciecfg"); + if (cfg_node) { + pcie->cfg = syscon_node_to_regmap(cfg_node); + if (IS_ERR(pcie->cfg)) + return PTR_ERR(pcie->cfg); + } + pcie->free_ck = devm_clk_get(dev, "free_ck"); if (IS_ERR(pcie->free_ck)) { if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) -- 2.18.0
next prev parent reply index Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-29 8:15 [PATCH v7 0/4] PCI: mediatek: Spilt PCIe node to comply with hardware design Chuanjia Liu 2020-10-29 8:15 ` [PATCH v7 1/4] dt-bindings: pci: mediatek: Modified the Device tree bindings Chuanjia Liu 2020-10-29 15:34 ` Rob Herring 2020-11-09 2:44 ` Chuanjia Liu 2020-11-02 16:19 ` Rob Herring 2020-11-09 2:48 ` Chuanjia Liu 2020-11-03 22:56 ` Bjorn Helgaas 2020-11-09 3:01 ` Chuanjia Liu 2020-10-29 8:15 ` Chuanjia Liu [this message] 2020-10-29 8:15 ` [PATCH v7 3/4] arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 Chuanjia Liu 2020-10-29 8:15 ` [PATCH v7 4/4] ARM: dts: mediatek: Modified MT7629 PCIe node Chuanjia Liu 2020-11-03 22:51 ` Bjorn Helgaas 2020-11-09 2:54 ` Chuanjia Liu
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