From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: joro@8bytes.org, will@kernel.org, lorenzo.pieralisi@arm.com,
robh+dt@kernel.org
Cc: guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net,
lenb@kernel.org, robin.murphy@arm.com, bhelgaas@google.com,
Jonathan.Cameron@huawei.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, devicetree@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org, baolu.lu@linux.intel.com,
zhangfei.gao@linaro.org, shameerali.kolothum.thodi@huawei.com,
vivek.gautam@arm.com,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Rob Herring <robh@kernel.org>
Subject: [PATCH v8 3/9] dt-bindings: document stall property for IOMMU masters
Date: Thu, 12 Nov 2020 13:55:15 +0100 [thread overview]
Message-ID: <20201112125519.3987595-4-jean-philippe@linaro.org> (raw)
In-Reply-To: <20201112125519.3987595-1-jean-philippe@linaro.org>
On ARM systems, some platform devices behind an IOMMU may support stall,
which is the ability to recover from page faults. Let the firmware tell us
when a device supports stall.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
.../devicetree/bindings/iommu/iommu.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/iommu.txt b/Documentation/devicetree/bindings/iommu/iommu.txt
index 3c36334e4f94..26ba9e530f13 100644
--- a/Documentation/devicetree/bindings/iommu/iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/iommu.txt
@@ -92,6 +92,24 @@ Optional properties:
tagging DMA transactions with an address space identifier. By default,
this is 0, which means that the device only has one address space.
+- dma-can-stall: When present, the master can wait for a transaction to
+ complete for an indefinite amount of time. Upon translation fault some
+ IOMMUs, instead of aborting the translation immediately, may first
+ notify the driver and keep the transaction in flight. This allows the OS
+ to inspect the fault and, for example, make physical pages resident
+ before updating the mappings and completing the transaction. Such IOMMU
+ accepts a limited number of simultaneous stalled transactions before
+ having to either put back-pressure on the master, or abort new faulting
+ transactions.
+
+ Firmware has to opt-in stalling, because most buses and masters don't
+ support it. In particular it isn't compatible with PCI, where
+ transactions have to complete before a time limit. More generally it
+ won't work in systems and masters that haven't been designed for
+ stalling. For example the OS, in order to handle a stalled transaction,
+ may attempt to retrieve pages from secondary storage in a stalled
+ domain, leading to a deadlock.
+
Notes:
======
--
2.29.1
next prev parent reply other threads:[~2020-11-12 13:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-12 12:55 [PATCH v8 0/9] iommu: I/O page faults for SMMUv3 Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 1/9] iommu: Add a page fault handler Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 2/9] iommu/arm-smmu-v3: Maintain a SID->device structure Jean-Philippe Brucker
2020-11-12 12:55 ` Jean-Philippe Brucker [this message]
2020-11-12 12:55 ` [PATCH v8 4/9] of/iommu: Support dma-can-stall property Jean-Philippe Brucker
2020-11-26 18:09 ` Robin Murphy
2020-12-14 12:51 ` Jean-Philippe Brucker
2020-12-18 6:47 ` Zhangfei Gao
2020-11-12 12:55 ` [PATCH v8 5/9] ACPI/IORT: Enable stall support for platform devices Jean-Philippe Brucker
2020-11-13 0:41 ` Hanjun Guo
2020-11-12 12:55 ` [PATCH v8 6/9] iommu/arm-smmu-v3: Add " Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 7/9] PCI/ATS: Add PRI stubs Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 8/9] PCI/ATS: Export PRI functions Jean-Philippe Brucker
2020-11-12 12:55 ` [PATCH v8 9/9] iommu/arm-smmu-v3: Add support for PRI Jean-Philippe Brucker
2020-12-03 6:52 ` [PATCH v8 0/9] iommu: I/O page faults for SMMUv3 Vivek Gautam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201112125519.3987595-4-jean-philippe@linaro.org \
--to=jean-philippe@linaro.org \
--cc=Jonathan.Cameron@huawei.com \
--cc=baolu.lu@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=eric.auger@redhat.com \
--cc=guohanjun@huawei.com \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=rjw@rjwysocki.net \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
--cc=robin.murphy@arm.com \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=sudeep.holla@arm.com \
--cc=vivek.gautam@arm.com \
--cc=will@kernel.org \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).