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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: agross@kernel.org, kishon@ti.com, vkoul@kernel.org,
	robh@kernel.org, svarbanov@mm-sol.com, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	mgautam@codeaurora.org, devicetree@vger.kernel.org,
	truong@codeaurora.org
Subject: Re: [PATCH v5 4/5] PCI: qcom: Add SM8250 SoC support
Date: Sat, 21 Nov 2020 22:12:08 -0600	[thread overview]
Message-ID: <20201122041208.GD95182@builder.lan> (raw)
In-Reply-To: <20201027170033.8475-5-manivannan.sadhasivam@linaro.org>

On Tue 27 Oct 12:00 CDT 2020, Manivannan Sadhasivam wrote:

> The PCIe IP (rev 1.9.0) on SM8250 SoC is similar to the one used on
> SDM845. Hence the support is added reusing the members of ops_2_7_0.
> The key difference between ops_2_7_0 and ops_1_9_0 is the config_sid
> callback, which will be added in successive commit.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index b4761640ffd9..0b180a19b0ea 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1361,6 +1361,16 @@ static const struct qcom_pcie_ops ops_2_7_0 = {
>  	.post_deinit = qcom_pcie_post_deinit_2_7_0,
>  };
>  
> +/* Qcom IP rev.: 1.9.0 */
> +static const struct qcom_pcie_ops ops_1_9_0 = {
> +	.get_resources = qcom_pcie_get_resources_2_7_0,
> +	.init = qcom_pcie_init_2_7_0,
> +	.deinit = qcom_pcie_deinit_2_7_0,
> +	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
> +	.post_init = qcom_pcie_post_init_2_7_0,
> +	.post_deinit = qcom_pcie_post_deinit_2_7_0,
> +};
> +
>  static const struct dw_pcie_ops dw_pcie_ops = {
>  	.link_up = qcom_pcie_link_up,
>  };
> @@ -1474,6 +1484,7 @@ static const struct of_device_id qcom_pcie_match[] = {
>  	{ .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 },
>  	{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
>  	{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
> +	{ .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 },
>  	{ }
>  };
>  
> -- 
> 2.17.1
> 

  reply	other threads:[~2020-11-22  4:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27 17:00 [PATCH v5 0/5] Add PCIe support for SM8250 SoC Manivannan Sadhasivam
2020-10-27 17:00 ` [PATCH v5 1/5] dt-bindings: phy: qcom,qmp: Add SM8250 PCIe PHY bindings Manivannan Sadhasivam
2020-11-16  5:58   ` Vinod Koul
2020-10-27 17:00 ` [PATCH v5 2/5] phy: qcom-qmp: Add SM8250 PCIe QMP PHYs Manivannan Sadhasivam
2020-11-16  5:58   ` Vinod Koul
2020-10-27 17:00 ` [PATCH v5 3/5] dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC Manivannan Sadhasivam
2020-11-22  4:10   ` Bjorn Andersson
2020-10-27 17:00 ` [PATCH v5 4/5] PCI: qcom: Add SM8250 SoC support Manivannan Sadhasivam
2020-11-22  4:12   ` Bjorn Andersson [this message]
2020-10-27 17:00 ` [PATCH v5 5/5] PCI: qcom: Add support for configuring BDF to SID mapping for SM8250 Manivannan Sadhasivam
2020-11-22  4:18   ` Bjorn Andersson
2020-12-08  9:47 ` [PATCH v5 0/5] Add PCIe support for SM8250 SoC Lorenzo Pieralisi
2020-12-08 10:45   ` Manivannan Sadhasivam
2020-12-08 11:40     ` Lorenzo Pieralisi
2020-12-08 12:01       ` Manivannan Sadhasivam

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