* [PATCH 0/2] Add PCIe EP to R-Car H3
@ 2020-11-24 5:42 Yuya Hamamachi
2020-11-24 5:42 ` [PATCH 1/2] dt-bindings: pci: rcar-pci-ep: Document r8a7795 Yuya Hamamachi
2020-11-24 5:42 ` [PATCH 2/2] arm64: dts: renesas: r8a77951: Add PCIe EP nodes Yuya Hamamachi
0 siblings, 2 replies; 3+ messages in thread
From: Yuya Hamamachi @ 2020-11-24 5:42 UTC (permalink / raw)
To: linux-pci, linux-renesas-soc, devicetree, linux-kernel; +Cc: Yuya Hamamachi
This patchset adds support for PCIe EP nodes to Renesas r8a77951 SoC.
This is based on patch series "Add PCIe EP to RZ/G2H [1]".
[1] https://lkml.org/lkml/2020/9/4/400
Yuya Hamamachi (2):
dt-bindings: pci: rcar-pci-ep: Document r8a7795
arm64: dts: renesas: r8a77951: Add PCIe EP nodes
.../devicetree/bindings/pci/rcar-pci-ep.yaml | 1 +
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 38 +++++++++++++++++++
2 files changed, 39 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] dt-bindings: pci: rcar-pci-ep: Document r8a7795
2020-11-24 5:42 [PATCH 0/2] Add PCIe EP to R-Car H3 Yuya Hamamachi
@ 2020-11-24 5:42 ` Yuya Hamamachi
2020-11-24 5:42 ` [PATCH 2/2] arm64: dts: renesas: r8a77951: Add PCIe EP nodes Yuya Hamamachi
1 sibling, 0 replies; 3+ messages in thread
From: Yuya Hamamachi @ 2020-11-24 5:42 UTC (permalink / raw)
To: linux-pci, linux-renesas-soc, devicetree, linux-kernel; +Cc: Yuya Hamamachi
Document the support for R-Car PCIe EP on R8A7795 SoC device.
Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
---
Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
index 84eeb7fe6e01..fb97f4ea0e63 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml
@@ -19,6 +19,7 @@ properties:
- renesas,r8a774b1-pcie-ep # RZ/G2N
- renesas,r8a774c0-pcie-ep # RZ/G2E
- renesas,r8a774e1-pcie-ep # RZ/G2H
+ - renesas,r8a7795-pcie-ep # R-Car H3
- const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
reg:
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] arm64: dts: renesas: r8a77951: Add PCIe EP nodes
2020-11-24 5:42 [PATCH 0/2] Add PCIe EP to R-Car H3 Yuya Hamamachi
2020-11-24 5:42 ` [PATCH 1/2] dt-bindings: pci: rcar-pci-ep: Document r8a7795 Yuya Hamamachi
@ 2020-11-24 5:42 ` Yuya Hamamachi
1 sibling, 0 replies; 3+ messages in thread
From: Yuya Hamamachi @ 2020-11-24 5:42 UTC (permalink / raw)
To: linux-pci, linux-renesas-soc, devicetree, linux-kernel; +Cc: Yuya Hamamachi
Add PCIe EP nodes for R8A77951 SoC dtsi.
Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
---
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 38 +++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 644308dd886c..9d60bcf69e4f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -2727,6 +2727,44 @@ pciec1: pcie@ee800000 {
status = "disabled";
};
+ pciec0_ep: pcie-ep@fe000000 {
+ compatible = "renesas,r8a7795-pcie-ep",
+ "renesas,rcar-gen3-pcie-ep";
+ reg = <0x0 0xfe000000 0 0x80000>,
+ <0x0 0xfe100000 0 0x100000>,
+ <0x0 0xfe200000 0 0x200000>,
+ <0x0 0x30000000 0 0x8000000>,
+ <0x0 0x38000000 0 0x8000000>;
+ reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>;
+ clock-names = "pcie";
+ resets = <&cpg 319>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pciec1_ep: pcie-ep@ee800000 {
+ compatible = "renesas,r8a7795-pcie-ep",
+ "renesas,rcar-gen3-pcie-ep";
+ reg = <0x0 0xee800000 0 0x80000>,
+ <0x0 0xee900000 0 0x100000>,
+ <0x0 0xeea00000 0 0x200000>,
+ <0x0 0xc0000000 0 0x8000000>,
+ <0x0 0xc8000000 0 0x8000000>;
+ reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>;
+ clock-names = "pcie";
+ resets = <&cpg 318>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
imr-lx4@fe860000 {
compatible = "renesas,r8a7795-imr-lx4",
"renesas,imr-lx4";
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-11-24 5:54 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-24 5:42 [PATCH 0/2] Add PCIe EP to R-Car H3 Yuya Hamamachi
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2020-11-24 5:42 ` [PATCH 2/2] arm64: dts: renesas: r8a77951: Add PCIe EP nodes Yuya Hamamachi
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