* [PATCH 1/3] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250
2020-12-08 0:46 [PATCH 0/3] Fixup PCIe support on sm8250 Dmitry Baryshkov
@ 2020-12-08 0:46 ` Dmitry Baryshkov
2020-12-10 3:55 ` Rob Herring
2020-12-08 0:46 ` [PATCH 2/3] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov
2020-12-08 0:46 ` [PATCH 3/3] arm64: dts: qcom: sm8250: add ddrss_sf_tbu clock to PCIe device nodes Dmitry Baryshkov
2 siblings, 1 reply; 5+ messages in thread
From: Dmitry Baryshkov @ 2020-12-08 0:46 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Bjorn Helgaas, Rob Herring,
Stanimir Varbanov, Lorenzo Pieralisi, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-pci
On SM8250 additional clock is required for PCIe devices to access NOC.
Document this clock in devicetree bindings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 3b55310390a0..c87806f76a43 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -142,6 +142,7 @@
- "bus_slave" Slave AXI clock
- "slave_q2a" Slave Q2A clock
- "tbu" PCIe TBU clock
+ - "ddrss_sf_tbu" PCIe SF TBU clock, required on sm8250
- "pipe" PIPE clock
- resets:
--
2.29.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] PCI: qcom: add support for ddrss_sf_tbu clock
2020-12-08 0:46 [PATCH 0/3] Fixup PCIe support on sm8250 Dmitry Baryshkov
2020-12-08 0:46 ` [PATCH 1/3] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Dmitry Baryshkov
@ 2020-12-08 0:46 ` Dmitry Baryshkov
2020-12-08 0:46 ` [PATCH 3/3] arm64: dts: qcom: sm8250: add ddrss_sf_tbu clock to PCIe device nodes Dmitry Baryshkov
2 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2020-12-08 0:46 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Bjorn Helgaas, Rob Herring,
Stanimir Varbanov, Lorenzo Pieralisi, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-pci
On SM8250 additional clock is required for PCIe devices to access NOC.
Update PCIe controller driver to control this clock.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/pci/controller/dwc/pcie-qcom.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index e45a43148f56..67712ea48d5f 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -159,8 +159,9 @@ struct qcom_pcie_resources_2_3_3 {
struct reset_control *rst[7];
};
+#define QCOM_PCIE_2_7_0_MAX_CLOCKS 6
struct qcom_pcie_resources_2_7_0 {
- struct clk_bulk_data clks[6];
+ struct clk_bulk_data clks[QCOM_PCIE_2_7_0_MAX_CLOCKS + 1]; /* + 1 for sf_tbu */
struct regulator_bulk_data supplies[2];
struct reset_control *pci_reset;
struct clk *pipe_clk;
@@ -1167,10 +1168,15 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
res->clks[4].id = "slave_q2a";
res->clks[5].id = "tbu";
- ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
+ ret = devm_clk_bulk_get(dev, QCOM_PCIE_2_7_0_MAX_CLOCKS, res->clks);
if (ret < 0)
return ret;
+ /* Optional clock for SM8250 */
+ res->clks[6].clk = devm_clk_get_optional(dev, "ddrss_sf_tbu");
+ if (IS_ERR(res->clks[6].clk))
+ return PTR_ERR(res->clks[6].clk);
+
res->pipe_clk = devm_clk_get(dev, "pipe");
return PTR_ERR_OR_ZERO(res->pipe_clk);
}
--
2.29.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: sm8250: add ddrss_sf_tbu clock to PCIe device nodes
2020-12-08 0:46 [PATCH 0/3] Fixup PCIe support on sm8250 Dmitry Baryshkov
2020-12-08 0:46 ` [PATCH 1/3] dt-bindings: pci: qcom: Document ddrss_sf_tbu clock for sm8250 Dmitry Baryshkov
2020-12-08 0:46 ` [PATCH 2/3] PCI: qcom: add support for ddrss_sf_tbu clock Dmitry Baryshkov
@ 2020-12-08 0:46 ` Dmitry Baryshkov
2 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2020-12-08 0:46 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Bjorn Helgaas, Rob Herring,
Stanimir Varbanov, Lorenzo Pieralisi, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-pci
On SM8250 additional clock is required for PCIe devices to access NOC.
Add this clock to PCIe devices nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index deed186b1a84..4a6e11e78b35 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1345,14 +1345,16 @@ pcie0: pci@1c00000 {
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+ <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+ <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
- "tbu";
+ "tbu",
+ "ddrss_sf_tbu";
iommus = <&apps_smmu 0x1c00 0x7f>;
iommu-map = <0x0 &apps_smmu 0x1c00 0x1>,
@@ -1437,7 +1439,8 @@ pcie1: pci@1c08000 {
<&gcc GCC_PCIE_1_SLV_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_WIGIG_CLKREF_EN>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+ <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+ <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>;
clock-names = "pipe",
"aux",
"cfg",
@@ -1445,7 +1448,8 @@ pcie1: pci@1c08000 {
"bus_slave",
"slave_q2a",
"ref",
- "tbu";
+ "tbu",
+ "ddrss_sf_tbu";
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
assigned-clock-rates = <19200000>;
@@ -1535,7 +1539,8 @@ pcie2: pci@1c10000 {
<&gcc GCC_PCIE_2_SLV_AXI_CLK>,
<&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_MDM_CLKREF_EN>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+ <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+ <&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>;
clock-names = "pipe",
"aux",
"cfg",
@@ -1543,7 +1548,8 @@ pcie2: pci@1c10000 {
"bus_slave",
"slave_q2a",
"ref",
- "tbu";
+ "tbu",
+ "ddrss_sf_tbu";
assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>;
assigned-clock-rates = <19200000>;
--
2.29.2
^ permalink raw reply related [flat|nested] 5+ messages in thread