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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	PCI <linux-pci@vger.kernel.org>,
	devicetree@vger.kernel.org, Mark Gross <mgross@linux.intel.com>,
	"Raja Subramanian,
	Lakshmi Bai"  <lakshmi.bai.raja.subramanian@intel.com>
Subject: Re: [PATCH v3 2/2] PCI: keembay: Add support for Intel Keem Bay
Date: Mon, 14 Dec 2020 17:34:54 +0200	[thread overview]
Message-ID: <20201214153454.GJ4077@smile.fi.intel.com> (raw)
In-Reply-To: <CAL_JsqJA4Sx93rF_o+V-gPSHwuyAyf-aT96XpN-UCc3ayjDH+w@mail.gmail.com>

On Thu, Dec 10, 2020 at 11:46:48AM -0600, Rob Herring wrote:
> On Wed, Dec 9, 2020 at 12:41 PM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> > On Wed, Dec 09, 2020 at 12:13:50PM -0600, Rob Herring wrote:
> > > On Wed, Dec 02, 2020 at 03:31:56PM +0800, Wan Ahmad Zainie wrote:

...

> > > > +   struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > > > +
> > > > +   switch (type) {
> > > > +   case PCI_EPC_IRQ_LEGACY:
> > > > +           /* Legacy interrupts are not supported in Keem Bay */
> > > > +           dev_err(pci->dev, "Legacy IRQ is not supported\n");
> > > > +           return -EINVAL;
> > > > +   case PCI_EPC_IRQ_MSI:
> > > > +           return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
> > > > +   case PCI_EPC_IRQ_MSIX:
> > > > +           return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
> > > > +   default:
> > > > +           dev_err(pci->dev, "Unknown IRQ type %d\n", type);
> > > > +           return -EINVAL;
> > > > +   }
> > >
> > > Doesn't the lack of a 'return' give a warning?
> >
> > Where? I don't see any lack of return.
> 
> Is the compiler smart enough to recognize that with a return in every
> 'case' that we don't need a return after the switch? I wouldn't have
> thought so, but I haven't checked.

Dunno what happen with -O0, but with -O2 we certainly have no issues with above
code. (And for the record there are plenty examples of the same over the kernel)

-- 
With Best Regards,
Andy Shevchenko



      parent reply	other threads:[~2020-12-14 15:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-02  7:31 [PATCH v3 0/2] PCI: keembay: Add support for Intel Keem Bay Wan Ahmad Zainie
2020-12-02  7:31 ` [PATCH v3 1/2] dt-bindings: PCI: Add Intel Keem Bay PCIe controller Wan Ahmad Zainie
2020-12-09 18:15   ` Rob Herring
2020-12-02  7:31 ` [PATCH v3 2/2] PCI: keembay: Add support for Intel Keem Bay Wan Ahmad Zainie
2020-12-09 18:13   ` Rob Herring
2020-12-09 18:42     ` Andy Shevchenko
2020-12-10 17:46       ` Rob Herring
2020-12-14 13:03         ` Wan Mohamad, Wan Ahmad Zainie
2020-12-14 15:00           ` Rob Herring
2020-12-14 15:34         ` Andy Shevchenko [this message]

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