From: Simon Xue <xxm@rock-chips.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
Shawn Lin <shawn.lin@rock-chips.com>,
Simon Xue <xxm@rock-chips.com>
Subject: [PATCH 1/3] PCI: dwc: Skip allocating own MSI domain if using external MSI domain
Date: Mon, 18 Jan 2021 17:17:37 +0800 [thread overview]
Message-ID: <20210118091739.247040-1-xxm@rock-chips.com> (raw)
From: Shawn Lin <shawn.lin@rock-chips.com>
On some platform, external MSI domain is using instead of the one
created by designware driver. For instance, if using GIC-V3-ITS
as a MSI domain, we only need set msi-map in the devicetree but
never need any bit in the designware driver to handle MSI stuff.
So skip allocating its own MSI domain for that case.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 10 +++++++++-
drivers/pci/controller/dwc/pcie-designware.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 8a84c005f32b..d9d93cab970a 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -235,6 +235,10 @@ int dw_pcie_allocate_domains(struct pcie_port *pp)
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct fwnode_handle *fwnode = of_node_to_fwnode(pci->dev->of_node);
+ /* Rely on the external MSI domain */
+ if (pp->msi_ext)
+ return 0;
+
pp->irq_domain = irq_domain_create_linear(fwnode, pp->num_vectors,
&dw_pcie_msi_domain_ops, pp);
if (!pp->irq_domain) {
@@ -258,6 +262,9 @@ int dw_pcie_allocate_domains(struct pcie_port *pp)
static void dw_pcie_free_msi(struct pcie_port *pp)
{
+ if (pp->msi_ext)
+ return;
+
if (pp->msi_irq) {
irq_set_chained_handler(pp->msi_irq, NULL);
irq_set_handler_data(pp->msi_irq, NULL);
@@ -359,7 +366,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
if (pci->link_gen < 1)
pci->link_gen = of_pci_get_max_link_speed(np);
- if (pci_msi_enabled()) {
+ if (pci_msi_enabled() &&
+ !pp->msi_ext) {
pp->has_msi_ctrl = !(pp->ops->msi_host_init ||
of_property_read_bool(np, "msi-parent") ||
of_property_read_bool(np, "msi-map"));
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 0207840756c4..cf3b0664302a 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -195,6 +195,7 @@ struct pcie_port {
u32 irq_mask[MAX_MSI_CTRLS];
struct pci_host_bridge *bridge;
raw_spinlock_t lock;
+ int msi_ext;
DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
};
--
2.25.1
next reply other threads:[~2021-01-18 10:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-18 9:17 Simon Xue [this message]
2021-01-18 9:17 ` [PATCH 2/3] dt-bindings: rockchip: Add DesignWare based PCIe controller Simon Xue
2021-01-19 13:07 ` Johan Jonker
2021-01-19 13:14 ` Heiko Stübner
2021-01-19 15:11 ` Johan Jonker
2021-01-19 18:40 ` Robin Murphy
2021-01-20 14:16 ` Rob Herring
2021-01-20 14:54 ` Heiko Stübner
2021-01-20 16:20 ` Robin Murphy
2021-01-19 19:58 ` Robin Murphy
2021-01-20 10:06 ` xxm
2021-01-18 9:17 ` [PATCH 3/3] PCI: rockchip: add " Simon Xue
2021-01-19 20:28 ` Robin Murphy
2021-01-20 1:58 ` xxm
2021-01-19 19:47 ` [PATCH 1/3] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Robin Murphy
2021-01-20 1:53 ` xxm
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