From: Nadeem Athani <nadeem@cadence.com>
To: <tjoseph@cadence.com>, <lorenzo.pieralisi@arm.com>,
<robh@kernel.org>, <bhelgaas@google.com>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kishon@ti.com>
Cc: <nadeem@cadence.com>, <mparab@cadence.com>,
<sjakhade@cadence.com>, <pthombar@cadence.com>
Subject: [PATCH v8 1/2] PCI: cadence: Shifting of a function to support new code.
Date: Tue, 9 Feb 2021 15:46:21 +0100 [thread overview]
Message-ID: <20210209144622.26683-2-nadeem@cadence.com> (raw)
In-Reply-To: <20210209144622.26683-1-nadeem@cadence.com>
Moving the function cdns_pcie_host_wait_for_link() further up in the file,
as it's going to be used by upcoming additional code in the driver.
Signed-off-by: Nadeem Athani <nadeem@cadence.com>
---
drivers/pci/controller/cadence/pcie-cadence-host.c | 33 +++++++++++-----------
1 file changed, 16 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c
index 811c1cb2e8de..9f7aa718c8d4 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-host.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-host.c
@@ -77,6 +77,22 @@ static struct pci_ops cdns_pcie_host_ops = {
.write = pci_generic_config_write,
};
+static int cdns_pcie_host_wait_for_link(struct cdns_pcie *pcie)
+{
+ struct device *dev = pcie->dev;
+ int retries;
+
+ /* Check if the link is up or not */
+ for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
+ if (cdns_pcie_link_up(pcie)) {
+ dev_info(dev, "Link up\n");
+ return 0;
+ }
+ usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
+ }
+
+ return -ETIMEDOUT;
+}
static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
{
@@ -398,23 +414,6 @@ static int cdns_pcie_host_init(struct device *dev,
return cdns_pcie_host_init_address_translation(rc);
}
-static int cdns_pcie_host_wait_for_link(struct cdns_pcie *pcie)
-{
- struct device *dev = pcie->dev;
- int retries;
-
- /* Check if the link is up or not */
- for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
- if (cdns_pcie_link_up(pcie)) {
- dev_info(dev, "Link up\n");
- return 0;
- }
- usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
- }
-
- return -ETIMEDOUT;
-}
-
int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
{
struct device *dev = rc->pcie.dev;
--
2.15.0
next prev parent reply other threads:[~2021-02-09 14:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 14:46 [PATCH v8 0/2] PCI: cadence: Retrain Link to work around Gen2 Nadeem Athani
2021-02-09 14:46 ` Nadeem Athani [this message]
2021-02-09 14:46 ` [PATCH v8 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect Nadeem Athani
2021-02-10 12:52 ` [PATCH v8 0/2] PCI: cadence: Retrain Link to work around Gen2 Lorenzo Pieralisi
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