* [PATCH v3 0/4] AM64: Add PCIe bindings and driver support
@ 2021-02-22 11:40 Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector Kishon Vijay Abraham I
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Kishon Vijay Abraham I @ 2021-02-22 11:40 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring, Tom Joseph,
Lorenzo Pieralisi
Cc: linux-pci, devicetree, linux-kernel, linux-arm-kernel
AM64 uses the same PCIe controller as in J7200, however AM642 EVM
doesn't have a clock generator (unlike J7200 base board). Here
the clock from the SERDES has to be routed to the PCIE connector.
This series provides an option for the pci-j721e.c driver to
drive reference clock output to the connector.
v1 of the patch series can be found @ [1]
v2 of the patch series can be found @ [2]
Changes from v2:
*) Fix DT binding documentation suggested by Rob
Changes from v1:
*) Fixed missing initialization of "ret" variable in the error path.
[1] -> http://lore.kernel.org/r/20201224115658.2795-1-kishon@ti.com
[2] -> https://lore.kernel.org/r/20210104124103.30930-1-kishon@ti.com
Kishon Vijay Abraham I (4):
dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the
connector
dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64
SoC
dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's
AM64 SoC
PCI: j721e: Add support to provide refclk to PCIe connector
.../bindings/pci/ti,j721e-pci-ep.yaml | 9 ++++----
.../bindings/pci/ti,j721e-pci-host.yaml | 19 +++++++++++------
drivers/pci/controller/cadence/pci-j721e.c | 21 ++++++++++++++++++-
3 files changed, 38 insertions(+), 11 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
2021-02-22 11:40 [PATCH v3 0/4] AM64: Add PCIe bindings and driver support Kishon Vijay Abraham I
@ 2021-02-22 11:40 ` Kishon Vijay Abraham I
2021-02-22 17:29 ` Krzysztof Wilczyński
2021-02-22 11:40 ` [PATCH v3 2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC Kishon Vijay Abraham I
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Kishon Vijay Abraham I @ 2021-02-22 11:40 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring, Tom Joseph,
Lorenzo Pieralisi
Cc: linux-pci, devicetree, linux-kernel, linux-arm-kernel
Add binding to represent refclk to the PCIe connector.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index 0880a613ece6..50dc99ac35d9 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -46,12 +46,16 @@ properties:
maxItems: 1
clocks:
- maxItems: 1
- description: clock-specifier to represent input to the PCIe
+ minItems: 1
+ maxItems: 2
+ description: clock-specifier to represent input to the PCIe for 1 item.
+ 2nd item if present represents reference clock to the connector.
clock-names:
+ minItems: 1
items:
- const: fck
+ - const: pcie_refclk
vendor-id:
const: 0x104c
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
2021-02-22 11:40 [PATCH v3 0/4] AM64: Add PCIe bindings and driver support Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector Kishon Vijay Abraham I
@ 2021-02-22 11:40 ` Kishon Vijay Abraham I
2021-03-05 23:28 ` [PATCH v3 2/4] dt-bindings: PCI: ti, j721e: " Rob Herring
2021-02-22 11:40 ` [PATCH v3 3/4] dt-bindings: PCI: ti,j721e: Add endpoint " Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector Kishon Vijay Abraham I
3 siblings, 1 reply; 9+ messages in thread
From: Kishon Vijay Abraham I @ 2021-02-22 11:40 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring, Tom Joseph,
Lorenzo Pieralisi
Cc: linux-pci, devicetree, linux-kernel, linux-arm-kernel
Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in
J7200, however AM64 is a non-coherent architecture.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index 50dc99ac35d9..05aeb1aa362a 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -16,12 +16,14 @@ allOf:
properties:
compatible:
oneOf:
- - description: PCIe controller in J7200
+ - const: ti,j721e-pcie-host
+ - description: PCIe controller in AM64
items:
- - const: ti,j7200-pcie-host
+ - const: ti,am64-pcie-host
- const: ti,j721e-pcie-host
- - description: PCIe controller in J721E
+ - description: PCIe controller in J7200
items:
+ - const: ti,j7200-pcie-host
- const: ti,j721e-pcie-host
reg:
@@ -66,6 +68,8 @@ properties:
- const: 0xb00d
- items:
- const: 0xb00f
+ - items:
+ - const: 0xb010
msi-map: true
@@ -82,7 +86,6 @@ required:
- vendor-id
- device-id
- msi-map
- - dma-coherent
- dma-ranges
- ranges
- reset-gpios
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 3/4] dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
2021-02-22 11:40 [PATCH v3 0/4] AM64: Add PCIe bindings and driver support Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC Kishon Vijay Abraham I
@ 2021-02-22 11:40 ` Kishon Vijay Abraham I
2021-03-05 23:29 ` [PATCH v3 3/4] dt-bindings: PCI: ti, j721e: " Rob Herring
2021-02-22 11:40 ` [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector Kishon Vijay Abraham I
3 siblings, 1 reply; 9+ messages in thread
From: Kishon Vijay Abraham I @ 2021-02-22 11:40 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring, Tom Joseph,
Lorenzo Pieralisi
Cc: linux-pci, devicetree, linux-kernel, linux-arm-kernel
Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP
used in J7200, however AM64 is a non-coherent architecture.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
index d06f0c4464c6..aed437dac363 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
@@ -16,12 +16,14 @@ allOf:
properties:
compatible:
oneOf:
- - description: PCIe EP controller in J7200
+ - const: ti,j721e-pcie-ep
+ - description: PCIe EP controller in AM64
items:
- - const: ti,j7200-pcie-ep
+ - const: ti,am64-pcie-ep
- const: ti,j721e-pcie-ep
- - description: PCIe EP controller in J721E
+ - description: PCIe EP controller in J7200
items:
+ - const: ti,j7200-pcie-ep
- const: ti,j721e-pcie-ep
reg:
@@ -66,7 +68,6 @@ required:
- power-domains
- clocks
- clock-names
- - dma-coherent
- max-functions
- phys
- phy-names
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector
2021-02-22 11:40 [PATCH v3 0/4] AM64: Add PCIe bindings and driver support Kishon Vijay Abraham I
` (2 preceding siblings ...)
2021-02-22 11:40 ` [PATCH v3 3/4] dt-bindings: PCI: ti,j721e: Add endpoint " Kishon Vijay Abraham I
@ 2021-02-22 11:40 ` Kishon Vijay Abraham I
2021-02-23 7:50 ` Dan Carpenter
3 siblings, 1 reply; 9+ messages in thread
From: Kishon Vijay Abraham I @ 2021-02-22 11:40 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring, Tom Joseph,
Lorenzo Pieralisi
Cc: linux-pci, devicetree, linux-kernel, linux-arm-kernel
Add support to provide refclk to PCIe connector.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/pci/controller/cadence/pci-j721e.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index dac1ac8a7615..f99af98ab7d1 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -6,6 +6,7 @@
* Author: Kishon Vijay Abraham I <kishon@ti.com>
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/io.h>
@@ -50,6 +51,7 @@ enum link_status {
struct j721e_pcie {
struct device *dev;
+ struct clk *refclk;
u32 mode;
u32 num_lanes;
struct cdns_pcie *cdns_pcie;
@@ -310,6 +312,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)
struct cdns_pcie_ep *ep;
struct gpio_desc *gpiod;
void __iomem *base;
+ struct clk *clk;
u32 num_lanes;
u32 mode;
int ret;
@@ -408,6 +411,19 @@ static int j721e_pcie_probe(struct platform_device *pdev)
goto err_get_sync;
}
+ clk = devm_clk_get_optional(dev, "pcie_refclk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "failed to get pcie_refclk\n");
+ goto err_pcie_setup;
+ }
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(dev, "failed to enable pcie_refclk\n");
+ goto err_get_sync;
+ }
+ pcie->refclk = clk;
+
/*
* "Power Sequencing and Reset Signal Timings" table in
* PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
@@ -422,8 +438,10 @@ static int j721e_pcie_probe(struct platform_device *pdev)
}
ret = cdns_pcie_host_setup(rc);
- if (ret < 0)
+ if (ret < 0) {
+ clk_disable_unprepare(pcie->refclk);
goto err_pcie_setup;
+ }
break;
case PCI_MODE_EP:
@@ -476,6 +494,7 @@ static int j721e_pcie_remove(struct platform_device *pdev)
struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;
struct device *dev = &pdev->dev;
+ clk_disable_unprepare(pcie->refclk);
cdns_pcie_disable_phy(cdns_pcie);
pm_runtime_put(dev);
pm_runtime_disable(dev);
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
2021-02-22 11:40 ` [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector Kishon Vijay Abraham I
@ 2021-02-22 17:29 ` Krzysztof Wilczyński
0 siblings, 0 replies; 9+ messages in thread
From: Krzysztof Wilczyński @ 2021-02-22 17:29 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: Bjorn Helgaas, Rob Herring, Tom Joseph, Lorenzo Pieralisi,
linux-pci, devicetree, linux-kernel, linux-arm-kernel
Hi Kishon,
[...]
> clocks:
> - maxItems: 1
> - description: clock-specifier to represent input to the PCIe
> + minItems: 1
> + maxItems: 2
> + description: clock-specifier to represent input to the PCIe for 1 item.
> + 2nd item if present represents reference clock to the connector.
[...]
I am not an expert on device trees, but what do you think of making this
description to be as follows:
description: |+
clock-specifier to represent input to the PCIe for 1 item.
2nd item if present represents reference clock to the connector.
What do you think?
Krzysztof
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector
2021-02-22 11:40 ` [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector Kishon Vijay Abraham I
@ 2021-02-23 7:50 ` Dan Carpenter
0 siblings, 0 replies; 9+ messages in thread
From: Dan Carpenter @ 2021-02-23 7:50 UTC (permalink / raw)
To: kbuild, Kishon Vijay Abraham I, Bjorn Helgaas, Rob Herring,
Tom Joseph, Lorenzo Pieralisi
Cc: lkp, kbuild-all, linux-pci, devicetree, linux-kernel, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 15402 bytes --]
Hi Kishon,
url: https://github.com/0day-ci/linux/commits/Kishon-Vijay-Abraham-I/AM64-Add-PCIe-bindings-and-driver-support/20210222-194422
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: i386-randconfig-m021-20210222 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/pci/controller/cadence/pci-j721e.c:420 j721e_pcie_probe() warn: missing error code 'ret'
vim +/ret +420 drivers/pci/controller/cadence/pci-j721e.c
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 305 static int j721e_pcie_probe(struct platform_device *pdev)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 306 {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 307 struct device *dev = &pdev->dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 308 struct device_node *node = dev->of_node;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 309 struct pci_host_bridge *bridge;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 310 struct j721e_pcie_data *data;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 311 struct cdns_pcie *cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 312 struct j721e_pcie *pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 313 struct cdns_pcie_rc *rc;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 314 struct cdns_pcie_ep *ep;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 315 struct gpio_desc *gpiod;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 316 void __iomem *base;
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 317 struct clk *clk;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 318 u32 num_lanes;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 319 u32 mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 320 int ret;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 321 int irq;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 322
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 323 data = (struct j721e_pcie_data *)of_device_get_match_data(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 324 if (!data)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 325 return -EINVAL;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 326
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 327 mode = (u32)data->mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 328
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 329 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 330 if (!pcie)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 331 return -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 332
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 333 pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 334 pcie->mode = mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 335
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 336 base = devm_platform_ioremap_resource_byname(pdev, "intd_cfg");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 337 if (IS_ERR(base))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 338 return PTR_ERR(base);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 339 pcie->intd_cfg_base = base;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 340
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 341 base = devm_platform_ioremap_resource_byname(pdev, "user_cfg");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 342 if (IS_ERR(base))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 343 return PTR_ERR(base);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 344 pcie->user_cfg_base = base;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 345
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 346 ret = of_property_read_u32(node, "num-lanes", &num_lanes);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 347 if (ret || num_lanes > MAX_LANES)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 348 num_lanes = 1;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 349 pcie->num_lanes = num_lanes;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 350
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 351 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48)))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 352 return -EINVAL;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 353
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 354 irq = platform_get_irq_byname(pdev, "link_state");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 355 if (irq < 0)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 356 return irq;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 357
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 358 dev_set_drvdata(dev, pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 359 pm_runtime_enable(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 360 ret = pm_runtime_get_sync(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 361 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 362 dev_err(dev, "pm_runtime_get_sync failed\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 363 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 364 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 365
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 366 ret = j721e_pcie_ctrl_init(pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 367 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 368 dev_err(dev, "pm_runtime_get_sync failed\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 369 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 370 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 371
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 372 ret = devm_request_irq(dev, irq, j721e_pcie_link_irq_handler, 0,
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 373 "j721e-pcie-link-down-irq", pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 374 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 375 dev_err(dev, "failed to request link state IRQ %d\n", irq);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 376 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 377 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 378
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 379 j721e_pcie_config_link_irq(pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 380
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 381 switch (mode) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 382 case PCI_MODE_RC:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 383 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_HOST)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 384 ret = -ENODEV;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 385 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 386 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 387
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 388 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 389 if (!bridge) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 390 ret = -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 391 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 392 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 393
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 394 bridge->ops = &cdns_ti_pcie_host_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 395 rc = pci_host_bridge_priv(bridge);
4740b969aaf58a Nadeem Athani 2021-02-09 396 rc->quirk_retrain_flag = data->quirk_retrain_flag;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 397
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 398 cdns_pcie = &rc->pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 399 cdns_pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 400 cdns_pcie->ops = &j721e_pcie_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 401 pcie->cdns_pcie = cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 402
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 403 gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 404 if (IS_ERR(gpiod)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 405 ret = PTR_ERR(gpiod);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 406 if (ret != -EPROBE_DEFER)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 407 dev_err(dev, "Failed to get reset GPIO\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 408 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 409 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 410
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 411 ret = cdns_pcie_init_phy(dev, cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 412 if (ret) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 413 dev_err(dev, "Failed to init phy\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 414 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 415 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 416
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 417 clk = devm_clk_get_optional(dev, "pcie_refclk");
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 418 if (IS_ERR(clk)) {
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 419 dev_err(dev, "failed to get pcie_refclk\n");
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 @420 goto err_pcie_setup;
ret = PTR_ERR(clk)
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 421 }
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 422
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 423 ret = clk_prepare_enable(clk);
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 424 if (ret) {
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 425 dev_err(dev, "failed to enable pcie_refclk\n");
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 426 goto err_get_sync;
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 427 }
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 428 pcie->refclk = clk;
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 429
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 430 /*
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 431 * "Power Sequencing and Reset Signal Timings" table in
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 432 * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 433 * indicates PERST# should be deasserted after minimum of 100us
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 434 * once REFCLK is stable. The REFCLK to the connector in RC
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 435 * mode is selected while enabling the PHY. So deassert PERST#
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 436 * after 100 us.
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 437 */
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 438 if (gpiod) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 439 usleep_range(100, 200);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 440 gpiod_set_value_cansleep(gpiod, 1);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 441 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 442
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 443 ret = cdns_pcie_host_setup(rc);
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 444 if (ret < 0) {
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 445 clk_disable_unprepare(pcie->refclk);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 446 goto err_pcie_setup;
c77817a9fba361 Kishon Vijay Abraham I 2021-02-22 447 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 448
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 449 break;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 450 case PCI_MODE_EP:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 451 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_EP)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 452 ret = -ENODEV;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 453 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 454 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 455
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 456 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 457 if (!ep) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 458 ret = -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 459 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 460 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 461
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 462 cdns_pcie = &ep->pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 463 cdns_pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 464 cdns_pcie->ops = &j721e_pcie_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 465 pcie->cdns_pcie = cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 466
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 467 ret = cdns_pcie_init_phy(dev, cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 468 if (ret) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 469 dev_err(dev, "Failed to init phy\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 470 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 471 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 472
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 473 ret = cdns_pcie_ep_setup(ep);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 474 if (ret < 0)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 475 goto err_pcie_setup;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 476
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 477 break;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 478 default:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 479 dev_err(dev, "INVALID device type %d\n", mode);
Should this be an error path as well?
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 480 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 481
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 482 return 0;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 483
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 484 err_pcie_setup:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 485 cdns_pcie_disable_phy(cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 486
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 487 err_get_sync:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 488 pm_runtime_put(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 489 pm_runtime_disable(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 490
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 491 return ret;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 492 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 41663 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 2/4] dt-bindings: PCI: ti, j721e: Add host mode dt-bindings for TI's AM64 SoC
2021-02-22 11:40 ` [PATCH v3 2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC Kishon Vijay Abraham I
@ 2021-03-05 23:28 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2021-03-05 23:28 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: devicetree, linux-arm-kernel, Tom Joseph, Rob Herring,
Lorenzo Pieralisi, linux-pci, Bjorn Helgaas, linux-kernel
On Mon, 22 Feb 2021 17:10:28 +0530, Kishon Vijay Abraham I wrote:
> Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in
> J7200, however AM64 is a non-coherent architecture.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 3/4] dt-bindings: PCI: ti, j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
2021-02-22 11:40 ` [PATCH v3 3/4] dt-bindings: PCI: ti,j721e: Add endpoint " Kishon Vijay Abraham I
@ 2021-03-05 23:29 ` Rob Herring
0 siblings, 0 replies; 9+ messages in thread
From: Rob Herring @ 2021-03-05 23:29 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: linux-kernel, Rob Herring, Lorenzo Pieralisi, linux-arm-kernel,
Tom Joseph, Bjorn Helgaas, linux-pci, devicetree
On Mon, 22 Feb 2021 17:10:29 +0530, Kishon Vijay Abraham I wrote:
> Add endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP
> used in J7200, however AM64 is a non-coherent architecture.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-03-05 23:30 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-22 11:40 [PATCH v3 0/4] AM64: Add PCIe bindings and driver support Kishon Vijay Abraham I
2021-02-22 11:40 ` [PATCH v3 1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector Kishon Vijay Abraham I
2021-02-22 17:29 ` Krzysztof Wilczyński
2021-02-22 11:40 ` [PATCH v3 2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC Kishon Vijay Abraham I
2021-03-05 23:28 ` [PATCH v3 2/4] dt-bindings: PCI: ti, j721e: " Rob Herring
2021-02-22 11:40 ` [PATCH v3 3/4] dt-bindings: PCI: ti,j721e: Add endpoint " Kishon Vijay Abraham I
2021-03-05 23:29 ` [PATCH v3 3/4] dt-bindings: PCI: ti, j721e: " Rob Herring
2021-02-22 11:40 ` [PATCH v3 4/4] PCI: j721e: Add support to provide refclk to PCIe connector Kishon Vijay Abraham I
2021-02-23 7:50 ` Dan Carpenter
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