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From: Rob Herring <robh@kernel.org>
To: bpeled@marvell.com
Cc: thomas.petazzoni@bootlin.com, lorenzo.pieralisi@arm.com,
	bhelgaas@google.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-pci@vger.kernel.org, sebastian.hesselbarth@gmail.com,
	gregory.clement@bootlin.com, andrew@lunn.ch, mw@semihalf.com,
	jaz@semihalf.com, kostap@marvell.com, nadavh@marvell.com,
	stefanc@marvell.com, oferh@marvell.com
Subject: Re: [”PATCH” v2 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings
Date: Thu, 15 Apr 2021 16:20:08 -0500	[thread overview]
Message-ID: <20210415212008.GA1899572@robh.at.kernel.org> (raw)
In-Reply-To: <1618406454-7953-4-git-send-email-bpeled@marvell.com>

On Wed, Apr 14, 2021 at 04:20:52PM +0300, bpeled@marvell.com wrote:
> From: Ben Peled <bpeled@marvell.com>
> 
> Adding optional system-controller and mac-reset-bit-mask
> needed for linkdown procedure.

Same comment as v1.

BTW, it's PATCH not "PATCH". Don't do anything and git will do the right 
thing here.

> 
> Signed-off-by: Ben Peled <bpeled@marvell.com>
> ---
>  Documentation/devicetree/bindings/pci/pci-armada8k.txt | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> index 7a813d0..2696e79 100644
> --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> @@ -24,6 +24,10 @@ Optional properties:
>  - phy-names: names of the PHYs corresponding to the number of lanes.
>  	Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
>  	2 PHYs.
> +- marvell,system-controller: address of system controller needed
> +	in order to reset MAC used by link-down handle
> +- marvell,mac-reset-bit-mask: MAC reset bit of system controller
> +	needed in order to reset MAC used by link-down handle
>  
>  Example:
>  
> @@ -45,4 +49,6 @@ Example:
>  		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>  		num-lanes = <1>;
>  		clocks = <&cpm_syscon0 1 13>;
> +		marvell,system-controller = <&CP11X_LABEL(syscon0)>;
> +		marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>;
>  	};
> -- 
> 2.7.4
> 

  reply	other threads:[~2021-04-15 21:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-14 13:20 [”PATCH” v2 0/5] Asynchronous linkdown recovery bpeled
2021-04-14 13:20 ` [”PATCH” v2 1/5] PCI: armada8k: Disable LTSSM on link down interrupts bpeled
2021-12-09 11:28   ` Pali Rohár
2021-04-14 13:20 ` [”PATCH” v2 2/5] PCI: armada8k: Add link-down handle bpeled
2021-04-17 10:51   ` Pali Rohár
2021-04-14 13:20 ` [”PATCH” v2 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings bpeled
2021-04-15 21:20   ` Rob Herring [this message]
2021-04-14 13:20 ` [”PATCH” v2 4/5] arm64: dts: marvell: add pcie mac reset to pcie bpeled
2021-04-14 13:20 ` [”PATCH” v2 5/5] PCI: armada8k: add device reset to link-down handle bpeled

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