From: Lukas Wunner <lukas@wunner.de>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
Sathyanarayanan Kuppuswamy
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Ethan Zhao <haifeng.zhao@intel.com>,
Sinan Kaya <okaya@kernel.org>, Ashok Raj <ashok.raj@intel.com>,
Keith Busch <kbusch@kernel.org>,
linux-pci@vger.kernel.org, Russell Currey <ruscur@russell.cc>,
Oliver O'Halloran <oohall@gmail.com>,
Stuart Hayes <stuart.w.hayes@gmail.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Linuxarm <linuxarm@huawei.com>
Subject: Re: [PATCH] PCI: pciehp: Ignore Link Down/Up caused by DPC
Date: Thu, 29 Apr 2021 21:42:14 +0200 [thread overview]
Message-ID: <20210429194214.GA22639@wunner.de> (raw)
In-Reply-To: <c7932c4e-81b1-279d-48df-5d621efff757@hisilicon.com>
On Thu, Apr 29, 2021 at 07:29:59PM +0800, Yicong Yang wrote:
> On 2021/4/28 22:40, Lukas Wunner wrote:
> > If DPC doesn't recover within 3 seconds, pciehp will consider the
> > error unrecoverable and bring down the slot, no matter what.
> >
> > I can't tell you why DPC is unable to recover. Does it help if you
> > raise the timeout to, say, 5000 msec?
>
> I raise the timeout to 4s and it works well. I dump the remained jiffies in
> the log and find sometimes the recovery will take a bit more than 3s:
Thanks for testing. I'll respin the patch and raise the timeout
to 4000 msec.
The 3000 msec were chosen arbitrarily. I couldn't imagine that
it would ever take longer than that. The spec does not seem to
mandate a time limit for DPC recovery. But we do need a timeout
because the DPC Trigger Status bit may never clear and then pciehp
would wait indefinitely. This can happen if dpc_wait_rp_inactive()
fails or perhaps because the hardware is buggy.
I'll amend the patch to clarify that the timeout is just a reasonable
heuristic and not a value provided by the spec.
Which hardware did you test this on? Is this a HiSilicon platform
or Intel?
Thanks!
Lukas
next prev parent reply other threads:[~2021-04-29 19:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-28 8:52 [PATCH] PCI: pciehp: Ignore Link Down/Up caused by DPC Lukas Wunner
2021-03-30 20:53 ` Kuppuswamy, Sathyanarayanan
2021-04-28 0:39 ` Kuppuswamy, Sathyanarayanan
2021-04-28 1:42 ` Zhao, Haifeng
2021-04-28 10:08 ` Yicong Yang
2021-04-28 14:40 ` Lukas Wunner
2021-04-29 11:29 ` Yicong Yang
2021-04-29 12:40 ` Zhao, Haifeng
2021-04-29 19:42 ` Lukas Wunner [this message]
2021-04-30 8:47 ` Yicong Yang
2021-04-30 12:15 ` Lukas Wunner
2021-04-29 19:36 ` Keith Busch
2021-04-29 20:16 ` Lukas Wunner
2021-04-29 21:16 ` Keith Busch
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210429194214.GA22639@wunner.de \
--to=lukas@wunner.de \
--cc=ashok.raj@intel.com \
--cc=dan.j.williams@intel.com \
--cc=haifeng.zhao@intel.com \
--cc=helgaas@kernel.org \
--cc=kbusch@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mika.westerberg@linux.intel.com \
--cc=okaya@kernel.org \
--cc=oohall@gmail.com \
--cc=ruscur@russell.cc \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=stuart.w.hayes@gmail.com \
--cc=yangyicong@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).