From: "Pali Rohár" <pali@kernel.org>
To: Luca Ceresoli <luca@lucaceresoli.net>
Cc: linux-pci@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v2] PCI: dra7xx: Fix reset behaviour
Date: Mon, 31 May 2021 15:32:11 +0200 [thread overview]
Message-ID: <20210531133211.llyiq3jcfy25tmz4@pali> (raw)
In-Reply-To: <20210531090540.2663171-1-luca@lucaceresoli.net>
On Monday 31 May 2021 11:05:40 Luca Ceresoli wrote:
> The PCIe PERSTn reset pin is active low and should be asserted, then
> deasserted.
>
> The current implementation only drives the pin once in "HIGH" position,
> thus presumably it was intended to deassert the pin. This has two problems:
>
> 1) it assumes the pin was asserted by other means before loading the
> driver
> 2) it has the wrong polarity, since "HIGH" means "active", and the pin is
> presumably configured as active low coherently with the PCIe
> convention, thus it is driven physically to 0, keeping the device
> under reset unless the pin is configured as active high.
>
> Fix both problems by:
>
> 1) keeping devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH) as is, but
> assuming the pin is correctly configured as "active low" this now
> becomes a reset assertion
> 2) adding gpiod_set_value(reset, 0) after a delay to deassert reset
>
> Fixes: 78bdcad05ea1 ("PCI: dra7xx: Add support to make GPIO drive PERST# line")
> Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
>
> ---
>
> Changes v1 -> v2:
> - No changes to the patch
> - Reword commit message according to suggestions from Bjorn Helgaas (from
> another patchset)
> - Add Fixes: tag
> ---
> drivers/pci/controller/dwc/pci-dra7xx.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
> index cb5d4c245ff6..11f392b7a9a2 100644
> --- a/drivers/pci/controller/dwc/pci-dra7xx.c
> +++ b/drivers/pci/controller/dwc/pci-dra7xx.c
> @@ -801,6 +801,8 @@ static int dra7xx_pcie_probe(struct platform_device *pdev)
> dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret);
> goto err_gpio;
> }
> + usleep_range(1000, 2000);
Hello! Just a note that this is again a new code pattern in another
driver for different wait value of PCIe Warm Reset timeout. I sent email
about these issues:
https://lore.kernel.org/linux-pci/20210310110535.zh4pnn4vpmvzwl5q@pali/
Luca, how did you choose value 1000-2000 us? Do you have some reference
or specification which says that this value needs to be used?
> + gpiod_set_value(reset, 0);
>
> reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD);
> reg &= ~LTSSM_EN;
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-05-31 13:51 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 9:05 [PATCH v2] PCI: dra7xx: Fix reset behaviour Luca Ceresoli
2021-05-31 13:32 ` Pali Rohár [this message]
2021-05-31 13:54 ` Luca Ceresoli
2021-05-31 16:00 ` Kishon Vijay Abraham I
2021-05-31 16:22 ` Pali Rohár
2021-06-22 10:57 ` Luca Ceresoli
2021-06-22 11:06 ` Pali Rohár
2021-06-22 11:56 ` Lorenzo Pieralisi
2021-06-22 12:16 ` Pali Rohár
2021-06-22 13:31 ` Luca Ceresoli
2021-06-22 13:57 ` Kishon Vijay Abraham I
2021-06-22 20:52 ` Pali Rohár
2021-06-22 21:08 ` Luca Ceresoli
2021-06-22 21:19 ` Pali Rohár
2021-06-22 21:36 ` Luca Ceresoli
2021-06-22 22:23 ` Pali Rohár
2021-06-24 21:31 ` Luca Ceresoli
2021-06-24 21:42 ` Pali Rohár
2021-06-24 23:18 ` Linus Walleij
2021-06-24 23:34 ` Pali Rohár
2021-06-25 0:09 ` Linus Walleij
2021-06-25 8:05 ` Luca Ceresoli
2021-06-22 21:04 ` Luca Ceresoli
2021-06-24 23:11 ` Linus Walleij
2021-06-25 8:10 ` Luca Ceresoli
2021-06-22 14:23 ` Lorenzo Pieralisi
2021-06-22 20:48 ` Pali Rohár
2021-06-22 20:55 ` Pali Rohár
2021-06-22 21:13 ` Luca Ceresoli
2021-06-01 9:03 ` Luca Ceresoli
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