From: Kishon Vijay Abraham I <kishon@ti.com>
To: "Luca Ceresoli" <luca@lucaceresoli.net>,
"Pali Rohár" <pali@kernel.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>
Cc: <linus.walleij@linaro.org>, <linux-pci@vger.kernel.org>,
<linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v2] PCI: dra7xx: Fix reset behaviour
Date: Tue, 22 Jun 2021 19:27:37 +0530 [thread overview]
Message-ID: <4d4c0d4d-41b4-4756-5189-bffa15f88406@ti.com> (raw)
In-Reply-To: <18a104a9-2cb8-7535-a5b2-f5f049adff47@lucaceresoli.net>
Hi Luca, Pali,
On 22/06/21 7:01 pm, Luca Ceresoli wrote:
> Hi,
>
> On 22/06/21 14:16, Pali Rohár wrote:
>> On Tuesday 22 June 2021 12:56:04 Lorenzo Pieralisi wrote:
>>> [Adding Linus for GPIO discussion, thread:
>>> https://lore.kernel.org/linux-pci/20210531090540.2663171-1-luca@lucaceresoli.net]
>>>
>>> On Tue, Jun 22, 2021 at 01:06:27PM +0200, Pali Rohár wrote:
>>>> Hello!
>>>>
>>>> On Tuesday 22 June 2021 12:57:22 Luca Ceresoli wrote:
>>>>> Nothing happened after a few weeks... I understand that knowing the
>>>>> correct reset timings is relevant, but unfortunately I cannot help much
>>>>> in finding out the correct values.
>>>>>
>>>>> However I'm wondering what should happen to this patch. It *does* fix a
>>>>> real bug, but potentially with an incorrect or non-optimal usleep range.
>>>>> Do we really want to ignore a bugfix because we are not sure about how
>>>>> long this delay should be?
>>>>
>>>> As there is no better solution right now, I'm fine with your patch. But
>>>> patch needs to be approved by Lorenzo, so please wait for his final
>>>> answer.
>>>
>>> I am not a GPIO expert and I have a feeling this is platform specific
>>> beyond what the PCI specification can actually define architecturally.
>>
>> In my opinion timeout is not platform specific as I wrote in email:
>> https://lore.kernel.org/linux-pci/20210310110535.zh4pnn4vpmvzwl5q@pali/
>>
>> My experiments already proved that some PCIe cards needs to be in reset
>> state for some minimal time otherwise they cannot be enumerated. And it
>> does not matter to which platform you connect those (endpoint) cards.
>>
>> I do not think that timeout itself is platform specific. GPIO controls
>> PERST# pin and therefore specified sleep value directly drives how long
>> is card on the other end of PCIe slot in Warm Reset state. PCIe CEM spec
>> directly says that PERST# signal controls PCIe Warm Reset.
>>
>> What is here platform specific thing is that PERST# signal is controlled
>> by GPIO. But value of signal (high / low) and how long is in signal in
>> which state for me sounds like not an platform specific thing, but as
>> PCIe / CEM related.
>
> That's exactly my understanding of this matter. At least for the dra7xx
> controller it works exactly like this, PERSTn# is nothing but a GPIO
> output from the SoC that drives the PERSTn# input of the external chip
> without affecting the controller directly.
>
While the patch itself is correct, this kind-of changes the behavior on
already upstreamed platforms. Previously the driver expected #PERST to
be asserted be external means (or default power-up state) and only takes
care of de-asserting the #PERST line.
There are 2 platforms that will be impacted due to this change
1) arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi (has an inverter on
GPIO line)
2) arch/arm/boot/dts/am571x-idk.dts (directly connected to #PERST)
For 1), gpiod_set_value(reset, 0) will assert the PERST line due to the
inverter (and GPIO_ACTIVE_LOW)
For 2), gpiod_set_value(reset, 0) will assert the PERST line because we
have GPIO_ACTIVE_HIGH
So this patch should have to be accompanied with DT changes (and this
patch also breaks old DT compatibility).
Thanks
Kishon
next prev parent reply other threads:[~2021-06-22 13:58 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 9:05 [PATCH v2] PCI: dra7xx: Fix reset behaviour Luca Ceresoli
2021-05-31 13:32 ` Pali Rohár
2021-05-31 13:54 ` Luca Ceresoli
2021-05-31 16:00 ` Kishon Vijay Abraham I
2021-05-31 16:22 ` Pali Rohár
2021-06-22 10:57 ` Luca Ceresoli
2021-06-22 11:06 ` Pali Rohár
2021-06-22 11:56 ` Lorenzo Pieralisi
2021-06-22 12:16 ` Pali Rohár
2021-06-22 13:31 ` Luca Ceresoli
2021-06-22 13:57 ` Kishon Vijay Abraham I [this message]
2021-06-22 20:52 ` Pali Rohár
2021-06-22 21:08 ` Luca Ceresoli
2021-06-22 21:19 ` Pali Rohár
2021-06-22 21:36 ` Luca Ceresoli
2021-06-22 22:23 ` Pali Rohár
2021-06-24 21:31 ` Luca Ceresoli
2021-06-24 21:42 ` Pali Rohár
2021-06-24 23:18 ` Linus Walleij
2021-06-24 23:34 ` Pali Rohár
2021-06-25 0:09 ` Linus Walleij
2021-06-25 8:05 ` Luca Ceresoli
2021-06-22 21:04 ` Luca Ceresoli
2021-06-24 23:11 ` Linus Walleij
2021-06-25 8:10 ` Luca Ceresoli
2021-06-22 14:23 ` Lorenzo Pieralisi
2021-06-22 20:48 ` Pali Rohár
2021-06-22 20:55 ` Pali Rohár
2021-06-22 21:13 ` Luca Ceresoli
2021-06-01 9:03 ` Luca Ceresoli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4d4c0d4d-41b4-4756-5189-bffa15f88406@ti.com \
--to=kishon@ti.com \
--cc=bhelgaas@google.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=luca@lucaceresoli.net \
--cc=pali@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).