[PATCH] PCI: cadence: Remove surplus and document missing struct members

[PATCH] PCI: cadence: Remove surplus and document missing struct members

[Krzysztof Wilczyński]

Add missing documentation for the members "dev", "phy_count", "phy" and
"link" of the struct cdns_pcie, and remove surplus member "bus".

Thus resolve build time warnings related to kernel-doc:

  drivers/pci/controller/cadence/pcie-cadence.h:281: warning: Function parameter or member 'dev' not described in 'cdns_pcie'
  drivers/pci/controller/cadence/pcie-cadence.h:281: warning: Function parameter or member 'phy_count' not described in 'cdns_pcie'
  drivers/pci/controller/cadence/pcie-cadence.h:281: warning: Function parameter or member 'phy' not described in 'cdns_pcie'
  drivers/pci/controller/cadence/pcie-cadence.h:281: warning: Function parameter or member 'link' not described in 'cdns_pcie'

No change to functionality intended.

Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
---
 drivers/pci/controller/cadence/pcie-cadence.h | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
index 254d2570f8c9..5577fefce4f1 100644
--- a/drivers/pci/controller/cadence/pcie-cadence.h
+++ b/drivers/pci/controller/cadence/pcie-cadence.h
@@ -260,13 +260,18 @@ struct cdns_pcie_ops {
 };
 
 /**
- * struct cdns_pcie - private data for Cadence PCIe controller drivers
- * @reg_base: IO mapped register base
- * @mem_res: start/end offsets in the physical system memory to map PCI accesses
- * @is_rc: tell whether the PCIe controller mode is Root Complex or Endpoint.
- * @bus: In Root Complex mode, the bus number
- * @ops: Platform specific ops to control various inputs from Cadence PCIe
- *       wrapper
+ * struct cdns_pcie - Private data for Cadence PCIe controller drivers.
+ * @reg_base:	IO mapped register base.
+ * @mem_res:	Start/end offsets in the physical system memory to map PCI
+ *		accesses.
+ * @dev:	The PCI device.
+ * @is_rc:	Tell whether the PCIe controller mode is Root Complex or
+ *		Endpoint.
+ * @phy_count:	Number of supported PHY devices.
+ * @phy:	List of pointers to specific PHY control blocks.
+ * @link:	List of pointers to corresponding device link representations.
+ * @ops:	Platform specific ops to control various inputs from Cadence
+ *		PCIe wrapper.
  */
 struct cdns_pcie {
 	void __iomem		*reg_base;
-- 
2.32.0